coreboot-gerrit November 2019

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Change in ...coreboot[master]: src/soc: Use 'include <stdlib.h>' when appropriate
by HAOUAS Elyes (Code Review) 28 Nov '19

28 Nov '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32828 Change subject: src/soc: Use 'include <stdlib.h>' when appropriate ...................................................................... src/soc: Use 'include <stdlib.h>' when appropriate Change-Id: I46f60f8631601db1e2e654d638560d640bbcf403 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/soc/amd/stoneyridge/northbridge.c M src/soc/amd/stoneyridge/sm.c M src/soc/amd/stoneyridge/spi.c M src/soc/cavium/cn81xx/cbmem.c M src/soc/imgtec/pistachio/cbmem.c M src/soc/intel/baytrail/gfx.c M src/soc/intel/baytrail/ramstage.c M src/soc/intel/baytrail/smihandler.c M src/soc/intel/braswell/ramstage.c M src/soc/intel/braswell/smihandler.c M src/soc/intel/broadwell/finalize.c M src/soc/intel/broadwell/igd.c M src/soc/intel/broadwell/me_status.c M src/soc/intel/broadwell/minihd.c M src/soc/intel/broadwell/pei_data.c M src/soc/intel/broadwell/ramstage.c M src/soc/intel/broadwell/romstage/cpu.c M src/soc/intel/broadwell/romstage/power_state.c M src/soc/intel/broadwell/romstage/systemagent.c M src/soc/intel/broadwell/serialio.c M src/soc/intel/broadwell/systemagent.c M src/soc/intel/cannonlake/finalize.c M src/soc/intel/common/acpi_wake_source.c M src/soc/intel/common/block/smm/smihandler.c M src/soc/intel/denverton_ns/csme_ie_kt.c M src/soc/intel/denverton_ns/smihandler.c M src/soc/intel/denverton_ns/systemagent.c M src/soc/intel/fsp_baytrail/gfx.c M src/soc/intel/fsp_baytrail/include/soc/i2c.h M src/soc/intel/fsp_baytrail/ramstage.c M src/soc/intel/fsp_baytrail/smihandler.c M src/soc/intel/fsp_broadwell_de/cpu.c M src/soc/intel/fsp_broadwell_de/ramstage.c M src/soc/intel/icelake/finalize.c M src/soc/intel/icelake/pmutil.c M src/soc/intel/skylake/finalize.c M src/soc/intel/skylake/memmap.c M src/soc/intel/skylake/pmutil.c M src/soc/mediatek/mt8173/ddp.c M src/soc/mediatek/mt8173/include/soc/gpio.h M src/soc/nvidia/tegra124/clock.c M src/soc/nvidia/tegra124/display.c M src/soc/nvidia/tegra124/dma.c M src/soc/nvidia/tegra124/include/soc/clock.h M src/soc/nvidia/tegra124/sdram.c M src/soc/nvidia/tegra124/sdram_lp0.c M src/soc/nvidia/tegra124/sor.c M src/soc/nvidia/tegra124/verstage.c M src/soc/nvidia/tegra210/clock.c M src/soc/nvidia/tegra210/dma.c M src/soc/nvidia/tegra210/include/soc/clock.h M src/soc/nvidia/tegra210/include/soc/mipi-phy.h M src/soc/nvidia/tegra210/mipi-phy.c M src/soc/nvidia/tegra210/sdram.c M src/soc/nvidia/tegra210/sdram_lp0.c M src/soc/nvidia/tegra210/sor.c M src/soc/qualcomm/ipq40xx/i2c.c M src/soc/qualcomm/ipq40xx/qup.c M src/soc/qualcomm/ipq40xx/spi.c M src/soc/qualcomm/ipq40xx/uart.c M src/soc/qualcomm/ipq806x/i2c.c M src/soc/qualcomm/ipq806x/qup.c M src/soc/qualcomm/ipq806x/uart.c M src/soc/rockchip/common/gpio.c M src/soc/rockchip/common/i2c.c M src/soc/rockchip/common/include/soc/edp.h M src/soc/rockchip/common/pwm.c M src/soc/rockchip/common/rk808.c M src/soc/rockchip/common/vop.c M src/soc/rockchip/rk3288/clock.c M src/soc/rockchip/rk3288/display.c M src/soc/rockchip/rk3288/gpio.c M src/soc/rockchip/rk3288/hdmi.c M src/soc/rockchip/rk3288/include/soc/hdmi.h M src/soc/rockchip/rk3288/soc.c M src/soc/rockchip/rk3288/tsadc.c M src/soc/rockchip/rk3399/clock.c M src/soc/rockchip/rk3399/display.c M src/soc/rockchip/rk3399/gpio.c M src/soc/rockchip/rk3399/include/soc/mipi.h M src/soc/rockchip/rk3399/mipi.c M src/soc/rockchip/rk3399/saradc.c M src/soc/rockchip/rk3399/soc.c M src/soc/rockchip/rk3399/tsadc.c M src/soc/samsung/exynos5250/alternate_cbfs.c M src/soc/samsung/exynos5250/clock.c M src/soc/samsung/exynos5250/cpu.c M src/soc/samsung/exynos5250/fb.c M src/soc/samsung/exynos5420/alternate_cbfs.c M src/soc/samsung/exynos5420/clock.c M src/soc/samsung/exynos5420/cpu.c M src/soc/samsung/exynos5420/dp.c M src/soc/samsung/exynos5420/dp_lowlevel.c M src/soc/samsung/exynos5420/pinmux.c M src/soc/samsung/exynos5420/smp.c 95 files changed, 7 insertions(+), 99 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/32828/1 diff --git a/src/soc/amd/stoneyridge/northbridge.c b/src/soc/amd/stoneyridge/northbridge.c index 5985832..8aada17 100644 --- a/src/soc/amd/stoneyridge/northbridge.c +++ b/src/soc/amd/stoneyridge/northbridge.c @@ -35,8 +35,8 @@ #include <soc/southbridge.h> #include <soc/pci_devs.h> #include <soc/iomap.h> +#include <stddef.h> #include <stdint.h> -#include <stdlib.h> #include <string.h> #include <arch/bert_storage.h> diff --git a/src/soc/amd/stoneyridge/sm.c b/src/soc/amd/stoneyridge/sm.c index 803e628..438909d 100644 --- a/src/soc/amd/stoneyridge/sm.c +++ b/src/soc/amd/stoneyridge/sm.c @@ -20,7 +20,6 @@ #include <device/smbus.h> #include <cpu/x86/lapic.h> #include <arch/ioapic.h> -#include <stdlib.h> #include <soc/southbridge.h> #include <soc/smbus.h> diff --git a/src/soc/amd/stoneyridge/spi.c b/src/soc/amd/stoneyridge/spi.c index c682d98..9f787da 100644 --- a/src/soc/amd/stoneyridge/spi.c +++ b/src/soc/amd/stoneyridge/spi.c @@ -14,7 +14,6 @@ */ #include <stdint.h> -#include <stdlib.h> #include <device/mmio.h> #include <lib.h> #include <timer.h> @@ -27,6 +26,7 @@ #include <device/pci_ops.h> #include <soc/southbridge.h> #include <soc/pci_devs.h> +#include <stddef.h> #define SPI_DEBUG_DRIVER CONFIG(DEBUG_SPI_FLASH) diff --git a/src/soc/cavium/cn81xx/cbmem.c b/src/soc/cavium/cn81xx/cbmem.c index bb6fa18..5a4ad19 100644 --- a/src/soc/cavium/cn81xx/cbmem.c +++ b/src/soc/cavium/cn81xx/cbmem.c @@ -17,7 +17,6 @@ #include <cbmem.h> #include <soc/addressmap.h> #include <soc/sdram.h> -#include <stdlib.h> #include <symbols.h> void *cbmem_top(void) diff --git a/src/soc/imgtec/pistachio/cbmem.c b/src/soc/imgtec/pistachio/cbmem.c index 112df7c..964300e 100644 --- a/src/soc/imgtec/pistachio/cbmem.c +++ b/src/soc/imgtec/pistachio/cbmem.c @@ -15,7 +15,6 @@ */ #include <cbmem.h> -#include <stdlib.h> #include <symbols.h> void *cbmem_top(void) diff --git a/src/soc/intel/baytrail/gfx.c b/src/soc/intel/baytrail/gfx.c index 2048c13..ab30785 100644 --- a/src/soc/intel/baytrail/gfx.c +++ b/src/soc/intel/baytrail/gfx.c @@ -21,7 +21,6 @@ #include <device/pci_ids.h> #include <drivers/intel/gma/opregion.h> #include <reg_script.h> -#include <stdlib.h> #include <soc/gfx.h> #include <soc/iosf.h> #include <soc/nvs.h> diff --git a/src/soc/intel/baytrail/ramstage.c b/src/soc/intel/baytrail/ramstage.c index 1715198..eb3e327 100644 --- a/src/soc/intel/baytrail/ramstage.c +++ b/src/soc/intel/baytrail/ramstage.c @@ -23,9 +23,7 @@ #include <device/device.h> #include <device/pci_def.h> #include <device/pci_ops.h> -#include <stdlib.h> #include <string.h> - #include <soc/gpio.h> #include <soc/lpc.h> #include <soc/msr.h> diff --git a/src/soc/intel/baytrail/smihandler.c b/src/soc/intel/baytrail/smihandler.c index 1bc9ed1..3679b55 100644 --- a/src/soc/intel/baytrail/smihandler.c +++ b/src/soc/intel/baytrail/smihandler.c @@ -14,7 +14,6 @@ */ #include <stdint.h> -#include <stdlib.h> #include <arch/io.h> #include <device/pci_ops.h> #include <console/console.h> diff --git a/src/soc/intel/braswell/ramstage.c b/src/soc/intel/braswell/ramstage.c index d6a1cda..f8011fd 100644 --- a/src/soc/intel/braswell/ramstage.c +++ b/src/soc/intel/braswell/ramstage.c @@ -37,7 +37,6 @@ #include <soc/ramstage.h> #include <soc/intel/common/acpi.h> #include <boardid.h> -#include <stdlib.h> #include <string.h> #define SHOW_PATTRS 1 diff --git a/src/soc/intel/braswell/smihandler.c b/src/soc/intel/braswell/smihandler.c index a723309..f9d931e 100644 --- a/src/soc/intel/braswell/smihandler.c +++ b/src/soc/intel/braswell/smihandler.c @@ -28,7 +28,6 @@ #include <soc/pm.h> #include <spi-generic.h> #include <stdint.h> -#include <stdlib.h> #include <soc/gpio.h> /* GNVS needs to be set by coreboot initiating a software SMI. */ diff --git a/src/soc/intel/broadwell/finalize.c b/src/soc/intel/broadwell/finalize.c index 1adbbc8..f270f9b 100644 --- a/src/soc/intel/broadwell/finalize.c +++ b/src/soc/intel/broadwell/finalize.c @@ -20,7 +20,6 @@ #include <cpu/x86/smm.h> #include <reg_script.h> #include <spi-generic.h> -#include <stdlib.h> #include <soc/pci_devs.h> #include <soc/lpc.h> #include <soc/me.h> diff --git a/src/soc/intel/broadwell/igd.c b/src/soc/intel/broadwell/igd.c index 9107b23..d539183 100644 --- a/src/soc/intel/broadwell/igd.c +++ b/src/soc/intel/broadwell/igd.c @@ -22,7 +22,6 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> -#include <stdlib.h> #include <string.h> #include <reg_script.h> #include <cbmem.h> diff --git a/src/soc/intel/broadwell/me_status.c b/src/soc/intel/broadwell/me_status.c index 08fd48f..3b2c680 100644 --- a/src/soc/intel/broadwell/me_status.c +++ b/src/soc/intel/broadwell/me_status.c @@ -16,7 +16,6 @@ #include <device/pci_ops.h> #include <console/console.h> #include <device/pci.h> -#include <stdlib.h> #include <string.h> #include <soc/pci_devs.h> #include <soc/me.h> diff --git a/src/soc/intel/broadwell/minihd.c b/src/soc/intel/broadwell/minihd.c index d44e153..ff12ac5 100644 --- a/src/soc/intel/broadwell/minihd.c +++ b/src/soc/intel/broadwell/minihd.c @@ -21,7 +21,6 @@ #include <device/pci_ids.h> #include <device/pci_ops.h> #include <device/mmio.h> -#include <stdlib.h> #include <soc/intel/common/hda_verb.h> #include <soc/ramstage.h> #include <soc/igd.h> diff --git a/src/soc/intel/broadwell/pei_data.c b/src/soc/intel/broadwell/pei_data.c index d8059ec..0a3ec5a 100644 --- a/src/soc/intel/broadwell/pei_data.c +++ b/src/soc/intel/broadwell/pei_data.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <stdlib.h> #include <stdint.h> #include <console/streams.h> #include <soc/iomap.h> diff --git a/src/soc/intel/broadwell/ramstage.c b/src/soc/intel/broadwell/ramstage.c index 7065369..bad9f96 100644 --- a/src/soc/intel/broadwell/ramstage.c +++ b/src/soc/intel/broadwell/ramstage.c @@ -16,7 +16,6 @@ #include <arch/acpi.h> #include <cbmem.h> #include <device/device.h> -#include <stdlib.h> #include <string.h> #include <soc/nvs.h> #include <soc/pm.h> diff --git a/src/soc/intel/broadwell/romstage/cpu.c b/src/soc/intel/broadwell/romstage/cpu.c index f251652..5a45697 100644 --- a/src/soc/intel/broadwell/romstage/cpu.c +++ b/src/soc/intel/broadwell/romstage/cpu.c @@ -14,7 +14,6 @@ */ #include <arch/cpu.h> -#include <stdlib.h> #include <console/console.h> #include <cpu/x86/msr.h> #include <soc/cpu.h> diff --git a/src/soc/intel/broadwell/romstage/power_state.c b/src/soc/intel/broadwell/romstage/power_state.c index ca22b4e..1970c31 100644 --- a/src/soc/intel/broadwell/romstage/power_state.c +++ b/src/soc/intel/broadwell/romstage/power_state.c @@ -22,7 +22,6 @@ #include <device/pci_def.h> #include <reg_script.h> #include <stdint.h> -#include <stdlib.h> #include <string.h> #include <soc/iomap.h> #include <soc/lpc.h> diff --git a/src/soc/intel/broadwell/romstage/systemagent.c b/src/soc/intel/broadwell/romstage/systemagent.c index 8be5b82..5c0224a 100644 --- a/src/soc/intel/broadwell/romstage/systemagent.c +++ b/src/soc/intel/broadwell/romstage/systemagent.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */ -#include <stdlib.h> #include <device/mmio.h> #include <device/pci_ops.h> #include <device/pci_def.h> diff --git a/src/soc/intel/broadwell/serialio.c b/src/soc/intel/broadwell/serialio.c index 12e458c..58a0444 100644 --- a/src/soc/intel/broadwell/serialio.c +++ b/src/soc/intel/broadwell/serialio.c @@ -20,7 +20,6 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> -#include <stdlib.h> #include <soc/iobp.h> #include <soc/nvs.h> #include <soc/pci_devs.h> diff --git a/src/soc/intel/broadwell/systemagent.c b/src/soc/intel/broadwell/systemagent.c index c6444b1..9af55c9 100644 --- a/src/soc/intel/broadwell/systemagent.c +++ b/src/soc/intel/broadwell/systemagent.c @@ -22,7 +22,6 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> -#include <stdlib.h> #include <vendorcode/google/chromeos/chromeos.h> #include <soc/cpu.h> #include <soc/iomap.h> diff --git a/src/soc/intel/cannonlake/finalize.c b/src/soc/intel/cannonlake/finalize.c index 4dfd15b..c284263 100644 --- a/src/soc/intel/cannonlake/finalize.c +++ b/src/soc/intel/cannonlake/finalize.c @@ -32,7 +32,6 @@ #include <soc/pm.h> #include <soc/smbus.h> #include <soc/systemagent.h> -#include <stdlib.h> #include "chip.h" diff --git a/src/soc/intel/common/acpi_wake_source.c b/src/soc/intel/common/acpi_wake_source.c index f66706c..d3955fd 100644 --- a/src/soc/intel/common/acpi_wake_source.c +++ b/src/soc/intel/common/acpi_wake_source.c @@ -19,7 +19,7 @@ #include <console/console.h> #include <soc/nvs.h> #include <stdint.h> -#include <stdlib.h> + #include "acpi.h" __weak int soc_fill_acpi_wake(uint32_t *pm1, uint32_t **gpe0) diff --git a/src/soc/intel/common/block/smm/smihandler.c b/src/soc/intel/common/block/smm/smihandler.c index 7aa69c5..39be081 100644 --- a/src/soc/intel/common/block/smm/smihandler.c +++ b/src/soc/intel/common/block/smm/smihandler.c @@ -35,7 +35,6 @@ #include <soc/smbus.h> #include <spi-generic.h> #include <stdint.h> -#include <stdlib.h> /* GNVS needs to be set by coreboot initiating a software SMI. */ static struct global_nvs_t *gnvs; diff --git a/src/soc/intel/denverton_ns/csme_ie_kt.c b/src/soc/intel/denverton_ns/csme_ie_kt.c index 5967840..143e7b6 100644 --- a/src/soc/intel/denverton_ns/csme_ie_kt.c +++ b/src/soc/intel/denverton_ns/csme_ie_kt.c @@ -15,7 +15,6 @@ */ #include <stdint.h> -#include <stdlib.h> #include <device/pci.h> #include <device/pci_ids.h> #include <console/console.h> diff --git a/src/soc/intel/denverton_ns/smihandler.c b/src/soc/intel/denverton_ns/smihandler.c index 4d748b2..d8e967f 100644 --- a/src/soc/intel/denverton_ns/smihandler.c +++ b/src/soc/intel/denverton_ns/smihandler.c @@ -16,7 +16,6 @@ */ #include <stdint.h> -#include <stdlib.h> #include <arch/hlt.h> #include <arch/io.h> #include <device/pci_ops.h> diff --git a/src/soc/intel/denverton_ns/systemagent.c b/src/soc/intel/denverton_ns/systemagent.c index cc1d696..3d77e21 100644 --- a/src/soc/intel/denverton_ns/systemagent.c +++ b/src/soc/intel/denverton_ns/systemagent.c @@ -23,9 +23,7 @@ #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> -#include <stdlib.h> #include <timer.h> - #include <soc/iomap.h> #include <soc/pci_devs.h> #include <soc/ramstage.h> diff --git a/src/soc/intel/fsp_baytrail/gfx.c b/src/soc/intel/fsp_baytrail/gfx.c index dab9972..7029067 100644 --- a/src/soc/intel/fsp_baytrail/gfx.c +++ b/src/soc/intel/fsp_baytrail/gfx.c @@ -19,7 +19,6 @@ #include <device/pci.h> #include <device/pci_ids.h> #include <reg_script.h> -#include <stdlib.h> #include <soc/gfx.h> #include <soc/iosf.h> #include <soc/pci_devs.h> diff --git a/src/soc/intel/fsp_baytrail/include/soc/i2c.h b/src/soc/intel/fsp_baytrail/include/soc/i2c.h index f0ae0b3..a966fe4 100644 --- a/src/soc/intel/fsp_baytrail/include/soc/i2c.h +++ b/src/soc/intel/fsp_baytrail/include/soc/i2c.h @@ -17,7 +17,6 @@ #define __SOC_INTEL_FSP_BAYTRAIL_I2C_H__ #include <device/pci_def.h> -#include <stdlib.h> /* SMBus controller settings in PCI configuration space */ #define I2C_PCI_VENDOR_ID 0x8086 diff --git a/src/soc/intel/fsp_baytrail/ramstage.c b/src/soc/intel/fsp_baytrail/ramstage.c index 754c5f5..29cfc62 100644 --- a/src/soc/intel/fsp_baytrail/ramstage.c +++ b/src/soc/intel/fsp_baytrail/ramstage.c @@ -23,9 +23,7 @@ #include <device/device.h> #include <device/pci_def.h> #include <device/pci_ops.h> -#include <stdlib.h> #include <string.h> - #include <soc/gpio.h> #include <soc/lpc.h> #include <soc/nvs.h> diff --git a/src/soc/intel/fsp_baytrail/smihandler.c b/src/soc/intel/fsp_baytrail/smihandler.c index f2abd99..7eedfac 100644 --- a/src/soc/intel/fsp_baytrail/smihandler.c +++ b/src/soc/intel/fsp_baytrail/smihandler.c @@ -14,7 +14,6 @@ */ #include <stdint.h> -#include <stdlib.h> #include <arch/io.h> #include <device/pci_ops.h> #include <console/console.h> @@ -23,7 +22,6 @@ #include <device/pci_def.h> #include <elog.h> #include <halt.h> - #include <soc/pci_devs.h> #include <soc/pmc.h> #include <soc/nvs.h> diff --git a/src/soc/intel/fsp_broadwell_de/cpu.c b/src/soc/intel/fsp_broadwell_de/cpu.c index 0b933c5..4814596 100644 --- a/src/soc/intel/fsp_broadwell_de/cpu.c +++ b/src/soc/intel/fsp_broadwell_de/cpu.c @@ -15,7 +15,6 @@ * GNU General Public License for more details. */ -#include <stdlib.h> #include <console/console.h> #include <cpu/cpu.h> #include <cpu/intel/microcode.h> diff --git a/src/soc/intel/fsp_broadwell_de/ramstage.c b/src/soc/intel/fsp_broadwell_de/ramstage.c index 96b3888..e892c5b 100644 --- a/src/soc/intel/fsp_broadwell_de/ramstage.c +++ b/src/soc/intel/fsp_broadwell_de/ramstage.c @@ -14,7 +14,6 @@ * GNU General Public License for more details. */ -#include <stdlib.h> #include <arch/cpu.h> #include <console/console.h> #include <cpu/intel/microcode.h> diff --git a/src/soc/intel/icelake/finalize.c b/src/soc/intel/icelake/finalize.c index e061cda..2cf167f 100644 --- a/src/soc/intel/icelake/finalize.c +++ b/src/soc/intel/icelake/finalize.c @@ -31,7 +31,6 @@ #include <soc/pm.h> #include <soc/smbus.h> #include <soc/systemagent.h> -#include <stdlib.h> #include "chip.h" diff --git a/src/soc/intel/icelake/pmutil.c b/src/soc/intel/icelake/pmutil.c index 1c47783..ec81cfe 100644 --- a/src/soc/intel/icelake/pmutil.c +++ b/src/soc/intel/icelake/pmutil.c @@ -29,7 +29,6 @@ #include <intelblocks/pmclib.h> #include <intelblocks/rtc.h> #include <intelblocks/tco.h> -#include <stdlib.h> #include <soc/gpe.h> #include <soc/gpio.h> #include <soc/iomap.h> @@ -38,6 +37,7 @@ #include <soc/pm.h> #include <soc/smbus.h> #include <security/vboot/vbnv.h> +#include <stddef.h> #include "chip.h" diff --git a/src/soc/intel/skylake/finalize.c b/src/soc/intel/skylake/finalize.c index 5d7e1e0..0248a54 100644 --- a/src/soc/intel/skylake/finalize.c +++ b/src/soc/intel/skylake/finalize.c @@ -37,7 +37,6 @@ #include <soc/smbus.h> #include <soc/systemagent.h> #include <soc/thermal.h> -#include <stdlib.h> #include <timer.h> #include "chip.h" diff --git a/src/soc/intel/skylake/memmap.c b/src/soc/intel/skylake/memmap.c index ff7edbc..575a3f8 100644 --- a/src/soc/intel/skylake/memmap.c +++ b/src/soc/intel/skylake/memmap.c @@ -26,7 +26,7 @@ #include <soc/msr.h> #include <soc/pci_devs.h> #include <soc/systemagent.h> -#include <stdlib.h> +#include <stddef.h> #include "chip.h" diff --git a/src/soc/intel/skylake/pmutil.c b/src/soc/intel/skylake/pmutil.c index 7d0dc0a..62eabab 100644 --- a/src/soc/intel/skylake/pmutil.c +++ b/src/soc/intel/skylake/pmutil.c @@ -29,7 +29,6 @@ #include <intelblocks/pmclib.h> #include <intelblocks/lpc_lib.h> #include <intelblocks/tco.h> -#include <stdlib.h> #include <soc/gpe.h> #include <soc/gpio.h> #include <soc/iomap.h> @@ -38,6 +37,7 @@ #include <soc/pmc.h> #include <soc/smbus.h> #include <security/vboot/vbnv.h> +#include <stddef.h> #include "chip.h" diff --git a/src/soc/mediatek/mt8173/ddp.c b/src/soc/mediatek/mt8173/ddp.c index f8896d3..a335ff2 100644 --- a/src/soc/mediatek/mt8173/ddp.c +++ b/src/soc/mediatek/mt8173/ddp.c @@ -15,7 +15,6 @@ #include <device/mmio.h> #include <edid.h> -#include <stdlib.h> #include <stddef.h> #include <soc/addressmap.h> #include <soc/ddp.h> diff --git a/src/soc/mediatek/mt8173/include/soc/gpio.h b/src/soc/mediatek/mt8173/include/soc/gpio.h index ec08334..8a6e13a 100644 --- a/src/soc/mediatek/mt8173/include/soc/gpio.h +++ b/src/soc/mediatek/mt8173/include/soc/gpio.h @@ -16,7 +16,6 @@ #define SOC_MEDIATEK_MT8173_GPIO_H #include <stdint.h> -#include <stdlib.h> #include <soc/addressmap.h> #include <soc/gpio_common.h> diff --git a/src/soc/nvidia/tegra124/clock.c b/src/soc/nvidia/tegra124/clock.c index 6877c04..3c8ddb2 100644 --- a/src/soc/nvidia/tegra124/clock.c +++ b/src/soc/nvidia/tegra124/clock.c @@ -24,7 +24,6 @@ #include <soc/maincpu.h> #include <soc/pmc.h> #include <soc/sysctr.h> -#include <stdlib.h> #include <symbols.h> static struct clk_rst_ctlr *clk_rst = (void *)TEGRA_CLK_RST_BASE; diff --git a/src/soc/nvidia/tegra124/display.c b/src/soc/nvidia/tegra124/display.c index 51f7215..6fa3bdf 100644 --- a/src/soc/nvidia/tegra124/display.c +++ b/src/soc/nvidia/tegra124/display.c @@ -26,7 +26,6 @@ #include <soc/nvidia/tegra/dc.h> #include <soc/nvidia/tegra/pwm.h> #include <stdint.h> -#include <stdlib.h> #include <string.h> #include "chip.h" diff --git a/src/soc/nvidia/tegra124/dma.c b/src/soc/nvidia/tegra124/dma.c index 73d050f..a0bd5c0 100644 --- a/src/soc/nvidia/tegra124/dma.c +++ b/src/soc/nvidia/tegra124/dma.c @@ -21,7 +21,6 @@ #include <soc/addressmap.h> #include <soc/dma.h> #include <stddef.h> -#include <stdlib.h> struct apb_dma * const apb_dma = (struct apb_dma *)TEGRA_APB_DMA_BASE; diff --git a/src/soc/nvidia/tegra124/include/soc/clock.h b/src/soc/nvidia/tegra124/include/soc/clock.h index 00744ce..5538b78 100644 --- a/src/soc/nvidia/tegra124/include/soc/clock.h +++ b/src/soc/nvidia/tegra124/include/soc/clock.h @@ -22,7 +22,6 @@ #include <device/mmio.h> #include <soc/clk_rst.h> #include <stdint.h> -#include <stdlib.h> enum { CLK_L_CPU = 0x1 << 0, diff --git a/src/soc/nvidia/tegra124/sdram.c b/src/soc/nvidia/tegra124/sdram.c index 9af116c..7c5d304 100644 --- a/src/soc/nvidia/tegra124/sdram.c +++ b/src/soc/nvidia/tegra124/sdram.c @@ -22,7 +22,6 @@ #include <soc/mc.h> #include <soc/pmc.h> #include <soc/sdram.h> -#include <stdlib.h> #include <symbols.h> diff --git a/src/soc/nvidia/tegra124/sdram_lp0.c b/src/soc/nvidia/tegra124/sdram_lp0.c index 731fc61..aade07c 100644 --- a/src/soc/nvidia/tegra124/sdram_lp0.c +++ b/src/soc/nvidia/tegra124/sdram_lp0.c @@ -20,7 +20,6 @@ #include <soc/clk_rst.h> #include <soc/pmc.h> #include <soc/sdram.h> -#include <stdlib.h> /* * This function reads SDRAM parameters (and a few CLK_RST register values) from diff --git a/src/soc/nvidia/tegra124/sor.c b/src/soc/nvidia/tegra124/sor.c index 9188f83..8c03a7e 100644 --- a/src/soc/nvidia/tegra124/sor.c +++ b/src/soc/nvidia/tegra124/sor.c @@ -29,7 +29,6 @@ #include <soc/nvidia/tegra/displayport.h> #include <soc/sor.h> #include <stdint.h> -#include <stdlib.h> #include "chip.h" diff --git a/src/soc/nvidia/tegra124/verstage.c b/src/soc/nvidia/tegra124/verstage.c index 2495351..9899fcb 100644 --- a/src/soc/nvidia/tegra124/verstage.c +++ b/src/soc/nvidia/tegra124/verstage.c @@ -20,7 +20,6 @@ #include <program_loading.h> #include <soc/cache.h> #include <soc/early_configs.h> -#include <stdlib.h> #include <symbols.h> #include <vendorcode/google/chromeos/chromeos.h> diff --git a/src/soc/nvidia/tegra210/clock.c b/src/soc/nvidia/tegra210/clock.c index 55ee50b..236a450 100644 --- a/src/soc/nvidia/tegra210/clock.c +++ b/src/soc/nvidia/tegra210/clock.c @@ -18,7 +18,6 @@ #include <assert.h> #include <console/console.h> #include <delay.h> -#include <stdlib.h> #include <soc/addressmap.h> #include <soc/clk_rst.h> #include <soc/clock.h> diff --git a/src/soc/nvidia/tegra210/dma.c b/src/soc/nvidia/tegra210/dma.c index 03c5e67..bbc5c8f 100644 --- a/src/soc/nvidia/tegra210/dma.c +++ b/src/soc/nvidia/tegra210/dma.c @@ -21,7 +21,6 @@ #include <soc/addressmap.h> #include <soc/dma.h> #include <stddef.h> -#include <stdlib.h> struct apb_dma * const apb_dma = (struct apb_dma *)TEGRA_APB_DMA_BASE; diff --git a/src/soc/nvidia/tegra210/include/soc/clock.h b/src/soc/nvidia/tegra210/include/soc/clock.h index 6d8c338..3694285 100644 --- a/src/soc/nvidia/tegra210/include/soc/clock.h +++ b/src/soc/nvidia/tegra210/include/soc/clock.h @@ -22,7 +22,6 @@ #include <device/mmio.h> #include <soc/clk_rst.h> #include <stdint.h> -#include <stdlib.h> enum { CLK_L_CPU = 0x1 << 0, diff --git a/src/soc/nvidia/tegra210/include/soc/mipi-phy.h b/src/soc/nvidia/tegra210/include/soc/mipi-phy.h index 852c5a3..e9b5797 100644 --- a/src/soc/nvidia/tegra210/include/soc/mipi-phy.h +++ b/src/soc/nvidia/tegra210/include/soc/mipi-phy.h @@ -15,7 +15,6 @@ #ifndef _TEGRA_MIPI_PHY_H #define _TEGRA_MIPI_PHY_H -#include <stdlib.h> /* * Macros for calculating the phy timings diff --git a/src/soc/nvidia/tegra210/mipi-phy.c b/src/soc/nvidia/tegra210/mipi-phy.c index 4e56730..72dd57d 100644 --- a/src/soc/nvidia/tegra210/mipi-phy.c +++ b/src/soc/nvidia/tegra210/mipi-phy.c @@ -13,7 +13,6 @@ * GNU General Public License for more details. */ -#include <stdlib.h> #include <soc/addressmap.h> #include <soc/clock.h> #include <device/device.h> diff --git a/src/soc/nvidia/tegra210/sdram.c b/src/soc/nvidia/tegra210/sdram.c index e1d91fd..c609921 100644 --- a/src/soc/nvidia/tegra210/sdram.c +++ b/src/soc/nvidia/tegra210/sdram.c @@ -23,7 +23,6 @@ #include <soc/mc.h> #include <soc/pmc.h> #include <soc/sdram.h> -#include <stdlib.h> #include <soc/nvidia/tegra/apbmisc.h> static void sdram_patch(uintptr_t addr, uint32_t value) diff --git a/src/soc/nvidia/tegra210/sdram_lp0.c b/src/soc/nvidia/tegra210/sdram_lp0.c index 9eaf5f0..09747ea 100644 --- a/src/soc/nvidia/tegra210/sdram_lp0.c +++ b/src/soc/nvidia/tegra210/sdram_lp0.c @@ -19,7 +19,6 @@ #include <soc/addressmap.h> #include <soc/pmc.h> #include <soc/sdram.h> -#include <stdlib.h> /* * This function reads SDRAM parameters from the common BCT format and diff --git a/src/soc/nvidia/tegra210/sor.c b/src/soc/nvidia/tegra210/sor.c index 3055b29..8caf050 100644 --- a/src/soc/nvidia/tegra210/sor.c +++ b/src/soc/nvidia/tegra210/sor.c @@ -18,7 +18,6 @@ #include <console/console.h> #include <stdint.h> -#include <stdlib.h> #include <delay.h> #include <soc/addressmap.h> #include <device/device.h> diff --git a/src/soc/qualcomm/ipq40xx/i2c.c b/src/soc/qualcomm/ipq40xx/i2c.c index f20dada..7262bb0 100644 --- a/src/soc/qualcomm/ipq40xx/i2c.c +++ b/src/soc/qualcomm/ipq40xx/i2c.c @@ -31,7 +31,6 @@ #include <console/console.h> #include <device/i2c_simple.h> -#include <stdlib.h> #include <string.h> #include <soc/blsp.h> #include <soc/qup.h> diff --git a/src/soc/qualcomm/ipq40xx/qup.c b/src/soc/qualcomm/ipq40xx/qup.c index 438bd14..f708892 100644 --- a/src/soc/qualcomm/ipq40xx/qup.c +++ b/src/soc/qualcomm/ipq40xx/qup.c @@ -33,7 +33,6 @@ #include <console/console.h> #include <delay.h> #include <soc/iomap.h> -#include <stdlib.h> #include <soc/qup.h> #define TIMEOUT_CNT 100 diff --git a/src/soc/qualcomm/ipq40xx/spi.c b/src/soc/qualcomm/ipq40xx/spi.c index b68e1cb..72a5b9d 100644 --- a/src/soc/qualcomm/ipq40xx/spi.c +++ b/src/soc/qualcomm/ipq40xx/spi.c @@ -33,7 +33,7 @@ #include <gpio.h> #include <soc/iomap.h> #include <soc/spi.h> -#include <stdlib.h> +#include <stddef.h> static const struct blsp_spi spi_reg[] = { /* BLSP0 registers for SPI interface */ diff --git a/src/soc/qualcomm/ipq40xx/uart.c b/src/soc/qualcomm/ipq40xx/uart.c index eb3731b..d17a926 100644 --- a/src/soc/qualcomm/ipq40xx/uart.c +++ b/src/soc/qualcomm/ipq40xx/uart.c @@ -37,7 +37,6 @@ #include <soc/blsp.h> #include <soc/ipq_uart.h> #include <stdint.h> -#include <stdlib.h> #define FIFO_DATA_SIZE 4 diff --git a/src/soc/qualcomm/ipq806x/i2c.c b/src/soc/qualcomm/ipq806x/i2c.c index c81373f..652215e 100644 --- a/src/soc/qualcomm/ipq806x/i2c.c +++ b/src/soc/qualcomm/ipq806x/i2c.c @@ -29,7 +29,6 @@ #include <console/console.h> #include <device/i2c_simple.h> -#include <stdlib.h> #include <string.h> #include <soc/gsbi.h> #include <soc/qup.h> diff --git a/src/soc/qualcomm/ipq806x/qup.c b/src/soc/qualcomm/ipq806x/qup.c index 3ceb84d..b9fc95d 100644 --- a/src/soc/qualcomm/ipq806x/qup.c +++ b/src/soc/qualcomm/ipq806x/qup.c @@ -31,7 +31,6 @@ #include <console/console.h> #include <delay.h> #include <soc/iomap.h> -#include <stdlib.h> #include <soc/qup.h> #define TIMEOUT_CNT 100000 diff --git a/src/soc/qualcomm/ipq806x/uart.c b/src/soc/qualcomm/ipq806x/uart.c index 66c3103..e662d59 100644 --- a/src/soc/qualcomm/ipq806x/uart.c +++ b/src/soc/qualcomm/ipq806x/uart.c @@ -40,7 +40,6 @@ #include <soc/gsbi.h> #include <soc/ipq_uart.h> #include <stdint.h> -#include <stdlib.h> #define FIFO_DATA_SIZE 4 diff --git a/src/soc/rockchip/common/gpio.c b/src/soc/rockchip/common/gpio.c index 3d7e161..223ed27 100644 --- a/src/soc/rockchip/common/gpio.c +++ b/src/soc/rockchip/common/gpio.c @@ -19,7 +19,6 @@ #include <soc/gpio.h> #include <soc/grf.h> #include <soc/soc.h> -#include <stdlib.h> #include <types.h> static void gpio_set_dir(gpio_t gpio, enum gpio_dir dir) diff --git a/src/soc/rockchip/common/i2c.c b/src/soc/rockchip/common/i2c.c index e5f5a9a..4df6e0e 100644 --- a/src/soc/rockchip/common/i2c.c +++ b/src/soc/rockchip/common/i2c.c @@ -23,7 +23,6 @@ #include <soc/soc.h> #include <soc/i2c.h> #include <soc/clock.h> -#include <stdlib.h> #define RETRY_COUNT 3 /* 100000us = 100ms */ diff --git a/src/soc/rockchip/common/include/soc/edp.h b/src/soc/rockchip/common/include/soc/edp.h index a9ebbc5..58986d1 100644 --- a/src/soc/rockchip/common/include/soc/edp.h +++ b/src/soc/rockchip/common/include/soc/edp.h @@ -17,7 +17,6 @@ #define __RK_DP_H #include <edid.h> -#include <stdlib.h> struct rk_edp_regs { u8 res0[0x10]; diff --git a/src/soc/rockchip/common/pwm.c b/src/soc/rockchip/common/pwm.c index e5da05e..98ef21f 100644 --- a/src/soc/rockchip/common/pwm.c +++ b/src/soc/rockchip/common/pwm.c @@ -19,7 +19,6 @@ #include <soc/soc.h> #include <soc/pwm.h> #include <soc/clock.h> -#include <stdlib.h> #include <timer.h> struct pwm_ctl { diff --git a/src/soc/rockchip/common/rk808.c b/src/soc/rockchip/common/rk808.c index 58d910c..66a085c 100644 --- a/src/soc/rockchip/common/rk808.c +++ b/src/soc/rockchip/common/rk808.c @@ -21,7 +21,6 @@ #include <rtc.h> #include <soc/rk808.h> #include <stdint.h> -#include <stdlib.h> #if CONFIG_PMIC_BUS < 0 #error "PMIC_BUS must be set in mainboard's Kconfig." diff --git a/src/soc/rockchip/common/vop.c b/src/soc/rockchip/common/vop.c index 9c70b78..f617b4a 100644 --- a/src/soc/rockchip/common/vop.c +++ b/src/soc/rockchip/common/vop.c @@ -14,7 +14,6 @@ */ #include <device/mmio.h> -#include <stdlib.h> #include <stddef.h> #include <soc/addressmap.h> #include <soc/clock.h> diff --git a/src/soc/rockchip/rk3288/clock.c b/src/soc/rockchip/rk3288/clock.c index cee1ee2..6e0c139 100644 --- a/src/soc/rockchip/rk3288/clock.c +++ b/src/soc/rockchip/rk3288/clock.c @@ -24,7 +24,6 @@ #include <soc/i2c.h> #include <soc/soc.h> #include <stdint.h> -#include <stdlib.h> #include <string.h> struct pll_div { diff --git a/src/soc/rockchip/rk3288/display.c b/src/soc/rockchip/rk3288/display.c index 04a5992..a66b2d4 100644 --- a/src/soc/rockchip/rk3288/display.c +++ b/src/soc/rockchip/rk3288/display.c @@ -20,7 +20,6 @@ #include <delay.h> #include <edid.h> #include <gpio.h> -#include <stdlib.h> #include <stddef.h> #include <string.h> #include <soc/addressmap.h> diff --git a/src/soc/rockchip/rk3288/gpio.c b/src/soc/rockchip/rk3288/gpio.c index 0f9d85c..8eeed88 100644 --- a/src/soc/rockchip/rk3288/gpio.c +++ b/src/soc/rockchip/rk3288/gpio.c @@ -18,7 +18,6 @@ #include <soc/grf.h> #include <soc/pmu.h> #include <soc/soc.h> -#include <stdlib.h> struct rockchip_gpio_regs *gpio_port[] = { (struct rockchip_gpio_regs *)0xff750000, diff --git a/src/soc/rockchip/rk3288/hdmi.c b/src/soc/rockchip/rk3288/hdmi.c index b4de270..9616ee8 100644 --- a/src/soc/rockchip/rk3288/hdmi.c +++ b/src/soc/rockchip/rk3288/hdmi.c @@ -24,7 +24,6 @@ #include <delay.h> #include <edid.h> #include <gpio.h> -#include <stdlib.h> #include <stdint.h> #include <soc/addressmap.h> #include <soc/hdmi.h> diff --git a/src/soc/rockchip/rk3288/include/soc/hdmi.h b/src/soc/rockchip/rk3288/include/soc/hdmi.h index fb20b4a..3089949 100644 --- a/src/soc/rockchip/rk3288/include/soc/hdmi.h +++ b/src/soc/rockchip/rk3288/include/soc/hdmi.h @@ -19,7 +19,6 @@ #define __SOC_HDMI_H__ #include <types.h> -#include <stdlib.h> #define HDMI_EDID_BLOCK_SIZE 128 diff --git a/src/soc/rockchip/rk3288/soc.c b/src/soc/rockchip/rk3288/soc.c index bda9553..31c9998 100644 --- a/src/soc/rockchip/rk3288/soc.c +++ b/src/soc/rockchip/rk3288/soc.c @@ -22,7 +22,6 @@ #include <soc/soc.h> #include <soc/sdram.h> #include <stddef.h> -#include <stdlib.h> #include <symbols.h> #include "chip.h" diff --git a/src/soc/rockchip/rk3288/tsadc.c b/src/soc/rockchip/rk3288/tsadc.c index 3223a4d..7e5823c 100644 --- a/src/soc/rockchip/rk3288/tsadc.c +++ b/src/soc/rockchip/rk3288/tsadc.c @@ -19,7 +19,6 @@ #include <soc/pmu.h> #include <soc/tsadc.h> #include <stdint.h> -#include <stdlib.h> struct rk3288_tsadc_regs { u32 user_con; diff --git a/src/soc/rockchip/rk3399/clock.c b/src/soc/rockchip/rk3399/clock.c index 5252232..9364ecf 100644 --- a/src/soc/rockchip/rk3399/clock.c +++ b/src/soc/rockchip/rk3399/clock.c @@ -23,7 +23,6 @@ #include <soc/i2c.h> #include <soc/soc.h> #include <stdint.h> -#include <stdlib.h> #include <string.h> struct pll_div { diff --git a/src/soc/rockchip/rk3399/display.c b/src/soc/rockchip/rk3399/display.c index e2e9f7d..9cd4053 100644 --- a/src/soc/rockchip/rk3399/display.c +++ b/src/soc/rockchip/rk3399/display.c @@ -21,7 +21,6 @@ #include <delay.h> #include <edid.h> #include <gpio.h> -#include <stdlib.h> #include <stddef.h> #include <soc/addressmap.h> #include <soc/clock.h> diff --git a/src/soc/rockchip/rk3399/gpio.c b/src/soc/rockchip/rk3399/gpio.c index 7fe2c19..9a01abc 100644 --- a/src/soc/rockchip/rk3399/gpio.c +++ b/src/soc/rockchip/rk3399/gpio.c @@ -18,7 +18,6 @@ #include <soc/gpio.h> #include <soc/grf.h> #include <soc/soc.h> -#include <stdlib.h> struct rockchip_gpio_regs *gpio_port[] = { (struct rockchip_gpio_regs *)GPIO0_BASE, diff --git a/src/soc/rockchip/rk3399/include/soc/mipi.h b/src/soc/rockchip/rk3399/include/soc/mipi.h index 43ab7b9..469a052 100644 --- a/src/soc/rockchip/rk3399/include/soc/mipi.h +++ b/src/soc/rockchip/rk3399/include/soc/mipi.h @@ -16,7 +16,6 @@ #ifndef __RK_MIPI_H #define __RK_MIPI_H -#include <stdlib.h> #include <types.h> struct rk_mipi_regs { diff --git a/src/soc/rockchip/rk3399/mipi.c b/src/soc/rockchip/rk3399/mipi.c index 1f3f02c..aebc90f 100644 --- a/src/soc/rockchip/rk3399/mipi.c +++ b/src/soc/rockchip/rk3399/mipi.c @@ -19,7 +19,6 @@ #include <device/device.h> #include <edid.h> #include <gpio.h> -#include <stdlib.h> #include <string.h> #include <soc/addressmap.h> #include <soc/clock.h> diff --git a/src/soc/rockchip/rk3399/saradc.c b/src/soc/rockchip/rk3399/saradc.c index 3c6cbe6..8dd3cb4 100644 --- a/src/soc/rockchip/rk3399/saradc.c +++ b/src/soc/rockchip/rk3399/saradc.c @@ -20,7 +20,6 @@ #include <soc/clock.h> #include <soc/saradc.h> #include <stdint.h> -#include <stdlib.h> #include <timer.h> struct rk3399_saradc_regs { diff --git a/src/soc/rockchip/rk3399/soc.c b/src/soc/rockchip/rk3399/soc.c index 3f3ff97..807a7bc 100644 --- a/src/soc/rockchip/rk3399/soc.c +++ b/src/soc/rockchip/rk3399/soc.c @@ -23,7 +23,6 @@ #include <soc/sdram.h> #include <soc/symbols.h> #include <stddef.h> -#include <stdlib.h> #include <symbols.h> void bootmem_platform_add_ranges(void) diff --git a/src/soc/rockchip/rk3399/tsadc.c b/src/soc/rockchip/rk3399/tsadc.c index 7ec24648..b81aa93 100644 --- a/src/soc/rockchip/rk3399/tsadc.c +++ b/src/soc/rockchip/rk3399/tsadc.c @@ -19,7 +19,6 @@ #include <soc/grf.h> #include <soc/tsadc.h> #include <stdint.h> -#include <stdlib.h> struct rk3399_tsadc_regs { u32 user_con; diff --git a/src/soc/samsung/exynos5250/alternate_cbfs.c b/src/soc/samsung/exynos5250/alternate_cbfs.c index e431672..5fb69c9 100644 --- a/src/soc/samsung/exynos5250/alternate_cbfs.c +++ b/src/soc/samsung/exynos5250/alternate_cbfs.c @@ -18,7 +18,6 @@ #include <soc/alternate_cbfs.h> #include <soc/power.h> #include <soc/spi.h> -#include <stdlib.h> #include <symbols.h> /* This allows USB A-A firmware upload from a compatible host in four parts: diff --git a/src/soc/samsung/exynos5250/clock.c b/src/soc/samsung/exynos5250/clock.c index 7e7fe97..1006a98 100644 --- a/src/soc/samsung/exynos5250/clock.c +++ b/src/soc/samsung/exynos5250/clock.c @@ -18,7 +18,6 @@ #include <console/console.h> #include <soc/clk.h> #include <soc/periph.h> -#include <stdlib.h> #include <timer.h> /* input clock of PLL: SMDK5250 has 24MHz input clock */ diff --git a/src/soc/samsung/exynos5250/cpu.c b/src/soc/samsung/exynos5250/cpu.c index f00351e..5f99899 100644 --- a/src/soc/samsung/exynos5250/cpu.c +++ b/src/soc/samsung/exynos5250/cpu.c @@ -23,7 +23,6 @@ #include <soc/dp-core.h> #include <soc/fimd.h> #include <stddef.h> -#include <stdlib.h> #include <string.h> #include "chip.h" diff --git a/src/soc/samsung/exynos5250/fb.c b/src/soc/samsung/exynos5250/fb.c index 64980a1..8181c29 100644 --- a/src/soc/samsung/exynos5250/fb.c +++ b/src/soc/samsung/exynos5250/fb.c @@ -25,7 +25,6 @@ #include <soc/i2c.h> #include <soc/power.h> #include <soc/sysreg.h> -#include <stdlib.h> #include <timer.h> /* diff --git a/src/soc/samsung/exynos5420/alternate_cbfs.c b/src/soc/samsung/exynos5420/alternate_cbfs.c index ba3f9a3..93a4d3f 100644 --- a/src/soc/samsung/exynos5420/alternate_cbfs.c +++ b/src/soc/samsung/exynos5420/alternate_cbfs.c @@ -19,7 +19,6 @@ #include <soc/alternate_cbfs.h> #include <soc/power.h> #include <soc/spi.h> -#include <stdlib.h> #include <symbols.h> /* This allows USB A-A firmware upload from a compatible host in four parts: diff --git a/src/soc/samsung/exynos5420/clock.c b/src/soc/samsung/exynos5420/clock.c index 720506c..5a7467c 100644 --- a/src/soc/samsung/exynos5420/clock.c +++ b/src/soc/samsung/exynos5420/clock.c @@ -18,7 +18,6 @@ #include <console/console.h> #include <soc/clk.h> #include <soc/periph.h> -#include <stdlib.h> #include <timer.h> /* input clock of PLL: SMDK5420 has 24MHz input clock */ diff --git a/src/soc/samsung/exynos5420/cpu.c b/src/soc/samsung/exynos5420/cpu.c index 55b0512..375b370 100644 --- a/src/soc/samsung/exynos5420/cpu.c +++ b/src/soc/samsung/exynos5420/cpu.c @@ -24,7 +24,6 @@ #include <soc/cpu.h> #include <soc/clk.h> #include <stddef.h> -#include <stdlib.h> #include <string.h> #include "chip.h" diff --git a/src/soc/samsung/exynos5420/dp.c b/src/soc/samsung/exynos5420/dp.c index 5ad3dd3..c48ea8c 100644 --- a/src/soc/samsung/exynos5420/dp.c +++ b/src/soc/samsung/exynos5420/dp.c @@ -21,7 +21,6 @@ #include <soc/i2c.h> #include <soc/power.h> #include <soc/sysreg.h> -#include <stdlib.h> #include <string.h> /* diff --git a/src/soc/samsung/exynos5420/dp_lowlevel.c b/src/soc/samsung/exynos5420/dp_lowlevel.c index 164704b..df579b0 100644 --- a/src/soc/samsung/exynos5420/dp_lowlevel.c +++ b/src/soc/samsung/exynos5420/dp_lowlevel.c @@ -22,7 +22,6 @@ #include <soc/i2c.h> #include <soc/power.h> #include <soc/sysreg.h> -#include <stdlib.h> /* FIXME: I think the DP controller shouldn't be hardcoded here... */ static struct exynos_dp * const dp_regs = (void *)EXYNOS5_DP1_BASE; diff --git a/src/soc/samsung/exynos5420/pinmux.c b/src/soc/samsung/exynos5420/pinmux.c index 999afa0..347c669 100644 --- a/src/soc/samsung/exynos5420/pinmux.c +++ b/src/soc/samsung/exynos5420/pinmux.c @@ -15,7 +15,6 @@ #include <soc/gpio.h> #include <soc/pinmux.h> -#include <stdlib.h> static void exynos_pinmux_uart(int start, int count) { diff --git a/src/soc/samsung/exynos5420/smp.c b/src/soc/samsung/exynos5420/smp.c index 5e16063..27c0fa6 100644 --- a/src/soc/samsung/exynos5420/smp.c +++ b/src/soc/samsung/exynos5420/smp.c @@ -18,7 +18,6 @@ #include <device/mmio.h> #include <soc/cpu.h> #include <soc/power.h> -#include <stdlib.h> #include <string.h> #include <types.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/32828 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I46f60f8631601db1e2e654d638560d640bbcf403 Gerrit-Change-Number: 32828 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: David Guckian <david.guckian(a)intel.com> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Huang Jin <huang.jin(a)intel.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Vanny E <vanessa.f.eusebio(a)intel.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: mainboard/asus: remove stdlib.h when unused
by HAOUAS Elyes (Code Review) 28 Nov '19

28 Nov '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33890 Change subject: mainboard/asus: remove stdlib.h when unused ...................................................................... mainboard/asus: remove stdlib.h when unused Change-Id: I5f0d6ed989fbaf3905680ba2661b167f845e5225 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/asus/am1i-a/BiosCallOuts.c M src/mainboard/asus/am1i-a/buildOpts.c M src/mainboard/asus/f2a85-m/BiosCallOuts.c M src/mainboard/asus/f2a85-m/buildOpts.c M src/mainboard/asus/kcma-d8/get_bus_conf.c M src/mainboard/asus/kfsn4-dre/get_bus_conf.c M src/mainboard/asus/kgpe-d16/get_bus_conf.c M src/mainboard/asus/m4a78-em/get_bus_conf.c M src/mainboard/asus/m4a785-m/get_bus_conf.c M src/mainboard/asus/m5a88-v/get_bus_conf.c 10 files changed, 0 insertions(+), 12 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/33890/1 diff --git a/src/mainboard/asus/am1i-a/BiosCallOuts.c b/src/mainboard/asus/am1i-a/BiosCallOuts.c index ce54741..5e54ac9 100644 --- a/src/mainboard/asus/am1i-a/BiosCallOuts.c +++ b/src/mainboard/asus/am1i-a/BiosCallOuts.c @@ -21,7 +21,6 @@ #include <northbridge/amd/agesa/BiosCallOuts.h> #include <northbridge/amd/agesa/state_machine.h> #include <FchPlatform.h> -#include <stdlib.h> #include <pc80/mc146818rtc.h> #include <types.h> diff --git a/src/mainboard/asus/am1i-a/buildOpts.c b/src/mainboard/asus/am1i-a/buildOpts.c index 30c0699..74216f0 100644 --- a/src/mainboard/asus/am1i-a/buildOpts.c +++ b/src/mainboard/asus/am1i-a/buildOpts.c @@ -25,7 +25,6 @@ * */ -#include <stdlib.h> #include <AGESA.h> #define INSTALL_FT3_SOCKET_SUPPORT TRUE diff --git a/src/mainboard/asus/f2a85-m/BiosCallOuts.c b/src/mainboard/asus/f2a85-m/BiosCallOuts.c index 9e60ca7..15ce47e 100644 --- a/src/mainboard/asus/f2a85-m/BiosCallOuts.c +++ b/src/mainboard/asus/f2a85-m/BiosCallOuts.c @@ -18,7 +18,6 @@ #include <northbridge/amd/agesa/state_machine.h> #include <vendorcode/amd/agesa/f15tn/Proc/Fch/FchPlatform.h> -#include <stdlib.h> const BIOS_CALLOUT_STRUCT BiosCallouts[] = { diff --git a/src/mainboard/asus/f2a85-m/buildOpts.c b/src/mainboard/asus/f2a85-m/buildOpts.c index dc20dc7..8a1391d 100644 --- a/src/mainboard/asus/f2a85-m/buildOpts.c +++ b/src/mainboard/asus/f2a85-m/buildOpts.c @@ -25,7 +25,6 @@ * */ -#include <stdlib.h> #include <vendorcode/amd/agesa/f15tn/AGESA.h> diff --git a/src/mainboard/asus/kcma-d8/get_bus_conf.c b/src/mainboard/asus/kcma-d8/get_bus_conf.c index cc64dea..8fd10a1 100644 --- a/src/mainboard/asus/kcma-d8/get_bus_conf.c +++ b/src/mainboard/asus/kcma-d8/get_bus_conf.c @@ -16,7 +16,6 @@ #include <device/pci.h> #include <stdint.h> -#include <stdlib.h> #include <cpu/amd/multicore.h> #include <cpu/amd/amdfam10_sysconf.h> diff --git a/src/mainboard/asus/kfsn4-dre/get_bus_conf.c b/src/mainboard/asus/kfsn4-dre/get_bus_conf.c index dd7ebc9..ea32741 100644 --- a/src/mainboard/asus/kfsn4-dre/get_bus_conf.c +++ b/src/mainboard/asus/kfsn4-dre/get_bus_conf.c @@ -22,7 +22,6 @@ #include <device/pci.h> #include <device/pci_ops.h> #include <stdint.h> -#include <stdlib.h> #include <cpu/amd/multicore.h> #include <cpu/amd/amdfam10_sysconf.h> diff --git a/src/mainboard/asus/kgpe-d16/get_bus_conf.c b/src/mainboard/asus/kgpe-d16/get_bus_conf.c index 81d0fc1..e1e07df 100644 --- a/src/mainboard/asus/kgpe-d16/get_bus_conf.c +++ b/src/mainboard/asus/kgpe-d16/get_bus_conf.c @@ -16,7 +16,6 @@ #include <device/pci.h> #include <stdint.h> -#include <stdlib.h> #include <cpu/amd/multicore.h> #include <cpu/amd/amdfam10_sysconf.h> diff --git a/src/mainboard/asus/m4a78-em/get_bus_conf.c b/src/mainboard/asus/m4a78-em/get_bus_conf.c index ee2a6ca..77d55a8 100644 --- a/src/mainboard/asus/m4a78-em/get_bus_conf.c +++ b/src/mainboard/asus/m4a78-em/get_bus_conf.c @@ -15,9 +15,7 @@ #include <device/pci.h> #include <stdint.h> -#include <stdlib.h> #include <cpu/amd/multicore.h> - #include <cpu/amd/amdfam10_sysconf.h> /* Global variables for MB layouts and these will be shared by irqtable mptable diff --git a/src/mainboard/asus/m4a785-m/get_bus_conf.c b/src/mainboard/asus/m4a785-m/get_bus_conf.c index ee2a6ca..77d55a8 100644 --- a/src/mainboard/asus/m4a785-m/get_bus_conf.c +++ b/src/mainboard/asus/m4a785-m/get_bus_conf.c @@ -15,9 +15,7 @@ #include <device/pci.h> #include <stdint.h> -#include <stdlib.h> #include <cpu/amd/multicore.h> - #include <cpu/amd/amdfam10_sysconf.h> /* Global variables for MB layouts and these will be shared by irqtable mptable diff --git a/src/mainboard/asus/m5a88-v/get_bus_conf.c b/src/mainboard/asus/m5a88-v/get_bus_conf.c index 6b5ae68..7aca540 100644 --- a/src/mainboard/asus/m5a88-v/get_bus_conf.c +++ b/src/mainboard/asus/m5a88-v/get_bus_conf.c @@ -15,7 +15,6 @@ #include <device/pci.h> #include <stdint.h> -#include <stdlib.h> #include <cpu/amd/multicore.h> #include <cpu/amd/amdfam10_sysconf.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/33890 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5f0d6ed989fbaf3905680ba2661b167f845e5225 Gerrit-Change-Number: 33890 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: mainboard/hp: remove stdlib.h when unused
by HAOUAS Elyes (Code Review) 28 Nov '19

28 Nov '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33894 Change subject: mainboard/hp: remove stdlib.h when unused ...................................................................... mainboard/hp: remove stdlib.h when unused Change-Id: Ie0a65b6a631aa9158fa7f432b5cd7967a518fa11 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/hp/abm/BiosCallOuts.c M src/mainboard/hp/abm/buildOpts.c M src/mainboard/hp/dl165_g6_fam10/get_bus_conf.c M src/mainboard/hp/pavilion_m6_1035dx/BiosCallOuts.c M src/mainboard/hp/pavilion_m6_1035dx/buildOpts.c 5 files changed, 0 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/33894/1 diff --git a/src/mainboard/hp/abm/BiosCallOuts.c b/src/mainboard/hp/abm/BiosCallOuts.c index 4728c59..df0cb34 100644 --- a/src/mainboard/hp/abm/BiosCallOuts.c +++ b/src/mainboard/hp/abm/BiosCallOuts.c @@ -18,7 +18,6 @@ #include <northbridge/amd/agesa/BiosCallOuts.h> #include <northbridge/amd/agesa/state_machine.h> #include <FchPlatform.h> -#include <stdlib.h> const BIOS_CALLOUT_STRUCT BiosCallouts[] = { diff --git a/src/mainboard/hp/abm/buildOpts.c b/src/mainboard/hp/abm/buildOpts.c index bc1b172..f965d0d 100644 --- a/src/mainboard/hp/abm/buildOpts.c +++ b/src/mainboard/hp/abm/buildOpts.c @@ -30,7 +30,6 @@ * @e \$Revision: 23714 $ @e \$Date: 2009-12-09 17:28:37 -0600 (Wed, 09 Dec 2009) $ */ -#include <stdlib.h> #include <AGESA.h> #define INSTALL_FT3_SOCKET_SUPPORT TRUE diff --git a/src/mainboard/hp/dl165_g6_fam10/get_bus_conf.c b/src/mainboard/hp/dl165_g6_fam10/get_bus_conf.c index e217aa7..c159c19 100644 --- a/src/mainboard/hp/dl165_g6_fam10/get_bus_conf.c +++ b/src/mainboard/hp/dl165_g6_fam10/get_bus_conf.c @@ -21,10 +21,8 @@ #include <string.h> #include <stdint.h> #include <cpu/amd/multicore.h> - #include <cpu/amd/amdfam10_sysconf.h> -#include <stdlib.h> #include "mb_sysconf.h" // Global variables for MB layouts and these will be shared by irqtable mptable and acpi_tables diff --git a/src/mainboard/hp/pavilion_m6_1035dx/BiosCallOuts.c b/src/mainboard/hp/pavilion_m6_1035dx/BiosCallOuts.c index 2b1ac04..afa2fce 100644 --- a/src/mainboard/hp/pavilion_m6_1035dx/BiosCallOuts.c +++ b/src/mainboard/hp/pavilion_m6_1035dx/BiosCallOuts.c @@ -16,10 +16,8 @@ #include <AGESA.h> #include <northbridge/amd/agesa/BiosCallOuts.h> #include <northbridge/amd/agesa/state_machine.h> - #include <southbridge/amd/agesa/hudson/imc.h> #include <vendorcode/amd/agesa/f15tn/Proc/Fch/FchPlatform.h> -#include <stdlib.h> const BIOS_CALLOUT_STRUCT BiosCallouts[] = { diff --git a/src/mainboard/hp/pavilion_m6_1035dx/buildOpts.c b/src/mainboard/hp/pavilion_m6_1035dx/buildOpts.c index c6d62ed..e56d513 100644 --- a/src/mainboard/hp/pavilion_m6_1035dx/buildOpts.c +++ b/src/mainboard/hp/pavilion_m6_1035dx/buildOpts.c @@ -27,7 +27,6 @@ #include "mainboard.h" -#include <stdlib.h> #include <vendorcode/amd/agesa/f15tn/AGESA.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/33894 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie0a65b6a631aa9158fa7f432b5cd7967a518fa11 Gerrit-Change-Number: 33894 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: mainboard/jetway: remove stdlib.h when unused
by HAOUAS Elyes (Code Review) 28 Nov '19

28 Nov '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33896 Change subject: mainboard/jetway: remove stdlib.h when unused ...................................................................... mainboard/jetway: remove stdlib.h when unused Change-Id: I8e3e8071f9b46ea6857b906a442b5e7a668f5188 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/jetway/nf81-t56n-lf/BiosCallOuts.c M src/mainboard/jetway/nf81-t56n-lf/buildOpts.c M src/mainboard/jetway/pa78vm5/get_bus_conf.c 3 files changed, 0 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/96/33896/1 diff --git a/src/mainboard/jetway/nf81-t56n-lf/BiosCallOuts.c b/src/mainboard/jetway/nf81-t56n-lf/BiosCallOuts.c index 86999fb..d71e5d8 100644 --- a/src/mainboard/jetway/nf81-t56n-lf/BiosCallOuts.c +++ b/src/mainboard/jetway/nf81-t56n-lf/BiosCallOuts.c @@ -15,11 +15,9 @@ #include <AGESA.h> #include <northbridge/amd/agesa/BiosCallOuts.h> - #include <amdlib.h> #include <vendorcode/amd/cimx/sb800/SB800.h> #include <stdint.h> -#include <stdlib.h> static AGESA_STATUS board_GnbPcieSlotReset (UINT32 Func, UINTN Data, VOID *ConfigPtr); static AGESA_STATUS board_BeforeDramInit (UINT32 Func, UINTN Data, VOID *ConfigPtr); diff --git a/src/mainboard/jetway/nf81-t56n-lf/buildOpts.c b/src/mainboard/jetway/nf81-t56n-lf/buildOpts.c index 65986e2..1ad822a 100644 --- a/src/mainboard/jetway/nf81-t56n-lf/buildOpts.c +++ b/src/mainboard/jetway/nf81-t56n-lf/buildOpts.c @@ -25,8 +25,6 @@ * */ -#include <stdlib.h> - #include <vendorcode/amd/agesa/f14/AGESA.h> /* Include the files that instantiate the configuration definitions. */ @@ -41,7 +39,6 @@ #include <vendorcode/amd/agesa/f14/Proc/Mem/mm.h> #include <vendorcode/amd/agesa/f14/Proc/Mem/mn.h> - /* Select the CPU family. */ #define INSTALL_FAMILY_10_SUPPORT FALSE #define INSTALL_FAMILY_12_SUPPORT FALSE diff --git a/src/mainboard/jetway/pa78vm5/get_bus_conf.c b/src/mainboard/jetway/pa78vm5/get_bus_conf.c index ee2a6ca..77d55a8 100644 --- a/src/mainboard/jetway/pa78vm5/get_bus_conf.c +++ b/src/mainboard/jetway/pa78vm5/get_bus_conf.c @@ -15,9 +15,7 @@ #include <device/pci.h> #include <stdint.h> -#include <stdlib.h> #include <cpu/amd/multicore.h> - #include <cpu/amd/amdfam10_sysconf.h> /* Global variables for MB layouts and these will be shared by irqtable mptable -- To view, visit https://review.coreboot.org/c/coreboot/+/33896 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8e3e8071f9b46ea6857b906a442b5e7a668f5188 Gerrit-Change-Number: 33896 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: src/lib: Use 'include <stdlib.h>' when appropriate
by HAOUAS Elyes (Code Review) 28 Nov '19

28 Nov '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33692 Change subject: src/lib: Use 'include <stdlib.h>' when appropriate ...................................................................... src/lib: Use 'include <stdlib.h>' when appropriate Change-Id: I364bbb31e95958df2ac8188ba5618f4f1c3427a4 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/lib/bootmem.c M src/lib/cbfs.c M src/lib/fit.c M src/lib/fit_payload.c M src/lib/imd.c M src/lib/imd_cbmem.c M src/lib/prog_loaders.c M src/lib/rmodule.c M src/lib/selfboot.c 9 files changed, 10 insertions(+), 9 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/33692/1 diff --git a/src/lib/bootmem.c b/src/lib/bootmem.c index 01ad3e8..61253cf 100644 --- a/src/lib/bootmem.c +++ b/src/lib/bootmem.c @@ -19,7 +19,7 @@ #include <bootmem.h> #include <cbmem.h> #include <device/resource.h> -#include <stdlib.h> +#include <stddef.h> #include <symbols.h> #include <assert.h> diff --git a/src/lib/cbfs.c b/src/lib/cbfs.c index 91368fb..001d80f 100644 --- a/src/lib/cbfs.c +++ b/src/lib/cbfs.c @@ -17,12 +17,13 @@ #include <assert.h> #include <console/console.h> #include <string.h> -#include <stdlib.h> #include <boot_device.h> #include <cbfs.h> #include <commonlib/compression.h> #include <endian.h> #include <lib.h> +#include <stddef.h> +#include <stdint.h> #include <symbols.h> #include <timestamp.h> #include <fmap.h> diff --git a/src/lib/fit.c b/src/lib/fit.c index 045f52f..77bd766 100644 --- a/src/lib/fit.c +++ b/src/lib/fit.c @@ -20,7 +20,7 @@ #include <endian.h> #include <stdint.h> #include <bootmem.h> -#include <stdlib.h> +#include <stddef.h> #include <string.h> #include <program_loading.h> #include <memrange.h> diff --git a/src/lib/fit_payload.c b/src/lib/fit_payload.c index 8e75915..1cf5ed8 100644 --- a/src/lib/fit_payload.c +++ b/src/lib/fit_payload.c @@ -19,10 +19,10 @@ #include <bootmem.h> #include <cbmem.h> #include <device/resource.h> -#include <stdlib.h> #include <commonlib/region.h> #include <fit.h> #include <program_loading.h> +#include <stddef.h> #include <timestamp.h> #include <string.h> #include <commonlib/cbfs_serialized.h> diff --git a/src/lib/imd.c b/src/lib/imd.c index 17ec2d9..de91f2a 100644 --- a/src/lib/imd.c +++ b/src/lib/imd.c @@ -17,7 +17,7 @@ #include <cbmem.h> #include <console/console.h> #include <imd.h> -#include <stdlib.h> +#include <stddef.h> #include <string.h> /* For more details on implementation and usage please see the imd.h header. */ diff --git a/src/lib/imd_cbmem.c b/src/lib/imd_cbmem.c index 1a67ad5..6ec2150 100644 --- a/src/lib/imd_cbmem.c +++ b/src/lib/imd_cbmem.c @@ -19,8 +19,8 @@ #include <cbmem.h> #include <imd.h> #include <lib.h> -#include <stdlib.h> #include <arch/early_variables.h> +#include <stddef.h> /* * We need special handling on x86 where CAR global migration is employed. One diff --git a/src/lib/prog_loaders.c b/src/lib/prog_loaders.c index 81ec2ec..b39d016 100644 --- a/src/lib/prog_loaders.c +++ b/src/lib/prog_loaders.c @@ -14,7 +14,6 @@ */ -#include <stdlib.h> #include <cbfs.h> #include <cbmem.h> #include <console/console.h> @@ -26,6 +25,7 @@ #include <romstage_handoff.h> #include <rmodule.h> #include <stage_cache.h> +#include <stddef.h> #include <symbols.h> #include <timestamp.h> #include <fit_payload.h> diff --git a/src/lib/rmodule.c b/src/lib/rmodule.c index 56529d2..a34bac7 100644 --- a/src/lib/rmodule.c +++ b/src/lib/rmodule.c @@ -15,8 +15,8 @@ #include <assert.h> #include <cbmem.h> #include <cbfs.h> +#include <stddef.h> #include <stdint.h> -#include <stdlib.h> #include <string.h> #include <console/console.h> #include <program_loading.h> diff --git a/src/lib/selfboot.c b/src/lib/selfboot.c index a0bb711..2d64634 100644 --- a/src/lib/selfboot.c +++ b/src/lib/selfboot.c @@ -18,8 +18,8 @@ #include <commonlib/compression.h> #include <commonlib/endian.h> #include <console/console.h> +#include <stddef.h> #include <stdint.h> -#include <stdlib.h> #include <string.h> #include <symbols.h> #include <cbfs.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/33692 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I364bbb31e95958df2ac8188ba5618f4f1c3427a4 Gerrit-Change-Number: 33692 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: src/ec: Use 'include <stdlib.h>' when appropriate
by HAOUAS Elyes (Code Review) 28 Nov '19

28 Nov '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/33693 Change subject: src/ec: Use 'include <stdlib.h>' when appropriate ...................................................................... src/ec: Use 'include <stdlib.h>' when appropriate Change-Id: I416f017b973ab4968a1d7028d741ee7054062a70 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/ec/google/chromeec/ec_lpc.c M src/ec/google/chromeec/vstore.c M src/ec/google/wilco/chip.c 3 files changed, 3 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/33693/1 diff --git a/src/ec/google/chromeec/ec_lpc.c b/src/ec/google/chromeec/ec_lpc.c index b7d183e..28b9797 100644 --- a/src/ec/google/chromeec/ec_lpc.c +++ b/src/ec/google/chromeec/ec_lpc.c @@ -19,8 +19,8 @@ #include <delay.h> #include <device/pnp.h> #include <ec/google/common/mec.h> +#include <stddef.h> #include <stdint.h> -#include <stdlib.h> #include "chip.h" #include "ec.h" diff --git a/src/ec/google/chromeec/vstore.c b/src/ec/google/chromeec/vstore.c index 28c2603..d1f90b1 100644 --- a/src/ec/google/chromeec/vstore.c +++ b/src/ec/google/chromeec/vstore.c @@ -13,9 +13,9 @@ * GNU General Public License for more details. */ +#include <stddef.h> #include <stdint.h> #include <string.h> -#include <stdlib.h> #include "ec.h" #include "ec_commands.h" diff --git a/src/ec/google/wilco/chip.c b/src/ec/google/wilco/chip.c index 09211f8..d27a3a7 100644 --- a/src/ec/google/wilco/chip.c +++ b/src/ec/google/wilco/chip.c @@ -21,8 +21,8 @@ #include <device/pnp.h> #include <ec/acpi/ec.h> #include <pc80/keyboard.h> +#include <stddef.h> #include <stdint.h> -#include <stdlib.h> #include "commands.h" #include "ec.h" -- To view, visit https://review.coreboot.org/c/coreboot/+/33693 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I416f017b973ab4968a1d7028d741ee7054062a70 Gerrit-Change-Number: 33693 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: {gm45,pineview,x4x}: Remove redundant use of ACPI offset operator
by HAOUAS Elyes (Code Review) 28 Nov '19

28 Nov '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/32586 Change subject: {gm45,pineview,x4x}: Remove redundant use of ACPI offset operator ...................................................................... {gm45,pineview,x4x}: Remove redundant use of ACPI offset operator Change-Id: Ie7a9df2275d9e02bc2793064903228c8cac4d17f Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/northbridge/intel/gm45/acpi/hostbridge.asl M src/northbridge/intel/pineview/acpi/hostbridge.asl M src/northbridge/intel/x4x/acpi/hostbridge.asl 3 files changed, 18 insertions(+), 18 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/32586/1 diff --git a/src/northbridge/intel/gm45/acpi/hostbridge.asl b/src/northbridge/intel/gm45/acpi/hostbridge.asl index afa7a61..624ca99 100644 --- a/src/northbridge/intel/gm45/acpi/hostbridge.asl +++ b/src/northbridge/intel/gm45/acpi/hostbridge.asl @@ -56,32 +56,32 @@ , 4, PM0H, 2, , 2, - Offset (0x91), // PAM1 + // PAM1 PM1L, 2, , 2, PM1H, 2, , 2, - Offset (0x92), // PAM2 + // PAM2 PM2L, 2, , 2, PM2H, 2, , 2, - Offset (0x93), // PAM3 + // PAM3 PM3L, 2, , 2, PM3H, 2, , 2, - Offset (0x94), // PAM4 + // PAM4 PM4L, 2, , 2, PM4H, 2, , 2, - Offset (0x95), // PAM5 + // PAM5 PM5L, 2, , 2, PM5H, 2, , 2, - Offset (0x96), // PAM6 + // PAM6 PM6L, 2, , 2, PM6H, 2, diff --git a/src/northbridge/intel/pineview/acpi/hostbridge.asl b/src/northbridge/intel/pineview/acpi/hostbridge.asl index 3eff101..5fe1453 100644 --- a/src/northbridge/intel/pineview/acpi/hostbridge.asl +++ b/src/northbridge/intel/pineview/acpi/hostbridge.asl @@ -56,32 +56,32 @@ , 4, PM0H, 2, , 2, - Offset (0x91), /* PAM1 */ + /* PAM1 */ PM1L, 2, , 2, PM1H, 2, , 2, - Offset (0x92), /* PAM2 */ + /* PAM2 */ PM2L, 2, , 2, PM2H, 2, , 2, - Offset (0x93), /* PAM3 */ + /* PAM3 */ PM3L, 2, , 2, PM3H, 2, , 2, - Offset (0x94), /* PAM4 */ + /* PAM4 */ PM4L, 2, , 2, PM4H, 2, , 2, - Offset (0x95), /* PAM5 */ + /* PAM5 */ PM5L, 2, , 2, PM5H, 2, , 2, - Offset (0x96), /* PAM6 */ + /* PAM6 */ PM6L, 2, , 2, PM6H, 2, diff --git a/src/northbridge/intel/x4x/acpi/hostbridge.asl b/src/northbridge/intel/x4x/acpi/hostbridge.asl index 90f15c7..1e43511 100644 --- a/src/northbridge/intel/x4x/acpi/hostbridge.asl +++ b/src/northbridge/intel/x4x/acpi/hostbridge.asl @@ -57,32 +57,32 @@ , 4, PM0H, 2, , 2, - Offset (0x91), // PAM1 + // PAM1 PM1L, 2, , 2, PM1H, 2, , 2, - Offset (0x92), // PAM2 + // PAM2 PM2L, 2, , 2, PM2H, 2, , 2, - Offset (0x93), // PAM3 + // PAM3 PM3L, 2, , 2, PM3H, 2, , 2, - Offset (0x94), // PAM4 + // PAM4 PM4L, 2, , 2, PM4H, 2, , 2, - Offset (0x95), // PAM5 + // PAM5 PM5L, 2, , 2, PM5H, 2, , 2, - Offset (0x96), // PAM6 + // PAM6 PM6L, 2, , 2, PM6H, 2, -- To view, visit https://review.coreboot.org/c/coreboot/+/32586 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie7a9df2275d9e02bc2793064903228c8cac4d17f Gerrit-Change-Number: 32586 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/intel/tigerlake: select correct chipset based on soc Kconfig
by Maulik V Vaghela (Code Review) 28 Nov '19

28 Nov '19

Maulik V Vaghela has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37273 ) Change subject: soc/intel/tigerlake: select correct chipset based on soc Kconfig ...................................................................... soc/intel/tigerlake: select correct chipset based on soc Kconfig Since we accomodate both Tigerlake and Jasperlake soc in single folder, we need to select IFD chipset correctly based on soc. Change-Id: I73cfe4f583da3a28c3b29d29a93ff62097130e27 Signed-off-by: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> --- M src/soc/intel/tigerlake/Kconfig 1 file changed, 2 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/37273/1 diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig index 01ce7d8..5c17b208 100644 --- a/src/soc/intel/tigerlake/Kconfig +++ b/src/soc/intel/tigerlake/Kconfig @@ -96,7 +96,8 @@ config IFD_CHIPSET string - default "tgl" + default "tgl" if SOC_INTEL_TIGERLAKE + default "jsl" if SOC_INTEL_JASPERLAKE config IED_REGION_SIZE hex -- To view, visit https://review.coreboot.org/c/coreboot/+/37273 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I73cfe4f583da3a28c3b29d29a93ff62097130e27 Gerrit-Change-Number: 37273 Gerrit-PatchSet: 1 Gerrit-Owner: Maulik V Vaghela <maulik.v.vaghela(a)intel.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/amd/common: Fix indirect includes
by Kyösti Mälkki (Code Review) 28 Nov '19

28 Nov '19

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37266 ) Change subject: soc/amd/common: Fix indirect includes ...................................................................... soc/amd/common: Fix indirect includes Builds that would otherwise be reproducible are sometimes broken due to added #include combined with __LINE__ used in assert() statement. Change-Id: If4a02393799a34bbae4f6e506052774526c1a969 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/audio.asl M src/soc/amd/common/block/gpio_banks/gpio.c M src/soc/amd/common/block/include/amdblocks/gpio_banks.h M src/soc/amd/picasso/acpi/sb_fch.asl M src/soc/amd/stoneyridge/acpi/sb_fch.asl 5 files changed, 6 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/66/37266/1 diff --git a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/audio.asl b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/audio.asl index 87890da..01942dc 100644 --- a/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/audio.asl +++ b/src/mainboard/google/kahlee/variants/baseboard/include/baseboard/acpi/audio.asl @@ -12,7 +12,8 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ -#include <soc/iomap.h> + +#include <amdblocks/acpimmio_map.h> /* Grunt specific I2S machine driver */ Device (I2S) diff --git a/src/soc/amd/common/block/gpio_banks/gpio.c b/src/soc/amd/common/block/gpio_banks/gpio.c index 17e3de0..76c2021 100644 --- a/src/soc/amd/common/block/gpio_banks/gpio.c +++ b/src/soc/amd/common/block/gpio_banks/gpio.c @@ -20,6 +20,7 @@ #include <console/console.h> #include <gpio.h> #include <amdblocks/acpimmio.h> +#include <amdblocks/acpimmio_map.h> #include <soc/gpio.h> #include <soc/smi.h> #include <assert.h> diff --git a/src/soc/amd/common/block/include/amdblocks/gpio_banks.h b/src/soc/amd/common/block/include/amdblocks/gpio_banks.h index 6427cb6..2206e35 100644 --- a/src/soc/amd/common/block/include/amdblocks/gpio_banks.h +++ b/src/soc/amd/common/block/include/amdblocks/gpio_banks.h @@ -18,6 +18,7 @@ #include <stdint.h> #include <stddef.h> +#include <amdblocks/acpimmio_map.h> struct soc_amd_gpio { uint8_t gpio; diff --git a/src/soc/amd/picasso/acpi/sb_fch.asl b/src/soc/amd/picasso/acpi/sb_fch.asl index 680f496..ca8d175 100644 --- a/src/soc/amd/picasso/acpi/sb_fch.asl +++ b/src/soc/amd/picasso/acpi/sb_fch.asl @@ -15,6 +15,7 @@ #include <soc/gpio.h> #include <soc/iomap.h> +#include <amdblocks/acpimmio_map.h> Device (AAHB) { diff --git a/src/soc/amd/stoneyridge/acpi/sb_fch.asl b/src/soc/amd/stoneyridge/acpi/sb_fch.asl index e7975f8..897c9ec 100644 --- a/src/soc/amd/stoneyridge/acpi/sb_fch.asl +++ b/src/soc/amd/stoneyridge/acpi/sb_fch.asl @@ -15,6 +15,7 @@ #include <soc/gpio.h> #include <soc/iomap.h> +#include <amdblocks/acpimmio_map.h> Device (AAHB) { -- To view, visit https://review.coreboot.org/c/coreboot/+/37266 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If4a02393799a34bbae4f6e506052774526c1a969 Gerrit-Change-Number: 37266 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/*/*/Kconfig: Drop redundant redeclaration of MAINBOARD_VENDOR
by Arthur Heymans (Code Review) 28 Nov '19

28 Nov '19

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/37270 ) Change subject: mb/*/*/Kconfig: Drop redundant redeclaration of MAINBOARD_VENDOR ...................................................................... mb/*/*/Kconfig: Drop redundant redeclaration of MAINBOARD_VENDOR Change-Id: Ic92e08ae5b741889a8200d10ea8148e4b4384dc8 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/mainboard/cavium/cn8100_sff_evb/Kconfig M src/mainboard/google/cheza/Kconfig M src/mainboard/google/cyan/Kconfig M src/mainboard/google/dragonegg/Kconfig M src/mainboard/google/drallion/Kconfig M src/mainboard/google/gru/Kconfig M src/mainboard/google/hatch/Kconfig M src/mainboard/google/mistral/Kconfig M src/mainboard/google/oak/Kconfig M src/mainboard/google/sarien/Kconfig M src/mainboard/google/trogdor/Kconfig M src/mainboard/google/veyron/Kconfig M src/mainboard/google/veyron_mickey/Kconfig M src/mainboard/google/veyron_rialto/Kconfig M src/mainboard/intel/apollolake_rvp/Kconfig M src/mainboard/intel/cannonlake_rvp/Kconfig M src/mainboard/intel/coffeelake_rvp/Kconfig M src/mainboard/intel/galileo/Kconfig M src/mainboard/intel/harcuvar/Kconfig M src/mainboard/intel/icelake_rvp/Kconfig M src/mainboard/intel/leafhill/Kconfig M src/mainboard/intel/strago/Kconfig M src/mainboard/kontron/ktqm77/Kconfig M src/mainboard/packardbell/ms2290/Kconfig M src/mainboard/purism/librem_bdw/Kconfig M src/mainboard/purism/librem_skl/Kconfig M src/mainboard/roda/rv11/Kconfig M src/mainboard/scaleway/tagada/Kconfig M src/mainboard/ti/beaglebone/Kconfig 29 files changed, 0 insertions(+), 116 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/37270/1 diff --git a/src/mainboard/cavium/cn8100_sff_evb/Kconfig b/src/mainboard/cavium/cn8100_sff_evb/Kconfig index 0cb6f5a..03e65f5 100644 --- a/src/mainboard/cavium/cn8100_sff_evb/Kconfig +++ b/src/mainboard/cavium/cn8100_sff_evb/Kconfig @@ -29,10 +29,6 @@ string default "cavium/cn8100_sff_evb" -config MAINBOARD_VENDOR - string - default "Cavium" - config DRAM_SIZE_MB int default 8192 diff --git a/src/mainboard/google/cheza/Kconfig b/src/mainboard/google/cheza/Kconfig index 30218cc..3f3f756 100644 --- a/src/mainboard/google/cheza/Kconfig +++ b/src/mainboard/google/cheza/Kconfig @@ -27,10 +27,6 @@ string default "google/cheza" -config MAINBOARD_VENDOR - string - default "Google" - config DRIVER_TPM_SPI_BUS hex default 0x5 diff --git a/src/mainboard/google/cyan/Kconfig b/src/mainboard/google/cyan/Kconfig index bb5ffb6..6331419 100644 --- a/src/mainboard/google/cyan/Kconfig +++ b/src/mainboard/google/cyan/Kconfig @@ -69,10 +69,6 @@ default "Ultima" if BOARD_GOOGLE_ULTIMA default "Wizpig" if BOARD_GOOGLE_WIZPIG -config MAINBOARD_VENDOR - string - default "Google" - config DEVICETREE string default "variants/$(CONFIG_VARIANT_DIR)/devicetree.cb" diff --git a/src/mainboard/google/dragonegg/Kconfig b/src/mainboard/google/dragonegg/Kconfig index 1891cbe..550d83a 100644 --- a/src/mainboard/google/dragonegg/Kconfig +++ b/src/mainboard/google/dragonegg/Kconfig @@ -46,10 +46,6 @@ string default "Dragonegg" -config MAINBOARD_VENDOR - string - default "Google" - config MAINBOARD_FAMILY string default "Google_Dragonegg" diff --git a/src/mainboard/google/drallion/Kconfig b/src/mainboard/google/drallion/Kconfig index 256f8cb..accb9c8 100644 --- a/src/mainboard/google/drallion/Kconfig +++ b/src/mainboard/google/drallion/Kconfig @@ -74,10 +74,6 @@ default "Sarien_cml" if BOARD_GOOGLE_SARIEN_CML default "Drallion" if BOARD_GOOGLE_DRALLION -config MAINBOARD_VENDOR - string - default "Google" - config MAX_CPUS int default 8 diff --git a/src/mainboard/google/gru/Kconfig b/src/mainboard/google/gru/Kconfig index 72003e0..6cf165c 100644 --- a/src/mainboard/google/gru/Kconfig +++ b/src/mainboard/google/gru/Kconfig @@ -69,10 +69,6 @@ string default "google/gru" -config MAINBOARD_VENDOR - string - default "Google" - config EC_GOOGLE_CHROMEEC_SPI_BUS hex default 0x5 diff --git a/src/mainboard/google/hatch/Kconfig b/src/mainboard/google/hatch/Kconfig index d6e6e46..fce1b87 100644 --- a/src/mainboard/google/hatch/Kconfig +++ b/src/mainboard/google/hatch/Kconfig @@ -97,10 +97,6 @@ default "Kohaku" if BOARD_GOOGLE_KOHAKU default "Puff" if BOARD_GOOGLE_PUFF -config MAINBOARD_VENDOR - string - default "Google" - config MAX_CPUS int default 8 diff --git a/src/mainboard/google/mistral/Kconfig b/src/mainboard/google/mistral/Kconfig index 88e6709..b7d0d31 100644 --- a/src/mainboard/google/mistral/Kconfig +++ b/src/mainboard/google/mistral/Kconfig @@ -24,10 +24,6 @@ string default "google/mistral" -config MAINBOARD_VENDOR - string - default "Google" - ########################################################## #### Update below when adding a new derivative board. #### ########################################################## diff --git a/src/mainboard/google/oak/Kconfig b/src/mainboard/google/oak/Kconfig index 264f371..dc12816 100644 --- a/src/mainboard/google/oak/Kconfig +++ b/src/mainboard/google/oak/Kconfig @@ -52,10 +52,6 @@ string default "google/oak" -config MAINBOARD_VENDOR - string - default "Google" - config EC_GOOGLE_CHROMEEC_SPI_BUS hex default 0x0 diff --git a/src/mainboard/google/sarien/Kconfig b/src/mainboard/google/sarien/Kconfig index 455fbc2..3cd4965 100644 --- a/src/mainboard/google/sarien/Kconfig +++ b/src/mainboard/google/sarien/Kconfig @@ -76,10 +76,6 @@ default "Arcada" if BOARD_GOOGLE_ARCADA default "Sarien" if BOARD_GOOGLE_SARIEN -config MAINBOARD_VENDOR - string - default "Google" - config MAX_CPUS int default 8 diff --git a/src/mainboard/google/trogdor/Kconfig b/src/mainboard/google/trogdor/Kconfig index fba6b17..27bd023 100644 --- a/src/mainboard/google/trogdor/Kconfig +++ b/src/mainboard/google/trogdor/Kconfig @@ -27,10 +27,6 @@ string default "google/trogdor" -config MAINBOARD_VENDOR - string - default "Google" - config DRIVER_TPM_SPI_BUS hex default 0x5 diff --git a/src/mainboard/google/veyron/Kconfig b/src/mainboard/google/veyron/Kconfig index 5d1e616..38c5c3b 100644 --- a/src/mainboard/google/veyron/Kconfig +++ b/src/mainboard/google/veyron/Kconfig @@ -58,10 +58,6 @@ default "Veyron_Speedy" if BOARD_GOOGLE_VEYRON_SPEEDY default "Veyron" -config MAINBOARD_VENDOR - string - default "Google" - config EC_GOOGLE_CHROMEEC_SPI_BUS hex default 0x0 diff --git a/src/mainboard/google/veyron_mickey/Kconfig b/src/mainboard/google/veyron_mickey/Kconfig index 5d15f0e..1bedab7 100644 --- a/src/mainboard/google/veyron_mickey/Kconfig +++ b/src/mainboard/google/veyron_mickey/Kconfig @@ -38,10 +38,6 @@ string default "Veyron_Mickey" -config MAINBOARD_VENDOR - string - default "Google" - config BOOT_DEVICE_SPI_FLASH_BUS int default 2 diff --git a/src/mainboard/google/veyron_rialto/Kconfig b/src/mainboard/google/veyron_rialto/Kconfig index ac6f382..5d4fab3 100644 --- a/src/mainboard/google/veyron_rialto/Kconfig +++ b/src/mainboard/google/veyron_rialto/Kconfig @@ -38,10 +38,6 @@ string default "Veyron_Rialto" -config MAINBOARD_VENDOR - string - default "Google" - config BOOT_DEVICE_SPI_FLASH_BUS int default 2 diff --git a/src/mainboard/intel/apollolake_rvp/Kconfig b/src/mainboard/intel/apollolake_rvp/Kconfig index 391ce1f..dfd86eb 100644 --- a/src/mainboard/intel/apollolake_rvp/Kconfig +++ b/src/mainboard/intel/apollolake_rvp/Kconfig @@ -15,10 +15,6 @@ string default "Apollolake RVP" -config MAINBOARD_VENDOR - string - default "Intel" - config UART_FOR_CONSOLE default 2 endif diff --git a/src/mainboard/intel/cannonlake_rvp/Kconfig b/src/mainboard/intel/cannonlake_rvp/Kconfig index d86e485..133fe47 100644 --- a/src/mainboard/intel/cannonlake_rvp/Kconfig +++ b/src/mainboard/intel/cannonlake_rvp/Kconfig @@ -27,10 +27,6 @@ string default "Cannonlake RVP" -config MAINBOARD_VENDOR - string - default "Intel" - config MAINBOARD_FAMILY string default "Intel_cannonlake_rvp" diff --git a/src/mainboard/intel/coffeelake_rvp/Kconfig b/src/mainboard/intel/coffeelake_rvp/Kconfig index 13e55b3..5ae567d 100644 --- a/src/mainboard/intel/coffeelake_rvp/Kconfig +++ b/src/mainboard/intel/coffeelake_rvp/Kconfig @@ -35,10 +35,6 @@ default "cmlrvp" if BOARD_INTEL_COMETLAKE_RVP default "cflrvp" -config MAINBOARD_VENDOR - string - default "Intel" - config MAINBOARD_FAMILY string default "Intel_whlrvp" if BOARD_INTEL_WHISKEYLAKE_RVP diff --git a/src/mainboard/intel/galileo/Kconfig b/src/mainboard/intel/galileo/Kconfig index 2e855da..4ea7f47 100644 --- a/src/mainboard/intel/galileo/Kconfig +++ b/src/mainboard/intel/galileo/Kconfig @@ -34,10 +34,6 @@ string default "Galileo" -config MAINBOARD_VENDOR - string - default "Intel" - config GALILEO_GEN2 bool "Board generation: GEN1 (n) or GEN2 (y)" default y diff --git a/src/mainboard/intel/harcuvar/Kconfig b/src/mainboard/intel/harcuvar/Kconfig index e3cd86e8..271ff81 100644 --- a/src/mainboard/intel/harcuvar/Kconfig +++ b/src/mainboard/intel/harcuvar/Kconfig @@ -29,10 +29,6 @@ string default "Harcuvar CRB" -config MAINBOARD_VENDOR - string - default "Intel" - config ENABLE_FSP_MEMORY_DOWN bool "Enable Memory Down" default n diff --git a/src/mainboard/intel/icelake_rvp/Kconfig b/src/mainboard/intel/icelake_rvp/Kconfig index 728a532..8331f1b 100644 --- a/src/mainboard/intel/icelake_rvp/Kconfig +++ b/src/mainboard/intel/icelake_rvp/Kconfig @@ -30,10 +30,6 @@ string default "Icelake RVP" -config MAINBOARD_VENDOR - string - default "Intel" - config MAINBOARD_FAMILY string default "Intel_icelake_rvp" diff --git a/src/mainboard/intel/leafhill/Kconfig b/src/mainboard/intel/leafhill/Kconfig index 5832570..97758e1 100644 --- a/src/mainboard/intel/leafhill/Kconfig +++ b/src/mainboard/intel/leafhill/Kconfig @@ -15,10 +15,6 @@ string default "Leafhill" -config MAINBOARD_VENDOR - string - default "Intel" - config FMDFILE string default "src/mainboard/$(CONFIG_MAINBOARD_DIR)/leafhill.$(CONFIG_COREBOOT_ROMSIZE_KB).fmd" diff --git a/src/mainboard/intel/strago/Kconfig b/src/mainboard/intel/strago/Kconfig index 246add1..5e710a5 100644 --- a/src/mainboard/intel/strago/Kconfig +++ b/src/mainboard/intel/strago/Kconfig @@ -30,10 +30,6 @@ string default "Strago" -config MAINBOARD_VENDOR - string - default "Intel" - config VGA_BIOS_FILE string depends on VGA_BIOS diff --git a/src/mainboard/kontron/ktqm77/Kconfig b/src/mainboard/kontron/ktqm77/Kconfig index 1cefa59..77775e6 100644 --- a/src/mainboard/kontron/ktqm77/Kconfig +++ b/src/mainboard/kontron/ktqm77/Kconfig @@ -31,8 +31,4 @@ string default "pci8086,0166.rom" -config MAINBOARD_VENDOR - string - default "Kontron" - endif # BOARD_KONTRON_KTQM77 diff --git a/src/mainboard/packardbell/ms2290/Kconfig b/src/mainboard/packardbell/ms2290/Kconfig index 6a61384..8194002 100644 --- a/src/mainboard/packardbell/ms2290/Kconfig +++ b/src/mainboard/packardbell/ms2290/Kconfig @@ -26,10 +26,6 @@ string default "V1.20" -config MAINBOARD_VENDOR - string - default "Packard Bell" - config USBDEBUG_HCD_INDEX int default 2 diff --git a/src/mainboard/purism/librem_bdw/Kconfig b/src/mainboard/purism/librem_bdw/Kconfig index 466e03e..7a8bc22 100644 --- a/src/mainboard/purism/librem_bdw/Kconfig +++ b/src/mainboard/purism/librem_bdw/Kconfig @@ -42,10 +42,6 @@ string default "purism/librem_bdw" -config MAINBOARD_VENDOR - string - default "Purism" - config MAINBOARD_PART_NUMBER string default "Librem 13 v1" if BOARD_PURISM_LIBREM13_V1 diff --git a/src/mainboard/purism/librem_skl/Kconfig b/src/mainboard/purism/librem_skl/Kconfig index 05fd43d..ca1582a 100644 --- a/src/mainboard/purism/librem_skl/Kconfig +++ b/src/mainboard/purism/librem_skl/Kconfig @@ -23,10 +23,6 @@ default "librem13v2" if BOARD_PURISM_LIBREM13_V2 || BOARD_PURISM_LIBREM13_V4 default "librem15v3" if BOARD_PURISM_LIBREM15_V3 || BOARD_PURISM_LIBREM15_V4 -config MAINBOARD_VENDOR - string - default "Purism" - config MAINBOARD_FAMILY string default "Librem 13" if BOARD_PURISM_LIBREM13_V2 || BOARD_PURISM_LIBREM13_V4 diff --git a/src/mainboard/roda/rv11/Kconfig b/src/mainboard/roda/rv11/Kconfig index 54f04c4..70c383f 100644 --- a/src/mainboard/roda/rv11/Kconfig +++ b/src/mainboard/roda/rv11/Kconfig @@ -37,8 +37,4 @@ int default 8 -config MAINBOARD_VENDOR - string - default "Roda" - endif # BOARD_RODA_RV11 || BOARD_RODA_RW11 diff --git a/src/mainboard/scaleway/tagada/Kconfig b/src/mainboard/scaleway/tagada/Kconfig index 25cb7e1..21088cb 100644 --- a/src/mainboard/scaleway/tagada/Kconfig +++ b/src/mainboard/scaleway/tagada/Kconfig @@ -32,10 +32,6 @@ string default "TAGADA" -config MAINBOARD_VENDOR - string - default "Scaleway" - config BMC_INFO_LOC hex "BMC information location in flash" default 0xff802000 diff --git a/src/mainboard/ti/beaglebone/Kconfig b/src/mainboard/ti/beaglebone/Kconfig index 7009622..e4075d0 100644 --- a/src/mainboard/ti/beaglebone/Kconfig +++ b/src/mainboard/ti/beaglebone/Kconfig @@ -33,10 +33,6 @@ int default 1 -config MAINBOARD_VENDOR - string - default "TI" - config DRAM_SIZE_MB int default 256 -- To view, visit https://review.coreboot.org/c/coreboot/+/37270 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic92e08ae5b741889a8200d10ea8148e4b4384dc8 Gerrit-Change-Number: 37270 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

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coreboot-gerrit November 2019