coreboot-gerrit October 2019

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: mb/google/hatch/variants/helios: Modify touchscreen power on sequence
by Furquan Shaikh (Code Review) 16 Oct '19

16 Oct '19

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35907 ) Change subject: mb/google/hatch/variants/helios: Modify touchscreen power on sequence ...................................................................... Patch Set 5: > Patch Set 3: > > > Patch Set 2: > > > > > Patch Set 2: > > > > > > > Patch Set 2: > > > > > > > > (1 comment) > > > > > > We add some time buffer to avoid margin case . > > > > Were you seeing failures with the previous values? > > The previous values do not affect the touchscreen function. But, the previous values cause the power leakage in S0ix. Why does the previous setting cause power leakage? Can you please attach details to partner bug? Also, what is the margin required for? Do you notice the timing is not sufficient on the scope? -- To view, visit https://review.coreboot.org/c/coreboot/+/35907 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I86c920ff1d5c0b510adde8a37f60003072d5f4e7 Gerrit-Change-Number: 35907 Gerrit-PatchSet: 5 Gerrit-Owner: Kane Chen <kane_chen(a)pegatron.corp-partner.google.com> Gerrit-Assignee: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Kane Chen <kane_chen(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Philip Chen <philipchen(a)google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-CC: Hank Lin <hank2_lin(a)pegatron.corp-partner.google.com> Gerrit-CC: Ken Lu <ken_lu(a)pegatron.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Comment-Date: Wed, 16 Oct 2019 01:48:19 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in coreboot[master]: mb/google/hatch/variants/helios: Modify touchscreen power on sequence
by Kane Chen (Code Review) 16 Oct '19

16 Oct '19

Hello Philip Chen, Shelley Chen, build bot (Jenkins), Furquan Shaikh, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/35907 to look at the new patch set (#5). Change subject: mb/google/hatch/variants/helios: Modify touchscreen power on sequence ...................................................................... mb/google/hatch/variants/helios: Modify touchscreen power on sequence The previous values do not affect the touchscreen function. But, the previous values cause the power leakage in S0ix. Modify GPP_D15 delay time. Modify GPP_D9 delay time. Add GPP_C4 setting. BUG=b:142368161 BRANCH=Master TEST=emerge-hatch coreboot chromeos-bootimage Signed-off-by: YenLu Chen <kane_chen(a)pegatron.corp-partner.google.com> Change-Id: I86c920ff1d5c0b510adde8a37f60003072d5f4e7 --- M src/mainboard/google/hatch/variants/helios/overridetree.cb 1 file changed, 7 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/35907/5 -- To view, visit https://review.coreboot.org/c/coreboot/+/35907 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I86c920ff1d5c0b510adde8a37f60003072d5f4e7 Gerrit-Change-Number: 35907 Gerrit-PatchSet: 5 Gerrit-Owner: Kane Chen <kane_chen(a)pegatron.corp-partner.google.com> Gerrit-Assignee: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Kane Chen <kane_chen(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Philip Chen <philipchen(a)google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-CC: Hank Lin <hank2_lin(a)pegatron.corp-partner.google.com> Gerrit-CC: Ken Lu <ken_lu(a)pegatron.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: mb/google/hatch/variants/helios: Modify touchscreen power on sequence
by Kane Chen (Code Review) 16 Oct '19

16 Oct '19

Hello Philip Chen, Shelley Chen, build bot (Jenkins), Furquan Shaikh, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/35907 to look at the new patch set (#4). Change subject: mb/google/hatch/variants/helios: Modify touchscreen power on sequence ...................................................................... mb/google/hatch/variants/helios: Modify touchscreen power on sequence Add delay time values to fixed power leakage in S0ix. Modify GPP_D15 delay time. Modify GPP_D9 delay time. Add GPP_C4 setting. BUG=b:142368161 BRANCH=Master TEST=emerge-hatch coreboot chromeos-bootimage Signed-off-by: YenLu Chen <kane_chen(a)pegatron.corp-partner.google.com> Change-Id: I86c920ff1d5c0b510adde8a37f60003072d5f4e7 --- M src/mainboard/google/hatch/variants/helios/overridetree.cb 1 file changed, 7 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/35907/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/35907 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I86c920ff1d5c0b510adde8a37f60003072d5f4e7 Gerrit-Change-Number: 35907 Gerrit-PatchSet: 4 Gerrit-Owner: Kane Chen <kane_chen(a)pegatron.corp-partner.google.com> Gerrit-Assignee: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Kane Chen <kane_chen(a)pegatron.corp-partner.google.com> Gerrit-Reviewer: Philip Chen <philipchen(a)google.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Frank Chu <frank_chu(a)pegatron.corp-partner.google.com> Gerrit-CC: Hank Lin <hank2_lin(a)pegatron.corp-partner.google.com> Gerrit-CC: Ken Lu <ken_lu(a)pegatron.corp-partner.google.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/intel: Add function to set DPR
by David Hendricks (Code Review) 15 Oct '19

15 Oct '19

David Hendricks has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/33417 ) Change subject: soc/intel: Add function to set DPR ...................................................................... Patch Set 9: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/33417 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I43d2b50a7a6bb41146be99e645cd2ac6a6c9f703 Gerrit-Change-Number: 33417 Gerrit-PatchSet: 9 Gerrit-Owner: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Roy Wen <rgzwen(a)arista.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Tue, 15 Oct 2019 23:27:36 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: util/cbfstool: Add optional argument ibb
by David Hendricks (Code Review) 15 Oct '19

15 Oct '19

David Hendricks has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29744 ) Change subject: util/cbfstool: Add optional argument ibb ...................................................................... Patch Set 22: Code-Review-1 (3 comments) Hi Patrick, Thanks for doing this. I don't think it will work as written, though - You still need a `val` in the long_options[] entry so that getopt_long() will return a value to process in the switch statement. I've added some comments as an example. https://review.coreboot.org/c/coreboot/+/29744/20/util/cbfstool/cbfstool.c File util/cbfstool/cbfstool.c: https://review.coreboot.org/c/coreboot/+/29744/20/util/cbfstool/cbfstool.c@… PS20, Line 1300: enum { /* begin after ASCII characters */ LONGOPT_IBB = 256, }; https://review.coreboot.org/c/coreboot/+/29744/20/util/cbfstool/cbfstool.c@… PS20, Line 1678: break; You still need this, but with the int for the longopt (i.e. LONGOPT_IBB) https://review.coreboot.org/c/coreboot/+/29744/22/util/cbfstool/cbfstool.c File util/cbfstool/cbfstool.c: https://review.coreboot.org/c/coreboot/+/29744/22/util/cbfstool/cbfstool.c@… PS22, Line 1334: 0 LONGOPT_IBB -- To view, visit https://review.coreboot.org/c/coreboot/+/29744 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Idb4857c894b9ee1edc464c0a1216cdda29937bbd Gerrit-Change-Number: 29744 Gerrit-PatchSet: 22 Gerrit-Owner: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Amol N Sukerkar <amol.n.sukerkar(a)intel.com> Gerrit-Reviewer: Christian Walter <christian.walter(a)9elements.com> Gerrit-Reviewer: David Hendricks <david.hendricks(a)gmail.com> Gerrit-Reviewer: Jens Drenhaus <jens.drenhaus(a)9elements.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Kai Michaelis <kai.michaelis(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Roy Wen <rgzwen(a)arista.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Tue, 15 Oct 2019 23:02:27 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/intel/skylake: Use PCI func0 if enabled in device tree
by Michael Niewöhner (Code Review) 15 Oct '19

15 Oct '19

Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/32846 ) Change subject: soc/intel/skylake: Use PCI func0 if enabled in device tree ...................................................................... Patch Set 2: Code-Review-1 -- To view, visit https://review.coreboot.org/c/coreboot/+/32846 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7c44ee5493eff1f9e04aa891030fde2a6f0c636f Gerrit-Change-Number: 32846 Gerrit-PatchSet: 2 Gerrit-Owner: Caveh Jalali <caveh(a)google.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Caveh Jalali <caveh(a)google.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Gaggery Tsai <gaggery.tsai(a)intel.com> Gerrit-Reviewer: Michael Niewöhner Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: caveh jalali <caveh(a)chromium.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Tue, 15 Oct 2019 20:29:58 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: helios: Add TEMP_SENSOR4 to DPTF
by Paul Fagerburg (Code Review) 15 Oct '19

15 Oct '19

Paul Fagerburg has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35920 ) Change subject: helios: Add TEMP_SENSOR4 to DPTF ...................................................................... helios: Add TEMP_SENSOR4 to DPTF Helios adds TEMP_SENSOR4 to the EC ADC2 pin. Add this to the DPTF. BRANCH=None BUG=b:142266102 TEST=`emerge-hatch coreboot` Verify that Helios builds correctly. Change-Id: I3bc19f9b9bd644e134987749ad9a4d875ad8b40a Signed-off-by: Paul Fagerburg <pfagerburg(a)chromium.org> --- M src/mainboard/google/hatch/variants/helios/include/variant/acpi/dptf.asl 1 file changed, 18 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/35920/1 diff --git a/src/mainboard/google/hatch/variants/helios/include/variant/acpi/dptf.asl b/src/mainboard/google/hatch/variants/helios/include/variant/acpi/dptf.asl index e3159c8..0013f29 100644 --- a/src/mainboard/google/hatch/variants/helios/include/variant/acpi/dptf.asl +++ b/src/mainboard/google/hatch/variants/helios/include/variant/acpi/dptf.asl @@ -54,6 +54,17 @@ #define DPTF_TSR2_ACTIVE_AC4 40 #define DPTF_TSR2_ACTIVE_AC5 38 +#define DPTF_TSR3_SENSOR_ID 3 +#define DPTF_TSR3_SENSOR_NAME "CPU" +#define DPTF_TSR3_PASSIVE 85 +#define DPTF_TSR3_CRITICAL 100 +#define DPTF_TSR3_ACTIVE_AC0 0 +#define DPTF_TSR3_ACTIVE_AC1 0 +#define DPTF_TSR3_ACTIVE_AC2 0 +#define DPTF_TSR3_ACTIVE_AC3 0 +#define DPTF_TSR3_ACTIVE_AC4 0 +#define DPTF_TSR3_ACTIVE_AC5 0 + #define DPTF_ENABLE_CHARGER #define DPTF_ENABLE_FAN_CONTROL @@ -107,6 +118,10 @@ Package () { \_SB.DPTF.TFN1, \_SB.DPTF.TSR2, 100, 90, 69, 56, 46, 36, 30, 0, 0, 0, 0 + }, + Package () { + \_SB.DPTF.TFN1, \_SB.DPTF.TSR3, 100, 90, 69, 56, 46, 36, 30, 0, + 0, 0, 0 } }) @@ -122,6 +137,9 @@ /* CPU Throttle Effect on TSR2 */ Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR2, 100, 60, 0, 0, 0, 0 }, + + /* CPU Throttle Effect on TSR3 */ + Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR3, 100, 60, 0, 0, 0, 0 }, }) Name (MPPC, Package () -- To view, visit https://review.coreboot.org/c/coreboot/+/35920 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3bc19f9b9bd644e134987749ad9a4d875ad8b40a Gerrit-Change-Number: 35920 Gerrit-PatchSet: 1 Gerrit-Owner: Paul Fagerburg <pfagerburg(a)chromium.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/google/hatch: set wifi sar for dragonair
by Chen Wisley (Code Review) 15 Oct '19

15 Oct '19

Chen Wisley has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35807 ) Change subject: mb/google/hatch: set wifi sar for dragonair ...................................................................... mb/google/hatch: set wifi sar for dragonair Enable wifi sar feature and set wifi sar name for dragonair sku. BUG=b:142109545 TEST=emerge-hatch coreboot chromeos-bootimage Change-Id: I0e08610b7c7d2d8da5a749d278bcde26af590e31 Signed-off-by: Wisley Chen <wisley.chen(a)quantatw.com> --- M src/mainboard/google/hatch/Kconfig M src/mainboard/google/hatch/variants/dratini/Makefile.inc A src/mainboard/google/hatch/variants/dratini/include/variant/sku.h A src/mainboard/google/hatch/variants/dratini/variant.c 4 files changed, 60 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/35807/1 diff --git a/src/mainboard/google/hatch/Kconfig b/src/mainboard/google/hatch/Kconfig index 004cc28..63555f8 100644 --- a/src/mainboard/google/hatch/Kconfig +++ b/src/mainboard/google/hatch/Kconfig @@ -39,6 +39,7 @@ config CHROMEOS_WIFI_SAR bool "Enable SAR options for Chrome OS build" + default y if BOARD_GOOGLE_DRATINI depends on CHROMEOS select DSAR_ENABLE select GEO_SAR_ENABLE diff --git a/src/mainboard/google/hatch/variants/dratini/Makefile.inc b/src/mainboard/google/hatch/variants/dratini/Makefile.inc index d82d797..8b7e3d1 100644 --- a/src/mainboard/google/hatch/variants/dratini/Makefile.inc +++ b/src/mainboard/google/hatch/variants/dratini/Makefile.inc @@ -23,3 +23,4 @@ bootblock-y += gpio.c ramstage-y += gpio.c +ramstage-y += variant.c diff --git a/src/mainboard/google/hatch/variants/dratini/include/variant/sku.h b/src/mainboard/google/hatch/variants/dratini/include/variant/sku.h new file mode 100644 index 0000000..8ff2c79 --- /dev/null +++ b/src/mainboard/google/hatch/variants/dratini/include/variant/sku.h @@ -0,0 +1,24 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2019 Google LLC + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __MAINBOARD_SKU_H__ +#define __MAINBOARD_SKU_H__ + +enum { + SKU_21_DRAGONAIR = 21, /* TS + FPS + Stylus */ + SKU_22_DRAGONAIR = 22, /* TS + KB_BL + FPS + Stylus */ +}; + +#endif /* __MAINBOARD_SKU_H__ */ diff --git a/src/mainboard/google/hatch/variants/dratini/variant.c b/src/mainboard/google/hatch/variants/dratini/variant.c new file mode 100644 index 0000000..6b4184a --- /dev/null +++ b/src/mainboard/google/hatch/variants/dratini/variant.c @@ -0,0 +1,34 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2019 Google LLC + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <ec/google/chromeec/ec.h> +#include <baseboard/variants.h> +#include <variant/sku.h> +#include <sar.h> + +const char *get_wifi_sar_cbfs_filename(void) +{ + const char *filename = NULL; + uint32_t sku_id = get_board_sku(); + + switch (sku_id) { + case SKU_21_DRAGONAIR: + case SKU_22_DRAGONAIR: + filename = "wifi_sar-dragonair.hex"; + break; + } + return filename; +} + -- To view, visit https://review.coreboot.org/c/coreboot/+/35807 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0e08610b7c7d2d8da5a749d278bcde26af590e31 Gerrit-Change-Number: 35807 Gerrit-PatchSet: 1 Gerrit-Owner: Chen Wisley <wisley.chen(a)quantatw.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/goog/hatch: Initialize FPMCU_PCH_BOOT1
by Chen Wisley (Code Review) 15 Oct '19

15 Oct '19

Chen Wisley has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35845 ) Change subject: mb/goog/hatch: Initialize FPMCU_PCH_BOOT1 ...................................................................... mb/goog/hatch: Initialize FPMCU_PCH_BOOT1 FPMCU_PCH_BOOT1 pin is connected to GPP_C12. So, config GPP_C12. BUG=b:142188003 TEST=emerge-hatch coreboot Change-Id: I73a5c3529330ef3e72f4c7d5fcbbd2f6693494d8 Signed-off-by: Wisley Chen <wisley.chen(a)quantatw.com> --- M src/mainboard/google/hatch/variants/dratini/gpio.c 1 file changed, 2 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/35845/1 diff --git a/src/mainboard/google/hatch/variants/dratini/gpio.c b/src/mainboard/google/hatch/variants/dratini/gpio.c index 003b7d1..30d56d7 100644 --- a/src/mainboard/google/hatch/variants/dratini/gpio.c +++ b/src/mainboard/google/hatch/variants/dratini/gpio.c @@ -31,6 +31,8 @@ PAD_NC(GPP_A18, NONE), /* A19 : NC */ PAD_NC(GPP_A19, NONE), + /* C12 : FPMCU_PCH_BOOT1 */ + PAD_CFG_GPO(GPP_C12, 0, DEEP), /* C15 : NC */ PAD_NC(GPP_C15, NONE), /* F1 : NC */ -- To view, visit https://review.coreboot.org/c/coreboot/+/35845 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I73a5c3529330ef3e72f4c7d5fcbbd2f6693494d8 Gerrit-Change-Number: 35845 Gerrit-PatchSet: 1 Gerrit-Owner: Chen Wisley <wisley.chen(a)quantatw.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: mainboard/lenovo/t410: Add new port
by Arthur Heymans (Code Review) 15 Oct '19

15 Oct '19

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/11791 ) Change subject: mainboard/lenovo/t410: Add new port ...................................................................... Patch Set 28: (1 comment) https://review.coreboot.org/c/coreboot/+/11791/28/Documentation/mainboard/i… File Documentation/mainboard/index.md: https://review.coreboot.org/c/coreboot/+/11791/28/Documentation/mainboard/i… PS28, Line 91: - [PQ7-M107](portwell/pq7-m107.md) > How are these lines added to the docs? Looks like this was overlooked when rebasing. -- To view, visit https://review.coreboot.org/c/coreboot/+/11791 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id9d872e643dd242e925bfb46d18076e6ad100995 Gerrit-Change-Number: 11791 Gerrit-PatchSet: 28 Gerrit-Owner: Nicolas Reinecke <nr(a)das-labor.org> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Nicolas Reinecke <nr(a)das-labor.org> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Eloy Degen Gerrit-CC: Iru Cai (vimacs) <mytbk920423(a)gmail.com> Gerrit-CC: Matt Parnell <mparnell(a)gmail.com> Gerrit-CC: Okashi Odayakana <okashi(a)okashi.me> Gerrit-CC: Peter Lemenkov <lemenkov(a)gmail.com> Gerrit-Comment-Date: Tue, 15 Oct 2019 14:33:31 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Iru Cai (vimacs) <mytbk920423(a)gmail.com> Gerrit-MessageType: comment

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coreboot-gerrit October 2019