coreboot-gerrit October 2019

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: mediatek/mt8183: Adjust DRAM voltages for each DRAM frequency
by Yu-Ping Wu (Code Review) 16 Oct '19

16 Oct '19

Yu-Ping Wu has uploaded a new patch set (#13) to the change originally created by huayang duan. ( https://review.coreboot.org/c/coreboot/+/35017 ) Change subject: mediatek/mt8183: Adjust DRAM voltages for each DRAM frequency ...................................................................... mediatek/mt8183: Adjust DRAM voltages for each DRAM frequency This patch supports voltage adjustment for each DRAM frequency, which is neccesary to support DVFS switch. BUG=b:80501386,b:142358843 BRANCH=none TEST=Boots correctly and stress test pass on Kukui. Change-Id: I9539473ff708f9d0d39eb17bd3fdcb916265d33e Signed-off-by: Huayang Duan <huayang.duan(a)mediatek.com> --- M src/soc/mediatek/mt8183/emi.c 1 file changed, 31 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/35017/13 -- To view, visit https://review.coreboot.org/c/coreboot/+/35017 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9539473ff708f9d0d39eb17bd3fdcb916265d33e Gerrit-Change-Number: 35017 Gerrit-PatchSet: 13 Gerrit-Owner: huayang duan <huayangduan(a)gmail.com> Gerrit-Reviewer: Huayang Duan <huayang.duan(a)mediatek.corp-partner.google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: hsin-hsiung wang <hsin-hsiung.wang(a)mediatek.com> Gerrit-Reviewer: huayang duan <huayangduan(a)gmail.com> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: util/ifdtool: Fix argument parsing for layout/validate
by Samuel Holland (Code Review) 16 Oct '19

16 Oct '19

Samuel Holland has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36049 ) Change subject: util/ifdtool: Fix argument parsing for layout/validate ...................................................................... util/ifdtool: Fix argument parsing for layout/validate When `mode_validate` was added, a second copy of `mode_layout` was accidentally added to the multiple-mode-argument check instead. This prevents `-f` from working. Fix the check to reference the correct variable. Change-Id: Ibac6f090550ff63ec9158355b0450da204a300a7 Signed-off-by: Samuel Holland <samuel(a)sholland.org> --- M util/ifdtool/ifdtool.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/36049/1 diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c index 0e83c76..24e20e1 100644 --- a/util/ifdtool/ifdtool.c +++ b/util/ifdtool/ifdtool.c @@ -1659,7 +1659,7 @@ if ((mode_dump + mode_layout + mode_extract + mode_inject + mode_newlayout + (mode_spifreq | mode_em100 | mode_unlocked | - mode_locked) + mode_altmedisable + mode_layout) > 1) { + mode_locked) + mode_altmedisable + mode_validate) > 1) { fprintf(stderr, "You may not specify more than one mode.\n\n"); print_usage(argv[0]); exit(EXIT_FAILURE); -- To view, visit https://review.coreboot.org/c/coreboot/+/36049 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibac6f090550ff63ec9158355b0450da204a300a7 Gerrit-Change-Number: 36049 Gerrit-PatchSet: 1 Gerrit-Owner: Samuel Holland <samuel(a)sholland.org> Gerrit-MessageType: newchange

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Change in coreboot[master]: mb/lenovo/x201: Add VBOOT support
by Arthur Heymans (Code Review) 16 Oct '19

16 Oct '19

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/35959 ) Change subject: mb/lenovo/x201: Add VBOOT support ...................................................................... Patch Set 8: (1 comment) https://review.coreboot.org/c/coreboot/+/35959/1/src/mainboard/lenovo/x201/… File src/mainboard/lenovo/x201/Kconfig: https://review.coreboot.org/c/coreboot/+/35959/1/src/mainboard/lenovo/x201/… PS1, Line 37: config VBOOT_VBNV_OFFSET : hex : default 0x2a > TODO: cmos_layout. Done -- To view, visit https://review.coreboot.org/c/coreboot/+/35959 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9d524988e991457032f63a947606d1b3581de5e7 Gerrit-Change-Number: 35959 Gerrit-PatchSet: 8 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 16 Oct 2019 08:30:52 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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Change in coreboot[master]: drivers/usb: Enable EHCI debug during verstage
by Arthur Heymans (Code Review) 16 Oct '19

16 Oct '19

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36040 ) Change subject: drivers/usb: Enable EHCI debug during verstage ...................................................................... drivers/usb: Enable EHCI debug during verstage Change-Id: I14843c1944f2c1e0a26870b576bac549c0cac7f9 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/drivers/usb/Makefile.inc M src/include/console/usb.h 2 files changed, 2 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/36040/1 diff --git a/src/drivers/usb/Makefile.inc b/src/drivers/usb/Makefile.inc index c8d319b..fa995c3 100644 --- a/src/drivers/usb/Makefile.inc +++ b/src/drivers/usb/Makefile.inc @@ -1,4 +1,5 @@ bootblock-$(CONFIG_USBDEBUG) += ehci_debug.c pci_ehci.c console.c gadget.c +verstage-$(CONFIG_USBDEBUG) += ehci_debug.c console.c romstage-$(CONFIG_USBDEBUG) += ehci_debug.c pci_ehci.c console.c gadget.c postcar-$(CONFIG_USBDEBUG) += ehci_debug.c console.c diff --git a/src/include/console/usb.h b/src/include/console/usb.h index f4f8bd7..33edbf6 100644 --- a/src/include/console/usb.h +++ b/src/include/console/usb.h @@ -31,6 +31,7 @@ ((ENV_BOOTBLOCK && CONFIG(USBDEBUG_IN_PRE_RAM)) || \ (ENV_ROMSTAGE && CONFIG(USBDEBUG_IN_PRE_RAM)) || \ (ENV_POSTCAR && CONFIG(USBDEBUG_IN_PRE_RAM)) || \ + (ENV_VERSTAGE && CONFIG(USBDEBUG_IN_PRE_RAM)) || \ ENV_RAMSTAGE)) #define USB_PIPE_FOR_CONSOLE 0 -- To view, visit https://review.coreboot.org/c/coreboot/+/36040 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I14843c1944f2c1e0a26870b576bac549c0cac7f9 Gerrit-Change-Number: 36040 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: vboot: add new vb2ex_abort callback
by Joel Kitching (Code Review) 16 Oct '19

16 Oct '19

Joel Kitching has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36035 ) Change subject: vboot: add new vb2ex_abort callback ...................................................................... vboot: add new vb2ex_abort callback Required for new VB2_ASSERT and VB2_DIE macros in vboot code. (See chromium:972956.) BUG=b:124141368, chromium:1005700 TEST=make clean && make test-abuild BRANCH=none Change-Id: I61a1036ccab80862d6eb12f9f72286f29e8478cf Signed-off-by: Joel Kitching <kitching(a)google.com> --- M src/security/vboot/vboot_logic.c 1 file changed, 5 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/36035/1 diff --git a/src/security/vboot/vboot_logic.c b/src/security/vboot/vboot_logic.c index d049740..da6231a 100644 --- a/src/security/vboot/vboot_logic.c +++ b/src/security/vboot/vboot_logic.c @@ -87,6 +87,11 @@ return VB2_SUCCESS; } +void vb2ex_abort(void) +{ + die("vboot has aborted execution; exit\n"); +} + /* No-op stubs that can be overridden by SoCs with hardware crypto support. */ __weak vb2_error_t vb2ex_hwcrypto_digest_init(enum vb2_hash_algorithm hash_alg, uint32_t data_size) -- To view, visit https://review.coreboot.org/c/coreboot/+/36035 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I61a1036ccab80862d6eb12f9f72286f29e8478cf Gerrit-Change-Number: 36035 Gerrit-PatchSet: 1 Gerrit-Owner: Joel Kitching <kitching(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/mediatek/mt8183: Verify checksum of cached calibration data
by Yu-Ping Wu (Code Review) 16 Oct '19

16 Oct '19

Yu-Ping Wu has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/36014 ) Change subject: soc/mediatek/mt8183: Verify checksum of cached calibration data ...................................................................... soc/mediatek/mt8183: Verify checksum of cached calibration data The checksum is stored in the header of calibration data and saved to SPI flash. After reading the data from flash, checksum is used to verify the integrity of the calibration parameters. BUG=b:139099592 BRANCH=kukui TEST=Calibration data successfully loaded from flash Change-Id: Ie4a0688ed6e560d4c0c6b316f44e52fd10d71a9d Signed-off-by: Yu-Ping Wu <yupingso(a)chromium.org> --- M src/soc/mediatek/mt8183/dramc_param.c M src/soc/mediatek/mt8183/memory.c 2 files changed, 14 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/14/36014/1 diff --git a/src/soc/mediatek/mt8183/dramc_param.c b/src/soc/mediatek/mt8183/dramc_param.c index ef3c191..bf1fee4 100644 --- a/src/soc/mediatek/mt8183/dramc_param.c +++ b/src/soc/mediatek/mt8183/dramc_param.c @@ -35,7 +35,6 @@ if (hdr->size != sizeof(*param)) return DRAMC_ERR_INVALID_SIZE; - /* TODO(hungte) Verify and check hdr->checksum. */ return DRAMC_SUCCESS; } diff --git a/src/soc/mediatek/mt8183/memory.c b/src/soc/mediatek/mt8183/memory.c index e97ea21..b536ebc 100644 --- a/src/soc/mediatek/mt8183/memory.c +++ b/src/soc/mediatek/mt8183/memory.c @@ -16,6 +16,7 @@ #include <assert.h> #include <cbfs.h> #include <console/console.h> +#include <ip_checksum.h> #include <soc/dramc_param.h> #include <soc/dramc_pi_api.h> #include <soc/emi.h> @@ -70,6 +71,12 @@ printk(BIOS_DEBUG, "header.checksum = %#x\n", header->checksum); } +static u32 compute_checksum(const struct dramc_param *dparam) +{ + return (u32)compute_ip_checksum(dparam->freq_params, + sizeof(dparam->freq_params)); +} + static int dram_run_fast_calibration(const struct dramc_param *dparam, u16 config) { @@ -88,6 +95,12 @@ return -1; } + if (compute_checksum(dparam) != dparam->header.checksum) { + printk(BIOS_ERR, + "Invalid DRAM calibration checksum from flash\n"); + return -1; + } + return 0; } @@ -165,6 +178,7 @@ printk(BIOS_INFO, "Successfully loaded DRAM blobs and " "ran DRAM calibration\n"); set_source_to_flash(dparam->freq_params); + dparam->header.checksum = compute_checksum(dparam); dparam_ops->write_to_flash(dparam); printk(BIOS_DEBUG, "Calibration params saved to flash: " "version=%#x, size=%#x\n", -- To view, visit https://review.coreboot.org/c/coreboot/+/36014 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie4a0688ed6e560d4c0c6b316f44e52fd10d71a9d Gerrit-Change-Number: 36014 Gerrit-PatchSet: 1 Gerrit-Owner: Yu-Ping Wu <yupingso(a)google.com> Gerrit-MessageType: newchange

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Change in coreboot[master]: soc/mediatek/mt8183: Remove unnecessary DRAM register settings
by Hung-Te Lin (Code Review) 16 Oct '19

16 Oct '19

Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36075 ) Change subject: soc/mediatek/mt8183: Remove unnecessary DRAM register settings ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/36075 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I22a4b69fd40d1978fa7b12e8edaba00ce5d7787d Gerrit-Change-Number: 36075 Gerrit-PatchSet: 2 Gerrit-Owner: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 16 Oct 2019 03:43:30 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: soc/mediatek/mt8183: Remove unnecessary DRAM register settings
by Hung-Te Lin (Code Review) 16 Oct '19

16 Oct '19

Hung-Te Lin has uploaded a new patch set (#2) to the change originally created by Yu-Ping Wu. ( https://review.coreboot.org/c/coreboot/+/36075 ) Change subject: soc/mediatek/mt8183: Remove unnecessary DRAM register settings ...................................................................... soc/mediatek/mt8183: Remove unnecessary DRAM register settings In broadcast mode we only need to set registers for channel 0 instead of all channels. BUG=none BRANCH=kukui TEST=emerge-kukui coreboot Change-Id: I22a4b69fd40d1978fa7b12e8edaba00ce5d7787d Signed-off-by: Yu-Ping Wu <yupingso(a)chromium.org> --- M src/soc/mediatek/mt8183/dramc_init_setting.c 1 file changed, 5 insertions(+), 12 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/75/36075/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/36075 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I22a4b69fd40d1978fa7b12e8edaba00ce5d7787d Gerrit-Change-Number: 36075 Gerrit-PatchSet: 2 Gerrit-Owner: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in coreboot[master]: soc/mediatek/mt8183: Fix DDR phy config number
by Hung-Te Lin (Code Review) 16 Oct '19

16 Oct '19

Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/36074 ) Change subject: soc/mediatek/mt8183: Fix DDR phy config number ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/36074 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I064d4a2c46187ac5780352da742bd56e82c22c14 Gerrit-Change-Number: 36074 Gerrit-PatchSet: 1 Gerrit-Owner: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 16 Oct 2019 03:42:27 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in coreboot[master]: util/amdfwtool: Grow the Embedded Firmware Structure
by Marshall Dawson (Code Review) 16 Oct '19

16 Oct '19

Marshall Dawson has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/35667 ) Change subject: util/amdfwtool: Grow the Embedded Firmware Structure ...................................................................... util/amdfwtool: Grow the Embedded Firmware Structure Ensure adequate space exists for all Embedded Firmware Structure fields. Field definitions are NDA only. See PID #55758 "AMD Platform Security Processor BIOS Architecture Design Guide for AMD Family 17h Processors". BUG=b:141790457 TEST=run on Mandolin Change-Id: I098ffc7c05d27387a877e6b7c8628d98939bd9af Signed-off-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> --- M util/amdfwtool/amdfwtool.c 1 file changed, 2 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/35667/1 diff --git a/util/amdfwtool/amdfwtool.c b/util/amdfwtool/amdfwtool.c index 4c5b216..2980622 100644 --- a/util/amdfwtool/amdfwtool.c +++ b/util/amdfwtool/amdfwtool.c @@ -387,6 +387,8 @@ uint32_t comboable; uint32_t bios0_entry; /* todo: add way to select correct entry */ uint32_t bios1_entry; + uint32_t bios2_entry; + uint32_t reserved[0x2c]; /* 0x24 - 0x4f */ } __attribute__((packed, aligned(16))) embedded_firmware; typedef struct _psp_directory_header { -- To view, visit https://review.coreboot.org/c/coreboot/+/35667 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I098ffc7c05d27387a877e6b7c8628d98939bd9af Gerrit-Change-Number: 35667 Gerrit-PatchSet: 1 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-MessageType: newchange

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coreboot-gerrit October 2019