coreboot-gerrit January 2019

coreboot-gerrit@coreboot.org

1 participants
1296 discussions

Change in ...coreboot[master]: ec/kontron: Add support for Kontron kempld
by Stefan Reinauer (Code Review) 17 Jan '19

17 Jan '19

Stefan Reinauer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29476 ) Change subject: ec/kontron: Add support for Kontron kempld ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/29476 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If9a0826c4a8f5c8cd573610c2d10561334258b36 Gerrit-Change-Number: 29476 Gerrit-PatchSet: 3 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Thomas Heijligen <src(a)posteo.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 17 Jan 2019 00:26:34 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in ...coreboot[master]: src: Fix - Remove unused variables
by Stefan Reinauer (Code Review) 17 Jan '19

17 Jan '19

Stefan Reinauer has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29917 ) Change subject: src: Fix - Remove unused variables ...................................................................... Patch Set 23: (6 comments) https://review.coreboot.org/#/c/29917/23/src/cpu/amd/family_10h-family_15h/… File src/cpu/amd/family_10h-family_15h/init_cpus.c: https://review.coreboot.org/#/c/29917/23/src/cpu/amd/family_10h-family_15h/… PS23, Line 1070: ) I think it would be preferable to add {} for readability. https://review.coreboot.org/#/c/29917/23/src/northbridge/intel/haswell/rami… File src/northbridge/intel/haswell/raminit.c: https://review.coreboot.org/#/c/29917/23/src/northbridge/intel/haswell/rami… PS23, Line 203: are we sure that this read is not necessary? https://review.coreboot.org/#/c/29917/23/src/northbridge/intel/pineview/ear… File src/northbridge/intel/pineview/early_init.c: https://review.coreboot.org/#/c/29917/23/src/northbridge/intel/pineview/ear… PS23, Line 125: reg32 = MCHBAR32(0x30); : reg32 = 0x21800; : MCHBAR32(0x30) = reg32; : DMIBAR32(0x2c) = 0x86000040; : pci_write_config32(PCI_DEV(0, 0x1e, 0), 0x18, 0x00020200); : pci_write_config32(PCI_DEV(0, 0x1e, 0), 0x18, 0x00000000); : : early_graphics_setup(); : : reg32 = MCHBAR32(0x40); : reg32 = 0x0; : MCHBAR32(0x40) = reg32; : reg32 = MCHBAR32(0x40); : reg32 = 0x8; : MCHBAR32(0x40) = reg32; This is unrelated to the description and doesn't make the code more readable https://review.coreboot.org/#/c/29917/23/src/northbridge/intel/x4x/early_in… File src/northbridge/intel/x4x/early_init.c: https://review.coreboot.org/#/c/29917/23/src/northbridge/intel/x4x/early_in… PS23, Line 243: This read might be necessary. https://review.coreboot.org/#/c/29917/23/src/northbridge/intel/x4x/early_in… PS23, Line 226: reg16 = RCBA16(0x1a8); : reg16 &= ~0x3; : RCBA16(0x1a8) = reg16; This assumes that the register reads the same value that was written. Did you verify that that is the case? https://review.coreboot.org/#/c/29917/23/src/soc/intel/fsp_baytrail/romstag… File src/soc/intel/fsp_baytrail/romstage/romstage.c: https://review.coreboot.org/#/c/29917/23/src/soc/intel/fsp_baytrail/romstag… PS23, Line 253: if (!cbmem_was_initted) : printk(BIOS_ERR, "cbmem init failed\n"); unrelated to description -- To view, visit https://review.coreboot.org/c/coreboot/+/29917 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibdfbf1031130ff861c4313d1271d6ccb68bf8837 Gerrit-Change-Number: 29917 Gerrit-PatchSet: 23 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Damien Zammit <damien(a)zamaudio.com> Gerrit-Reviewer: David Guckian <david.guckian(a)intel.com> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Huang Jin <huang.jin(a)intel.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: York Yang <york.yang(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Comment-Date: Thu, 17 Jan 2019 00:24:31 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Gerrit-MessageType: comment

1 0

Change in ...coreboot[master]: buildgcc: Update Clang version to 4.0.1
by Stefan Reinauer (Code Review) 17 Jan '19

17 Jan '19

Stefan Reinauer has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/21017 ) Change subject: buildgcc: Update Clang version to 4.0.1 ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/21017 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7440840d861f55476c0e22a614bbd003474cea1b Gerrit-Change-Number: 21017 Gerrit-PatchSet: 2 Gerrit-Owner: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: abandon

1 0

Change in ...coreboot[master]: buildgcc: IASL
by Stefan Reinauer (Code Review) 17 Jan '19

17 Jan '19

Stefan Reinauer has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/20334 ) Change subject: buildgcc: IASL ...................................................................... Abandoned Oh, indeed this is very old. We are at 20190108 already -- To view, visit https://review.coreboot.org/c/coreboot/+/20334 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I2bcd61616fbbafdc2a4a5a6f0bd53228b0b0d5ff Gerrit-Change-Number: 20334 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: abandon

1 0

Change in ...coreboot[master]: qclib: Add qclib support
by Patrick Georgi (Code Review) 16 Jan '19

16 Jan '19

Patrick Georgi has uploaded a new patch set (#9) to the change originally created by nsekar(a)codeaurora.org. ( https://review.coreboot.org/c/coreboot/+/29967 ) Change subject: qclib: Add qclib support ...................................................................... qclib: Add qclib support Add qclib support to configure pmic, clocks, DDR Change-Id: I534af71163d034ea04420dda6a94ce31b08c8a07 Signed-off-by: Nitheesh Sekar <nsekar(a)codeaurora.org> Signed-off-by: Sricharan R <sricharan(a)codeaurora.org> --- M src/mainboard/google/mistral/mainboard.c M src/mainboard/google/mistral/romstage.c M src/soc/qualcomm/qcs405/Makefile.inc M src/soc/qualcomm/qcs405/include/soc/memlayout.ld A src/soc/qualcomm/qcs405/include/soc/qclib.h M src/soc/qualcomm/qcs405/include/soc/symbols.h M src/soc/qualcomm/qcs405/mmu.c A src/soc/qualcomm/qcs405/qclib_execute.c 8 files changed, 246 insertions(+), 16 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/67/29967/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/29967 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I534af71163d034ea04420dda6a94ce31b08c8a07 Gerrit-Change-Number: 29967 Gerrit-PatchSet: 9 Gerrit-Owner: nsekar(a)codeaurora.org Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: nsekar(a)codeaurora.org Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-MessageType: newpatchset

1 0

Change in ...coreboot[master]: mb/asus/p8z77-v_pro: Add ASUS P8Z77-V Pro
by Felix Singer (Code Review) 16 Jan '19

16 Jan '19

Felix Singer has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/23145 ) Change subject: mb/asus/p8z77-v_pro: Add ASUS P8Z77-V Pro ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/c/coreboot/+/23145 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I5721196c32121c5af3545608a4f324b604909664 Gerrit-Change-Number: 23145 Gerrit-PatchSet: 4 Gerrit-Owner: Felix Singer <migy(a)darmstadt.ccc.de> Gerrit-Reviewer: Dan Elkouby <streetwalkermc(a)gmail.com> Gerrit-Reviewer: Felix Singer <migy(a)darmstadt.ccc.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: abandon

1 0

Change in ...coreboot[master]: mb/google/sarien/variants/sarien: Set up tcc offset for sarien
by John Su (Code Review) 16 Jan '19

16 Jan '19

John Su has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30808 Change subject: mb/google/sarien/variants/sarien: Set up tcc offset for sarien ...................................................................... mb/google/sarien/variants/sarien: Set up tcc offset for sarien Change tcc offset from 15 to 3 for sarien. Refer to b:122636962#comment1 BUG=b:122636962 TEST=Match the result from TAT UI Change-Id: I1c5d144e92d1e6e9c81b3e6686805ccf744b7203 Signed-off-by: John Su <john_su(a)compal.corp-partner.google.com> --- M src/mainboard/google/sarien/variants/sarien/devicetree.cb 1 file changed, 3 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/30808/1 diff --git a/src/mainboard/google/sarien/variants/sarien/devicetree.cb b/src/mainboard/google/sarien/variants/sarien/devicetree.cb index b590bac..8c7e6b3 100644 --- a/src/mainboard/google/sarien/variants/sarien/devicetree.cb +++ b/src/mainboard/google/sarien/variants/sarien/devicetree.cb @@ -71,6 +71,9 @@ #| I2C1 | Touchpad | #| I2C4 | H1 TPM | #+-------------------+---------------------------+ + + register "tcc_offset" = "3" + register "common_soc_config" = "{ .chipset_lockdown = CHIPSET_LOCKDOWN_COREBOOT, .i2c[0] = { -- To view, visit https://review.coreboot.org/c/coreboot/+/30808 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1c5d144e92d1e6e9c81b3e6686805ccf744b7203 Gerrit-Change-Number: 30808 Gerrit-PatchSet: 1 Gerrit-Owner: John Su <john_su(a)compal.corp-partner.google.com> Gerrit-MessageType: newchange

4 8

Change in ...coreboot[master]: soc/intel/cannonlake: Fix afterg3 programming
by Lijian Zhao (Code Review) 16 Jan '19

16 Jan '19

Lijian Zhao has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30945 Change subject: soc/intel/cannonlake: Fix afterg3 programming ...................................................................... soc/intel/cannonlake: Fix afterg3 programming According to EDS #565870 chapter 5.3.1, AG3E bit in PMC located in PMC memory mapped register but not pci config spaces. Change the programming to affect that difference. BUG=b:122425492 TEST=Change System Power State after failure to "s5 off", and boot up onto sarien platform, check the register with iotools mmio_read32 0xfe001020 and bit 0 is set. Signed-off-by: Lijian Zhao <lijian.zhao(a)intel.com> Change-Id: I0934894558fd9cbc056dea8e7ac30426c2529e4e --- M src/soc/intel/cannonlake/pmc.c 1 file changed, 3 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/45/30945/1 diff --git a/src/soc/intel/cannonlake/pmc.c b/src/soc/intel/cannonlake/pmc.c index aebcfc9..74c877b 100644 --- a/src/soc/intel/cannonlake/pmc.c +++ b/src/soc/intel/cannonlake/pmc.c @@ -33,8 +33,9 @@ static void pmc_set_afterg3(struct device *dev, int s5pwr) { uint8_t reg8; + uint8_t *pmcbase = pmc_mmio_regs(); - reg8 = pci_read_config8(dev, GEN_PMCON_B); + reg8 = read8(pmcbase + GEN_PMCON_A); switch (s5pwr) { case MAINBOARD_POWER_STATE_OFF: @@ -48,7 +49,7 @@ break; } - pci_write_config8(dev, GEN_PMCON_B, reg8); + write8(pmcbase + GEN_PMCON_A, reg8); } /* -- To view, visit https://review.coreboot.org/c/coreboot/+/30945 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0934894558fd9cbc056dea8e7ac30426c2529e4e Gerrit-Change-Number: 30945 Gerrit-PatchSet: 1 Gerrit-Owner: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-MessageType: newchange

2 5

Change in ...coreboot[master]: cpu/intel: Configure IA32_FEATURE_CONTROL for alternative SMRR
by HAOUAS Elyes (Code Review) 16 Jan '19

16 Jan '19

HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/27586 ) Change subject: cpu/intel: Configure IA32_FEATURE_CONTROL for alternative SMRR ...................................................................... Patch Set 29: Code-Review+1 -- To view, visit https://review.coreboot.org/c/coreboot/+/27586 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia85602e75385e24ebded75e6e6dd38ccc969a76b Gerrit-Change-Number: 27586 Gerrit-PatchSet: 29 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 16 Jan 2019 19:41:27 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in ...coreboot[master]: nb/intel/i945: Put stage cache in TSEG
by HAOUAS Elyes (Code Review) 16 Jan '19

16 Jan '19

HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/25603 ) Change subject: nb/intel/i945: Put stage cache in TSEG ...................................................................... Patch Set 40: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/25603 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I447815bb0acf5f8e53834b74785d496f9d4df1da Gerrit-Change-Number: 25603 Gerrit-PatchSet: 40 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 16 Jan 2019 19:40:33 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit January 2019