coreboot-gerrit January 2019

coreboot-gerrit@coreboot.org

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1296 discussions

Change in ...coreboot[master]: [WIP] AGESA: Fix SMM support in ASEG
by mikeb mikeb (Code Review) 23 Jan '19

23 Jan '19

mikeb mikeb has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/21624 ) Change subject: [WIP] AGESA: Fix SMM support in ASEG ...................................................................... Patch Set 4: sadly G505S didn't boot when I tested this change together with two other modifications I haven't tested before ("enable SATA at AHCI "2" mode without adding its' rom" + "enable XHCI firmware with that manually dumped image, although Felix didn't approve this way") and I forgot to add the debugging options. A bit later I will either test this change alone or two other changes alone, for more reliable results -- To view, visit https://review.coreboot.org/c/coreboot/+/21624 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7a6b63c535b51cc6ff6847b78616134c8506ad28 Gerrit-Change-Number: 21624 Gerrit-PatchSet: 4 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: mikeb mikeb <mikebdp2(a)gmail.com> Gerrit-Comment-Date: Wed, 23 Jan 2019 20:59:34 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: google/kukui: Move some initialization from bootblock to verstage
by You-Cheng Syu (Code Review) 23 Jan '19

23 Jan '19

Hello Julius Werner, Tristan Hsieh, Hung-Te Lin, build bot (Jenkins), Chun-ta Lin, Patrick Georgi, Martin Roth, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/30331 to look at the new patch set (#9). Change subject: google/kukui: Move some initialization from bootblock to verstage ...................................................................... google/kukui: Move some initialization from bootblock to verstage MT8183 only allows booting from eMMC, so we have to do eMMC emulation from an external source, for example EC, which makes the size of bootblock very important. This CL moves some initialization steps from bootblock to verstage. This will save us about 2700 bytes (before compression) / 1024 bytes (after LZ4 compression) in bootblock. BRANCH=none BUG=b:120588396 TEST=manually boot into kernel Change-Id: I9968d88c54283ef334d1ab975086d4adb3363bd6 Signed-off-by: You-Cheng Syu <youcheng(a)google.com> --- M src/mainboard/google/kukui/Makefile.inc M src/mainboard/google/kukui/bootblock.c M src/mainboard/google/kukui/verstage.c 3 files changed, 15 insertions(+), 20 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/31/30331/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/30331 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I9968d88c54283ef334d1ab975086d4adb3363bd6 Gerrit-Change-Number: 30331 Gerrit-PatchSet: 9 Gerrit-Owner: You-Cheng Syu <youcheng(a)google.com> Gerrit-Reviewer: Chun-ta Lin <itspeter(a)google.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Tristan Hsieh <tristan.shieh(a)mediatek.com> Gerrit-Reviewer: You-Cheng Syu <youcheng(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nico Huber <nico.h(a)gmx.de> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: cpu/intel: Configure IA32_FEATURE_CONTROL for alternative SMRR
by Martin Roth (Code Review) 23 Jan '19

23 Jan '19

Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/27586 ) Change subject: cpu/intel: Configure IA32_FEATURE_CONTROL for alternative SMRR ...................................................................... Patch Set 30: Code-Review+2 (1 comment) https://review.coreboot.org/#/c/27586/30//COMMIT_MSG Commit Message: https://review.coreboot.org/#/c/27586/30//COMMIT_MSG@10 PS30, Line 10: ' Nit: Check your apostrophe use through the commit message. -- To view, visit https://review.coreboot.org/c/coreboot/+/27586 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ia85602e75385e24ebded75e6e6dd38ccc969a76b Gerrit-Change-Number: 27586 Gerrit-PatchSet: 30 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 23 Jan 2019 18:31:57 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: mb/asus/kgpe-d16: Enable IPMI KCS access
by Piotr Kubaj (Code Review) 23 Jan '19

23 Jan '19

Piotr Kubaj has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30727 Change subject: mb/asus/kgpe-d16: Enable IPMI KCS access ...................................................................... mb/asus/kgpe-d16: Enable IPMI KCS access The on-board BMC contains a hardware KCS interface. Allow access to it over LPC. Replace device_t with struct dev *. Change-Id: I021a472496a7dd1411cf0e19e82c748c147302da Signed-off-by: Piotr Kubaj <pkubaj(a)anongoth.pl> --- M src/mainboard/asus/kgpe-d16/devicetree.cb M src/mainboard/asus/kgpe-d16/mainboard.c 2 files changed, 12 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/27/30727/1 diff --git a/src/mainboard/asus/kgpe-d16/devicetree.cb b/src/mainboard/asus/kgpe-d16/devicetree.cb index 9039f6d..0ea4216 100644 --- a/src/mainboard/asus/kgpe-d16/devicetree.cb +++ b/src/mainboard/asus/kgpe-d16/devicetree.cb @@ -217,6 +217,9 @@ chip drivers/pc80/tpm device pnp 4e.0 on end # TPM module end + chip drivers/generic/generic # BMC KCS + device pnp ca2.0 on end + end end device pci 14.4 on # Bridge device pci 1.0 on end # VGA diff --git a/src/mainboard/asus/kgpe-d16/mainboard.c b/src/mainboard/asus/kgpe-d16/mainboard.c index 0285936..d41a038 100644 --- a/src/mainboard/asus/kgpe-d16/mainboard.c +++ b/src/mainboard/asus/kgpe-d16/mainboard.c @@ -46,6 +46,8 @@ * enable the dedicated function in kgpe-d16 board. * This function is called earlier than sr5650_enable. *************************************************/ +#define BMC_KCS_BASE 0xca2 + static void mainboard_enable(struct device *dev) { printk(BIOS_INFO, "Mainboard KGPE-D16 Enable. dev=0x%p\n", dev); @@ -66,6 +68,13 @@ set_pcie_dereset(); /* get_ide_dma66(); */ + + /* Enable access to the BMC IPMI via KCS */ + struct device *lpc_sio_dev = dev_find_slot_pnp(BMC_KCS_BASE, 0); + struct resource *res = new_resource(lpc_sio_dev, BMC_KCS_BASE); + res->base = BMC_KCS_BASE; + res->size = 1; + res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED; } /* override the default SATA PHY setup */ -- To view, visit https://review.coreboot.org/c/coreboot/+/30727 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I021a472496a7dd1411cf0e19e82c748c147302da Gerrit-Change-Number: 30727 Gerrit-PatchSet: 1 Gerrit-Owner: Piotr Kubaj <pkubaj(a)anongoth.pl> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: mb/google/sarien: Replace B0D4 with TCPU
by Sumeet R Pawnikar (Code Review) 23 Jan '19

23 Jan '19

Sumeet R Pawnikar has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31028 Change subject: mb/google/sarien: Replace B0D4 with TCPU ...................................................................... mb/google/sarien: Replace B0D4 with TCPU Replace B0D4 with TCPU for DPTF thermal sensor. This helps to maintain consistency between coreboot and UEFI BIOS. Change-Id: I024068c19160e1c08badef3d304ada14455c045f Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar(a)intel.com> --- M src/mainboard/google/sarien/variants/arcada/include/variant/acpi/dptf.asl M src/mainboard/google/sarien/variants/sarien/include/variant/acpi/dptf.asl 2 files changed, 8 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/31028/1 diff --git a/src/mainboard/google/sarien/variants/arcada/include/variant/acpi/dptf.asl b/src/mainboard/google/sarien/variants/arcada/include/variant/acpi/dptf.asl index fcc8798..f54a7c1 100644 --- a/src/mainboard/google/sarien/variants/arcada/include/variant/acpi/dptf.asl +++ b/src/mainboard/google/sarien/variants/arcada/include/variant/acpi/dptf.asl @@ -39,16 +39,16 @@ Name (DTRT, Package () { /* CPU Throttle Effect on CPU */ - Package () { \_SB.PCI0.B0D4, \_SB.PCI0.B0D4, 100, 10, 0, 0, 0, 0 }, + Package () { \_SB.PCI0.TCPU, \_SB.PCI0.TCPU, 100, 10, 0, 0, 0, 0 }, /* CPU Throttle Effect on Skin (TSR0) */ - Package () { \_SB.PCI0.B0D4, \_SB.DPTF.TSR0, 100, 600, 0, 0, 0, 0 }, + Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR0, 100, 600, 0, 0, 0, 0 }, /* CPU Throttle Effect on DDR (TSR1) */ - Package () { \_SB.PCI0.B0D4, \_SB.DPTF.TSR1, 100, 90, 0, 0, 0, 0 }, + Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR1, 100, 90, 0, 0, 0, 0 }, /* CPU Throttle Effect on Ambient (TSR2) */ - Package () { \_SB.PCI0.B0D4, \_SB.DPTF.TSR2, 100, 600, 0, 0, 0, 0 }, + Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR2, 100, 600, 0, 0, 0, 0 }, }) Name (MPPC, Package () diff --git a/src/mainboard/google/sarien/variants/sarien/include/variant/acpi/dptf.asl b/src/mainboard/google/sarien/variants/sarien/include/variant/acpi/dptf.asl index 459fb67..d6a1274 100644 --- a/src/mainboard/google/sarien/variants/sarien/include/variant/acpi/dptf.asl +++ b/src/mainboard/google/sarien/variants/sarien/include/variant/acpi/dptf.asl @@ -39,16 +39,16 @@ Name (DTRT, Package () { /* CPU Throttle Effect on CPU */ - Package () { \_SB.PCI0.B0D4, \_SB.PCI0.B0D4, 100, 10, 0, 0, 0, 0 }, + Package () { \_SB.PCI0.TCPU, \_SB.PCI0.TCPU, 100, 10, 0, 0, 0, 0 }, /* CPU Throttle Effect on Skin (TSR0) */ - Package () { \_SB.PCI0.B0D4, \_SB.DPTF.TSR0, 100, 600, 0, 0, 0, 0 }, + Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR0, 100, 600, 0, 0, 0, 0 }, /* CPU Throttle Effect on DDR (TSR1) */ - Package () { \_SB.PCI0.B0D4, \_SB.DPTF.TSR1, 100, 90, 0, 0, 0, 0 }, + Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR1, 100, 90, 0, 0, 0, 0 }, /* CPU Throttle Effect on Ambient (TSR2) */ - Package () { \_SB.PCI0.B0D4, \_SB.DPTF.TSR2, 100, 600, 0, 0, 0, 0 }, + Package () { \_SB.PCI0.TCPU, \_SB.DPTF.TSR2, 100, 600, 0, 0, 0, 0 }, }) Name (MPPC, Package () -- To view, visit https://review.coreboot.org/c/coreboot/+/31028 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I024068c19160e1c08badef3d304ada14455c045f Gerrit-Change-Number: 31028 Gerrit-PatchSet: 1 Gerrit-Owner: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: lenovo/x230: introduce FHD variant
by Kilian Neuner (Code Review) 23 Jan '19

23 Jan '19

Kilian Neuner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/28950 ) Change subject: lenovo/x230: introduce FHD variant ...................................................................... Patch Set 6: > Patch Set 6: Code-Review-1 > > > Patch Set 6: > > > > > Patch Set 6: Code-Review+1 > > > > > > looks good to me, but should be tested again before i give a +2 > > > > I have build current master (edbf5d91) with patch set 6 applied for both a normal x230 and x230_fhd. > > I have tested the following setup: coreboot -> seabios -> grub on both devices. > > > > The normal x230 works as expected. > > > > On the device with FHD-mod booting works as well, but graphical output of coreboot, seabios and grub is only visible if an additional external monitor is attached via VGA or DP. The internal FHD panel becomes active as soon as the linux kernel takes over. Right now I am unsure if this is due to misconfiguration on my part or if coreboot/libgfxinit needs to be told to use eDP1 for output on modded devices. Hints for further tests appreciated. > > > > Conclusion: Patch seems stable to me on default and modded x230 Thinkpads but has room for improvement on modded devices > > What you described for the FHD mod is "libgfxinit is not initializing the internal panel at all", which is a regression. Could you please investigate on this matter, or at least provide a coreboot log? Thanks! Here are two coreboot logs from a modded x230. First one with external panel attached, second one without an external panel attached: external_attached: https://pastebin.com/rYLLwkv2 fhd_only: https://pastebin.com/RQU5cLvu As you suspected, the internal fhd panel is not initialized. Since I am not too familiar with libgfxinit, here is also my defconfig to rule out any configuration mistake: https://pastebin.com/9SV99wsz -- To view, visit https://review.coreboot.org/c/coreboot/+/28950 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0355d39a61956792e69bccd5274cfc2749d72bf0 Gerrit-Change-Number: 28950 Gerrit-PatchSet: 6 Gerrit-Owner: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Richard Slindee Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Kilian Neuner <cb(a)9-r.net> Gerrit-CC: Sergey Alirzaev <zl29ah(a)gmail.com> Gerrit-CC: Tom Hiller <thrilleratplay(a)gmail.com> Gerrit-Comment-Date: Wed, 23 Jan 2019 17:21:33 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: soc/intel/cannonlake: Replace device name B0D4 with TCPU
by Sumeet R Pawnikar (Code Review) 23 Jan '19

23 Jan '19

Sumeet R Pawnikar has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31029 Change subject: soc/intel/cannonlake: Replace device name B0D4 with TCPU ...................................................................... soc/intel/cannonlake: Replace device name B0D4 with TCPU Replace device name from B0D4 with TCPU for DPTF sensor. This helps to maintain consistency between coreboot and UEFI BIOS. Change-Id: I962d74fc1baa07581d065734aaabb4dcd5e3d247 Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar(a)intel.com> --- M src/soc/intel/cannonlake/acpi/dptf.asl 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/29/31029/1 diff --git a/src/soc/intel/cannonlake/acpi/dptf.asl b/src/soc/intel/cannonlake/acpi/dptf.asl index 098a61c..fb05c5d 100644 --- a/src/soc/intel/cannonlake/acpi/dptf.asl +++ b/src/soc/intel/cannonlake/acpi/dptf.asl @@ -13,7 +13,7 @@ * GNU General Public License for more details. */ -#define DPTF_CPU_DEVICE B0D4 +#define DPTF_CPU_DEVICE TCPU #define DPTF_CPU_ADDR 0x00040000 #ifndef DPTF_CPU_PASSIVE -- To view, visit https://review.coreboot.org/c/coreboot/+/31029 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I962d74fc1baa07581d065734aaabb4dcd5e3d247 Gerrit-Change-Number: 31029 Gerrit-PatchSet: 1 Gerrit-Owner: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: ec/google/wilco: Turn on wake up from lid
by Duncan Laurie (Code Review) 23 Jan '19

23 Jan '19

Duncan Laurie has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30824 ) Change subject: ec/google/wilco: Turn on wake up from lid ...................................................................... Patch Set 6: (1 comment) https://review.coreboot.org/#/c/30824/6/src/ec/google/wilco/commands.h File src/ec/google/wilco/commands.h: https://review.coreboot.org/#/c/30824/6/src/ec/google/wilco/commands.h@278 PS6, Line 278: EC_ACPI_WAKE_PWRB > Spec said power button had been force enabled, but lid switch not enabled by default, we checked dur […] sorry meant to say rtc.. -- To view, visit https://review.coreboot.org/c/coreboot/+/30824 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I13f3469847b0886147b8b624311a1ece796f847b Gerrit-Change-Number: 30824 Gerrit-PatchSet: 6 Gerrit-Owner: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Krzysztof M Sywula <krzysztof.m.sywula(a)intel.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 23 Jan 2019 16:40:38 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Duncan Laurie <dlaurie(a)chromium.org> Comment-In-Reply-To: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-MessageType: comment

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Change in ...coreboot[master]: arch/x86: Align _start16bit with C_ENVIRONMENT_BOOBLOCK
by Kyösti Mälkki (Code Review) 23 Jan '19

23 Jan '19

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30855 Change subject: arch/x86: Align _start16bit with C_ENVIRONMENT_BOOBLOCK ...................................................................... arch/x86: Align _start16bit with C_ENVIRONMENT_BOOBLOCK Followup removes SIPI_VECTOR_IN_ROM and it seems reasonable enough to force the alignment unconditionally to page size. Reason for the conditionals is the alignment is not possible with romcc bootblocks having total size less than 4 kiB. Change-Id: I0ff2786f80a319ebb3215d4fd696cda3e15c3012 Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com> --- M src/cpu/x86/16bit/entry16.inc 1 file changed, 2 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/55/30855/1 diff --git a/src/cpu/x86/16bit/entry16.inc b/src/cpu/x86/16bit/entry16.inc index 55d9bd9..2a9f8c5 100644 --- a/src/cpu/x86/16bit/entry16.inc +++ b/src/cpu/x86/16bit/entry16.inc @@ -29,7 +29,8 @@ #include <arch/rom_segs.h> -#if IS_ENABLED(CONFIG_SIPI_VECTOR_IN_ROM) +#if IS_ENABLED(CONFIG_C_ENVIRONMENT_BOOTBLOCK) || \ + IS_ENABLED(CONFIG_SIPI_VECTOR_IN_ROM) /* Symbol _start16bit must be aligned to 4kB to start AP CPUs with * Startup IPI message without RAM. */ -- To view, visit https://review.coreboot.org/c/coreboot/+/30855 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0ff2786f80a319ebb3215d4fd696cda3e15c3012 Gerrit-Change-Number: 30855 Gerrit-PatchSet: 1 Gerrit-Owner: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: mb/*/*/devicetree.cb: Make sandybridge devicetree uniform
by Arthur Heymans (Code Review) 23 Jan '19

23 Jan '19

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31030 Change subject: mb/*/*/devicetree.cb: Make sandybridge devicetree uniform ...................................................................... mb/*/*/devicetree.cb: Make sandybridge devicetree uniform This is a merely cosmetic change. Change-Id: If36419fbee9628b591116604bf32fe00a4f08c17 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/mainboard/apple/macbookair4_2/devicetree.cb M src/mainboard/asrock/b75pro3-m/devicetree.cb M src/mainboard/asus/p8h61-m_pro/devicetree.cb M src/mainboard/compulab/intense_pc/devicetree.cb M src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb M src/mainboard/gigabyte/ga-b75m-d3v/devicetree.cb M src/mainboard/gigabyte/ga-h61m-s2pv/devicetree.cb M src/mainboard/google/butterfly/devicetree.cb M src/mainboard/google/link/devicetree.cb M src/mainboard/google/parrot/devicetree.cb M src/mainboard/google/stout/devicetree.cb M src/mainboard/hp/2570p/devicetree.cb M src/mainboard/hp/2760p/devicetree.cb M src/mainboard/hp/8460p/devicetree.cb M src/mainboard/hp/8470p/devicetree.cb M src/mainboard/hp/8770w/devicetree.cb M src/mainboard/hp/compaq_8200_elite_sff/devicetree.cb M src/mainboard/hp/folio_9470m/devicetree.cb M src/mainboard/hp/revolve_810_g1/devicetree.cb M src/mainboard/intel/dcp847ske/devicetree.cb M src/mainboard/intel/emeraldlake2/devicetree.cb M src/mainboard/kontron/ktqm77/devicetree.cb M src/mainboard/lenovo/l520/devicetree.cb M src/mainboard/lenovo/s230u/devicetree.cb M src/mainboard/lenovo/t420/devicetree.cb M src/mainboard/lenovo/t420s/devicetree.cb M src/mainboard/lenovo/t430/devicetree.cb M src/mainboard/lenovo/t430s/devicetree.cb M src/mainboard/lenovo/t520/variants/t520/devicetree.cb M src/mainboard/lenovo/t520/variants/w520/devicetree.cb M src/mainboard/lenovo/t530/variants/t530/devicetree.cb M src/mainboard/lenovo/t530/variants/w530/devicetree.cb M src/mainboard/lenovo/x1_carbon_gen1/devicetree.cb M src/mainboard/lenovo/x220/devicetree.cb M src/mainboard/lenovo/x230/devicetree.cb M src/mainboard/roda/rv11/variants/rv11/devicetree.cb M src/mainboard/roda/rv11/variants/rw11/devicetree.cb M src/mainboard/samsung/lumpy/devicetree.cb M src/mainboard/samsung/stumpy/devicetree.cb M src/mainboard/sapphire/pureplatinumh61/devicetree.cb 40 files changed, 58 insertions(+), 94 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/30/31030/1 diff --git a/src/mainboard/apple/macbookair4_2/devicetree.cb b/src/mainboard/apple/macbookair4_2/devicetree.cb index 226ec04..287b8c0 100644 --- a/src/mainboard/apple/macbookair4_2/devicetree.cb +++ b/src/mainboard/apple/macbookair4_2/devicetree.cb @@ -16,8 +16,7 @@ register "gpu_pch_backlight" = "0x13121312" device cpu_cluster 0x0 on chip cpu/intel/socket_rPGA989 - device lapic 0x0 on - end + device lapic 0x0 on end end chip cpu/intel/model_206ax register "c1_acpower" = "1" @@ -26,8 +25,7 @@ register "c2_battery" = "3" register "c3_acpower" = "5" register "c3_battery" = "5" - device lapic 0xacac off - end + device lapic 0xacac off end end end diff --git a/src/mainboard/asrock/b75pro3-m/devicetree.cb b/src/mainboard/asrock/b75pro3-m/devicetree.cb index def3d1d..d209843 100644 --- a/src/mainboard/asrock/b75pro3-m/devicetree.cb +++ b/src/mainboard/asrock/b75pro3-m/devicetree.cb @@ -32,8 +32,7 @@ register "gpu_pch_backlight" = "0x00000000" device cpu_cluster 0x0 on chip cpu/intel/socket_rPGA989 - device lapic 0x0 on - end + device lapic 0x0 on end end chip cpu/intel/model_206ax register "c1_acpower" = "1" @@ -42,8 +41,7 @@ register "c2_battery" = "3" register "c3_acpower" = "5" register "c3_battery" = "5" - device lapic 0xacac off - end + device lapic 0xacac off end end end device domain 0x0 on diff --git a/src/mainboard/asus/p8h61-m_pro/devicetree.cb b/src/mainboard/asus/p8h61-m_pro/devicetree.cb index 04dc68b..fb12153 100644 --- a/src/mainboard/asus/p8h61-m_pro/devicetree.cb +++ b/src/mainboard/asus/p8h61-m_pro/devicetree.cb @@ -18,8 +18,7 @@ register "gfx.ndid" = "3" device cpu_cluster 0x0 on chip cpu/intel/socket_LGA1155 - device lapic 0x0 on - end + device lapic 0x0 on end end chip cpu/intel/model_206ax register "c1_acpower" = "1" @@ -28,8 +27,7 @@ register "c2_battery" = "3" register "c3_acpower" = "5" register "c3_battery" = "5" - device lapic 0xacac off - end + device lapic 0xacac off end end end register "pci_mmio_size" = "2048" diff --git a/src/mainboard/compulab/intense_pc/devicetree.cb b/src/mainboard/compulab/intense_pc/devicetree.cb index 6d01892..dfd2e69 100644 --- a/src/mainboard/compulab/intense_pc/devicetree.cb +++ b/src/mainboard/compulab/intense_pc/devicetree.cb @@ -29,8 +29,7 @@ register "gpu_pch_backlight" = "0x00000000" device cpu_cluster 0x0 on chip cpu/intel/socket_FCBGA1023 - device lapic 0x0 on - end + device lapic 0x0 on end end chip cpu/intel/model_206ax # FIXME: check all registers register "c1_acpower" = "1" @@ -39,8 +38,7 @@ register "c2_battery" = "3" register "c3_acpower" = "5" register "c3_battery" = "5" - device lapic 0xacac off - end + device lapic 0xacac off end end end device domain 0x0 on diff --git a/src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb b/src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb index b0c58f9..2091346 100644 --- a/src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb +++ b/src/mainboard/gigabyte/ga-b75m-d3h/devicetree.cb @@ -15,7 +15,7 @@ register "c2_battery" = "3" register "c3_battery" = "5" # Magic APIC ID to locate this chip - device lapic 0xACAC off end + device lapic 0xacac off end end end diff --git a/src/mainboard/gigabyte/ga-b75m-d3v/devicetree.cb b/src/mainboard/gigabyte/ga-b75m-d3v/devicetree.cb index d7153f4..61c342a 100644 --- a/src/mainboard/gigabyte/ga-b75m-d3v/devicetree.cb +++ b/src/mainboard/gigabyte/ga-b75m-d3v/devicetree.cb @@ -14,7 +14,7 @@ register "c2_battery" = "3" register "c3_battery" = "5" # Magic APIC ID to locate this chip - device lapic 0xACAC off end + device lapic 0xacac off end end end diff --git a/src/mainboard/gigabyte/ga-h61m-s2pv/devicetree.cb b/src/mainboard/gigabyte/ga-h61m-s2pv/devicetree.cb index 7ff7fbe..bca7381 100644 --- a/src/mainboard/gigabyte/ga-h61m-s2pv/devicetree.cb +++ b/src/mainboard/gigabyte/ga-h61m-s2pv/devicetree.cb @@ -18,8 +18,7 @@ register "gfx.did" = "{ 0x80000100, 0x80000240, 0x80000410 }" device cpu_cluster 0x0 on chip cpu/intel/socket_LGA1155 - device lapic 0x0 on - end + device lapic 0x0 on end end chip cpu/intel/model_206ax register "c1_acpower" = "1" @@ -28,8 +27,7 @@ register "c2_battery" = "3" register "c3_acpower" = "5" register "c3_battery" = "5" - device lapic 0xacac off - end + device lapic 0xacac off end end end register "pci_mmio_size" = "2048" diff --git a/src/mainboard/google/butterfly/devicetree.cb b/src/mainboard/google/butterfly/devicetree.cb index 8f88c24..b54ca9a 100644 --- a/src/mainboard/google/butterfly/devicetree.cb +++ b/src/mainboard/google/butterfly/devicetree.cb @@ -27,7 +27,7 @@ end chip cpu/intel/model_206ax # Magic APIC ID to locate this chip - device lapic 0xACAC off end + device lapic 0xacac off end register "c1_acpower" = "1" # ACPI(C1) = MWAIT(C1) register "c2_acpower" = "3" # ACPI(C2) = MWAIT(C3) diff --git a/src/mainboard/google/link/devicetree.cb b/src/mainboard/google/link/devicetree.cb index 07be8e7..c3b93f0 100644 --- a/src/mainboard/google/link/devicetree.cb +++ b/src/mainboard/google/link/devicetree.cb @@ -26,7 +26,7 @@ end chip cpu/intel/model_206ax # Magic APIC ID to locate this chip - device lapic 0xACAC off end + device lapic 0xacac off end register "c1_acpower" = "1" # ACPI(C1) = MWAIT(C1) register "c2_acpower" = "3" # ACPI(C2) = MWAIT(C3) diff --git a/src/mainboard/google/parrot/devicetree.cb b/src/mainboard/google/parrot/devicetree.cb index afc04a8..e6c8a06 100644 --- a/src/mainboard/google/parrot/devicetree.cb +++ b/src/mainboard/google/parrot/devicetree.cb @@ -26,7 +26,7 @@ end chip cpu/intel/model_206ax # Magic APIC ID to locate this chip - device lapic 0xACAC off end + device lapic 0xacac off end register "c1_acpower" = "1" # ACPI(C1) = MWAIT(C1) register "c2_acpower" = "3" # ACPI(C2) = MWAIT(C3) diff --git a/src/mainboard/google/stout/devicetree.cb b/src/mainboard/google/stout/devicetree.cb index 0fdb55e..3140782 100644 --- a/src/mainboard/google/stout/devicetree.cb +++ b/src/mainboard/google/stout/devicetree.cb @@ -28,7 +28,7 @@ end chip cpu/intel/model_206ax # Magic APIC ID to locate this chip - device lapic 0xACAC off end + device lapic 0xacac off end register "tcc_offset" = "5" # TCC of 95C diff --git a/src/mainboard/hp/2570p/devicetree.cb b/src/mainboard/hp/2570p/devicetree.cb index 753d286..e1f0cca 100644 --- a/src/mainboard/hp/2570p/devicetree.cb +++ b/src/mainboard/hp/2570p/devicetree.cb @@ -32,8 +32,7 @@ register "gpu_pch_backlight" = "0x0d9c0d9c" device cpu_cluster 0x0 on chip cpu/intel/socket_rPGA989 - device lapic 0x0 on - end + device lapic 0x0 on end end chip cpu/intel/model_206ax register "c1_acpower" = "1" @@ -42,8 +41,7 @@ register "c2_battery" = "3" register "c3_acpower" = "5" register "c3_battery" = "5" - device lapic 0xacac off - end + device lapic 0xacac off end end end device domain 0x0 on diff --git a/src/mainboard/hp/2760p/devicetree.cb b/src/mainboard/hp/2760p/devicetree.cb index 041b5e8..15f8943 100644 --- a/src/mainboard/hp/2760p/devicetree.cb +++ b/src/mainboard/hp/2760p/devicetree.cb @@ -32,8 +32,7 @@ register "gpu_pch_backlight" = "0x02880288" device cpu_cluster 0x0 on chip cpu/intel/socket_rPGA989 - device lapic 0x0 on - end + device lapic 0x0 on end end chip cpu/intel/model_206ax register "c1_acpower" = "1" @@ -42,8 +41,7 @@ register "c2_battery" = "3" register "c3_acpower" = "5" register "c3_battery" = "5" - device lapic 0xacac off - end + device lapic 0xacac off end end end device domain 0x0 on diff --git a/src/mainboard/hp/8460p/devicetree.cb b/src/mainboard/hp/8460p/devicetree.cb index 9f9efbb..2964cc8 100644 --- a/src/mainboard/hp/8460p/devicetree.cb +++ b/src/mainboard/hp/8460p/devicetree.cb @@ -32,8 +32,7 @@ register "gpu_pch_backlight" = "0x02880288" device cpu_cluster 0x0 on chip cpu/intel/socket_rPGA989 - device lapic 0x0 on - end + device lapic 0x0 on end end chip cpu/intel/model_206ax register "c1_acpower" = "1" @@ -42,8 +41,7 @@ register "c2_battery" = "3" register "c3_acpower" = "5" register "c3_battery" = "5" - device lapic 0xacac off - end + device lapic 0xacac off end end end device domain 0x0 on diff --git a/src/mainboard/hp/8470p/devicetree.cb b/src/mainboard/hp/8470p/devicetree.cb index 9d6fe3f..cf55d88 100644 --- a/src/mainboard/hp/8470p/devicetree.cb +++ b/src/mainboard/hp/8470p/devicetree.cb @@ -32,8 +32,7 @@ register "gpu_pch_backlight" = "0x0d9c0d9c" device cpu_cluster 0x0 on chip cpu/intel/socket_rPGA989 - device lapic 0x0 on - end + device lapic 0x0 on end end chip cpu/intel/model_206ax register "c1_acpower" = "1" @@ -42,8 +41,7 @@ register "c2_battery" = "3" register "c3_acpower" = "5" register "c3_battery" = "5" - device lapic 0xacac off - end + device lapic 0xacac off end end end device domain 0x0 on diff --git a/src/mainboard/hp/8770w/devicetree.cb b/src/mainboard/hp/8770w/devicetree.cb index 0487cf3..eb9ae22 100644 --- a/src/mainboard/hp/8770w/devicetree.cb +++ b/src/mainboard/hp/8770w/devicetree.cb @@ -18,8 +18,7 @@ chip northbridge/intel/sandybridge device cpu_cluster 0x0 on chip cpu/intel/socket_rPGA989 - device lapic 0x0 on - end + device lapic 0x0 on end end chip cpu/intel/model_206ax register "c1_acpower" = "1" @@ -28,8 +27,7 @@ register "c2_battery" = "3" register "c3_acpower" = "5" register "c3_battery" = "5" - device lapic 0xacac off - end + device lapic 0xacac off end end end device domain 0x0 on diff --git a/src/mainboard/hp/compaq_8200_elite_sff/devicetree.cb b/src/mainboard/hp/compaq_8200_elite_sff/devicetree.cb index 61bf43c..9d79a08 100644 --- a/src/mainboard/hp/compaq_8200_elite_sff/devicetree.cb +++ b/src/mainboard/hp/compaq_8200_elite_sff/devicetree.cb @@ -25,8 +25,7 @@ device cpu_cluster 0x0 on chip cpu/intel/socket_LGA1155 - device lapic 0x0 on - end + device lapic 0x0 on end end chip cpu/intel/model_206ax register "c1_acpower" = "1" @@ -35,8 +34,7 @@ register "c2_battery" = "3" register "c3_acpower" = "5" register "c3_battery" = "5" - device lapic 0xacac off - end + device lapic 0xacac off end end end diff --git a/src/mainboard/hp/folio_9470m/devicetree.cb b/src/mainboard/hp/folio_9470m/devicetree.cb index 56d90d3..fd81a0d 100644 --- a/src/mainboard/hp/folio_9470m/devicetree.cb +++ b/src/mainboard/hp/folio_9470m/devicetree.cb @@ -32,8 +32,7 @@ register "gpu_pch_backlight" = "0x0d9c0d9c" device cpu_cluster 0x0 on chip cpu/intel/socket_rPGA989 - device lapic 0x0 on - end + device lapic 0x0 on end end chip cpu/intel/model_206ax # FIXME: check all registers register "c1_acpower" = "1" @@ -42,8 +41,7 @@ register "c2_battery" = "3" register "c3_acpower" = "5" register "c3_battery" = "5" - device lapic 0xacac off - end + device lapic 0xacac off end end end device domain 0x0 on diff --git a/src/mainboard/hp/revolve_810_g1/devicetree.cb b/src/mainboard/hp/revolve_810_g1/devicetree.cb index 2384e71..1ee64f4 100644 --- a/src/mainboard/hp/revolve_810_g1/devicetree.cb +++ b/src/mainboard/hp/revolve_810_g1/devicetree.cb @@ -32,8 +32,7 @@ register "gpu_pch_backlight" = "0x02880288" device cpu_cluster 0x0 on chip cpu/intel/socket_rPGA989 - device lapic 0x0 on - end + device lapic 0x0 on end end chip cpu/intel/model_206ax # FIXME: check all registers register "c1_acpower" = "1" @@ -42,8 +41,7 @@ register "c2_battery" = "3" register "c3_acpower" = "5" register "c3_battery" = "5" - device lapic 0xacac off - end + device lapic 0xacac off end end end device domain 0x0 on diff --git a/src/mainboard/intel/dcp847ske/devicetree.cb b/src/mainboard/intel/dcp847ske/devicetree.cb index 4ff27fd..342e116 100644 --- a/src/mainboard/intel/dcp847ske/devicetree.cb +++ b/src/mainboard/intel/dcp847ske/devicetree.cb @@ -18,7 +18,7 @@ end chip cpu/intel/model_206ax # Magic APIC ID to locate this chip - device lapic 0xACAC off end + device lapic 0xacac off end register "c1_battery" = "1" register "c2_battery" = "3" diff --git a/src/mainboard/intel/emeraldlake2/devicetree.cb b/src/mainboard/intel/emeraldlake2/devicetree.cb index 0b3e788..ebfc055 100644 --- a/src/mainboard/intel/emeraldlake2/devicetree.cb +++ b/src/mainboard/intel/emeraldlake2/devicetree.cb @@ -18,7 +18,7 @@ end chip cpu/intel/model_206ax # Magic APIC ID to locate this chip - device lapic 0xACAC off end + device lapic 0xacac off end register "c1_battery" = "3" # ACPI(C1) = MWAIT(C3) register "c2_battery" = "4" # ACPI(C2) = MWAIT(C6) diff --git a/src/mainboard/kontron/ktqm77/devicetree.cb b/src/mainboard/kontron/ktqm77/devicetree.cb index ff5d012..204fbd3 100644 --- a/src/mainboard/kontron/ktqm77/devicetree.cb +++ b/src/mainboard/kontron/ktqm77/devicetree.cb @@ -9,7 +9,7 @@ end chip cpu/intel/model_206ax # Magic APIC ID to locate this chip - device lapic 0xACAC off end + device lapic 0xacac off end register "c1_acpower" = "1" # ACPI(C1) = MWAIT(C1) register "c2_acpower" = "4" # ACPI(C2) = MWAIT(C3) diff --git a/src/mainboard/lenovo/l520/devicetree.cb b/src/mainboard/lenovo/l520/devicetree.cb index 3e1f308..f737b18 100644 --- a/src/mainboard/lenovo/l520/devicetree.cb +++ b/src/mainboard/lenovo/l520/devicetree.cb @@ -17,8 +17,7 @@ device cpu_cluster 0x0 on chip cpu/intel/socket_rPGA989 - device lapic 0x0 on - end + device lapic 0x0 on end end chip cpu/intel/model_206ax register "c1_acpower" = "1" @@ -27,8 +26,7 @@ register "c2_battery" = "3" register "c3_acpower" = "5" register "c3_battery" = "5" - device lapic 0xacac off - end + device lapic 0xacac off end end end diff --git a/src/mainboard/lenovo/s230u/devicetree.cb b/src/mainboard/lenovo/s230u/devicetree.cb index 35135a9..1fe1f05 100644 --- a/src/mainboard/lenovo/s230u/devicetree.cb +++ b/src/mainboard/lenovo/s230u/devicetree.cb @@ -16,8 +16,7 @@ register "gpu_pch_backlight" = "0x041e041e" device cpu_cluster 0x0 on chip cpu/intel/socket_rPGA989 - device lapic 0x0 on - end + device lapic 0x0 on end end chip cpu/intel/model_206ax register "c1_acpower" = "1" @@ -26,8 +25,7 @@ register "c2_battery" = "3" register "c3_acpower" = "5" register "c3_battery" = "5" - device lapic 0xacac off - end + device lapic 0xacac off end end end device domain 0x0 on diff --git a/src/mainboard/lenovo/t420/devicetree.cb b/src/mainboard/lenovo/t420/devicetree.cb index bed406a..a69bb7e 100644 --- a/src/mainboard/lenovo/t420/devicetree.cb +++ b/src/mainboard/lenovo/t420/devicetree.cb @@ -24,7 +24,7 @@ end chip cpu/intel/model_206ax # Magic APIC ID to locate this chip - device lapic 0xACAC off end + device lapic 0xacac off end register "c1_acpower" = "1" # ACPI(C1) = MWAIT(C1) register "c2_acpower" = "3" # ACPI(C2) = MWAIT(C3) diff --git a/src/mainboard/lenovo/t420s/devicetree.cb b/src/mainboard/lenovo/t420s/devicetree.cb index a090308..9f557b4 100644 --- a/src/mainboard/lenovo/t420s/devicetree.cb +++ b/src/mainboard/lenovo/t420s/devicetree.cb @@ -23,7 +23,7 @@ end chip cpu/intel/model_206ax # Magic APIC ID to locate this chip - device lapic 0xACAC off end + device lapic 0xacac off end register "c1_acpower" = "1" # ACPI(C1) = MWAIT(C1) register "c2_acpower" = "3" # ACPI(C2) = MWAIT(C3) diff --git a/src/mainboard/lenovo/t430/devicetree.cb b/src/mainboard/lenovo/t430/devicetree.cb index 5eb92bc..72425f8 100644 --- a/src/mainboard/lenovo/t430/devicetree.cb +++ b/src/mainboard/lenovo/t430/devicetree.cb @@ -19,8 +19,7 @@ device cpu_cluster 0x0 on chip cpu/intel/socket_rPGA989 - device lapic 0x0 on - end + device lapic 0x0 on end end chip cpu/intel/model_206ax # FIXME: check all registers register "c1_acpower" = "1" @@ -29,8 +28,7 @@ register "c2_battery" = "3" register "c3_acpower" = "5" register "c3_battery" = "5" - device lapic 0xacac off - end + device lapic 0xacac off end end end diff --git a/src/mainboard/lenovo/t430s/devicetree.cb b/src/mainboard/lenovo/t430s/devicetree.cb index 56e7f63..10c6e4a 100644 --- a/src/mainboard/lenovo/t430s/devicetree.cb +++ b/src/mainboard/lenovo/t430s/devicetree.cb @@ -23,7 +23,7 @@ end chip cpu/intel/model_206ax # Magic APIC ID to locate this chip - device lapic 0xACAC off end + device lapic 0xacac off end register "c1_acpower" = "1" # ACPI(C1) = MWAIT(C1) register "c2_acpower" = "3" # ACPI(C2) = MWAIT(C3) diff --git a/src/mainboard/lenovo/t520/variants/t520/devicetree.cb b/src/mainboard/lenovo/t520/variants/t520/devicetree.cb index 97350f3..553c14d 100644 --- a/src/mainboard/lenovo/t520/variants/t520/devicetree.cb +++ b/src/mainboard/lenovo/t520/variants/t520/devicetree.cb @@ -24,7 +24,7 @@ end chip cpu/intel/model_206ax # Magic APIC ID to locate this chip - device lapic 0xACAC off end + device lapic 0xacac off end register "c1_acpower" = "1" # ACPI(C1) = MWAIT(C1) register "c2_acpower" = "3" # ACPI(C2) = MWAIT(C3) diff --git a/src/mainboard/lenovo/t520/variants/w520/devicetree.cb b/src/mainboard/lenovo/t520/variants/w520/devicetree.cb index 33b9368..1c41b56 100644 --- a/src/mainboard/lenovo/t520/variants/w520/devicetree.cb +++ b/src/mainboard/lenovo/t520/variants/w520/devicetree.cb @@ -24,7 +24,7 @@ end chip cpu/intel/model_206ax # Magic APIC ID to locate this chip - device lapic 0xACAC off end + device lapic 0xacac off end register "c1_acpower" = "1" # ACPI(C1) = MWAIT(C1) register "c2_acpower" = "3" # ACPI(C2) = MWAIT(C3) diff --git a/src/mainboard/lenovo/t530/variants/t530/devicetree.cb b/src/mainboard/lenovo/t530/variants/t530/devicetree.cb index 4dcdc9d..4114b38 100644 --- a/src/mainboard/lenovo/t530/variants/t530/devicetree.cb +++ b/src/mainboard/lenovo/t530/variants/t530/devicetree.cb @@ -24,7 +24,7 @@ end chip cpu/intel/model_206ax # Magic APIC ID to locate this chip - device lapic 0xACAC off end + device lapic 0xacac off end register "c1_acpower" = "1" # ACPI(C1) = MWAIT(C1) register "c2_acpower" = "3" # ACPI(C2) = MWAIT(C3) diff --git a/src/mainboard/lenovo/t530/variants/w530/devicetree.cb b/src/mainboard/lenovo/t530/variants/w530/devicetree.cb index 7a72b26..85add34 100644 --- a/src/mainboard/lenovo/t530/variants/w530/devicetree.cb +++ b/src/mainboard/lenovo/t530/variants/w530/devicetree.cb @@ -23,8 +23,7 @@ device cpu_cluster 0x0 on chip cpu/intel/socket_rPGA989 - device lapic 0x0 on - end + device lapic 0x0 on end end chip cpu/intel/model_206ax # FIXME: check all registers register "c1_acpower" = "1" @@ -33,8 +32,7 @@ register "c2_battery" = "3" register "c3_acpower" = "5" register "c3_battery" = "5" - device lapic 0xacac off - end + device lapic 0xacac off end end end diff --git a/src/mainboard/lenovo/x1_carbon_gen1/devicetree.cb b/src/mainboard/lenovo/x1_carbon_gen1/devicetree.cb index cb88a7f..75c49ad 100644 --- a/src/mainboard/lenovo/x1_carbon_gen1/devicetree.cb +++ b/src/mainboard/lenovo/x1_carbon_gen1/devicetree.cb @@ -21,7 +21,7 @@ end chip cpu/intel/model_206ax # Magic APIC ID to locate this chip - device lapic 0xACAC off end + device lapic 0xacac off end register "c1_acpower" = "1" # ACPI(C1) = MWAIT(C1) register "c2_acpower" = "3" # ACPI(C2) = MWAIT(C3) diff --git a/src/mainboard/lenovo/x220/devicetree.cb b/src/mainboard/lenovo/x220/devicetree.cb index 2a1507c..74d969f 100644 --- a/src/mainboard/lenovo/x220/devicetree.cb +++ b/src/mainboard/lenovo/x220/devicetree.cb @@ -24,7 +24,7 @@ end chip cpu/intel/model_206ax # Magic APIC ID to locate this chip - device lapic 0xACAC off end + device lapic 0xacac off end register "c1_acpower" = "1" # ACPI(C1) = MWAIT(C1) register "c2_acpower" = "3" # ACPI(C2) = MWAIT(C3) diff --git a/src/mainboard/lenovo/x230/devicetree.cb b/src/mainboard/lenovo/x230/devicetree.cb index a31be72..cab0368 100644 --- a/src/mainboard/lenovo/x230/devicetree.cb +++ b/src/mainboard/lenovo/x230/devicetree.cb @@ -24,7 +24,7 @@ end chip cpu/intel/model_206ax # Magic APIC ID to locate this chip - device lapic 0xACAC off end + device lapic 0xacac off end register "c1_acpower" = "1" # ACPI(C1) = MWAIT(C1) register "c2_acpower" = "3" # ACPI(C2) = MWAIT(C3) diff --git a/src/mainboard/roda/rv11/variants/rv11/devicetree.cb b/src/mainboard/roda/rv11/variants/rv11/devicetree.cb index 4455fdb..d4a37c1 100644 --- a/src/mainboard/roda/rv11/variants/rv11/devicetree.cb +++ b/src/mainboard/roda/rv11/variants/rv11/devicetree.cb @@ -36,7 +36,7 @@ end chip cpu/intel/model_206ax # Magic APIC ID to locate this chip - device lapic 0xACAC off end + device lapic 0xacac off end register "c1_acpower" = "1" # ACPI(C1) = MWAIT(C1) register "c2_acpower" = "4" # ACPI(C2) = MWAIT(C6) diff --git a/src/mainboard/roda/rv11/variants/rw11/devicetree.cb b/src/mainboard/roda/rv11/variants/rw11/devicetree.cb index b51c86e..d7abde8 100644 --- a/src/mainboard/roda/rv11/variants/rw11/devicetree.cb +++ b/src/mainboard/roda/rv11/variants/rw11/devicetree.cb @@ -36,7 +36,7 @@ end chip cpu/intel/model_206ax # Magic APIC ID to locate this chip - device lapic 0xACAC off end + device lapic 0xacac off end register "c1_acpower" = "1" # ACPI(C1) = MWAIT(C1) register "c2_acpower" = "4" # ACPI(C2) = MWAIT(C6) diff --git a/src/mainboard/samsung/lumpy/devicetree.cb b/src/mainboard/samsung/lumpy/devicetree.cb index b34d024..ee8df2a 100644 --- a/src/mainboard/samsung/lumpy/devicetree.cb +++ b/src/mainboard/samsung/lumpy/devicetree.cb @@ -26,7 +26,7 @@ end chip cpu/intel/model_206ax # Magic APIC ID to locate this chip - device lapic 0xACAC off end + device lapic 0xacac off end register "c1_acpower" = "1" # ACPI(C1) = MWAIT(C1) register "c2_acpower" = "3" # ACPI(C2) = MWAIT(C3) diff --git a/src/mainboard/samsung/stumpy/devicetree.cb b/src/mainboard/samsung/stumpy/devicetree.cb index 825dfa0..43a014f 100644 --- a/src/mainboard/samsung/stumpy/devicetree.cb +++ b/src/mainboard/samsung/stumpy/devicetree.cb @@ -20,7 +20,7 @@ end chip cpu/intel/model_206ax # Magic APIC ID to locate this chip - device lapic 0xACAC off end + device lapic 0xacac off end register "c1_battery" = "3" # ACPI(C1) = MWAIT(C3) register "c2_battery" = "4" # ACPI(C2) = MWAIT(C6) diff --git a/src/mainboard/sapphire/pureplatinumh61/devicetree.cb b/src/mainboard/sapphire/pureplatinumh61/devicetree.cb index ed0d997..f8cd3b2 100644 --- a/src/mainboard/sapphire/pureplatinumh61/devicetree.cb +++ b/src/mainboard/sapphire/pureplatinumh61/devicetree.cb @@ -32,8 +32,7 @@ register "gpu_pch_backlight" = "0x00000000" device cpu_cluster 0x0 on chip cpu/intel/socket_LGA1155 - device lapic 0x0 on - end + device lapic 0x0 on end end chip cpu/intel/model_206ax register "c1_acpower" = "1" @@ -42,8 +41,7 @@ register "c2_battery" = "3" register "c3_acpower" = "5" register "c3_battery" = "5" - device lapic 0xacac off - end + device lapic 0xacac off end end end device domain 0x0 on -- To view, visit https://review.coreboot.org/c/coreboot/+/31030 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: If36419fbee9628b591116604bf32fe00a4f08c17 Gerrit-Change-Number: 31030 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: newchange

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coreboot-gerrit January 2019