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Change in ...coreboot[master]: nb/intel/pineview: Use parallel MP init
by Patrick Georgi (Code Review) 23 Jan '19

23 Jan '19

Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/25602 ) Change subject: nb/intel/pineview: Use parallel MP init ...................................................................... Patch Set 40: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/25602 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I89f7d514d75fe933c3a8858da37004419189674b Gerrit-Change-Number: 25602 Gerrit-PatchSet: 40 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Damien Zammit <damien(a)zamaudio.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 23 Jan 2019 14:49:54 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in ...coreboot[master]: nb/intel/x4x: Use parallel MP init
by Patrick Georgi (Code Review) 23 Jan '19

23 Jan '19

Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/25601 ) Change subject: nb/intel/x4x: Use parallel MP init ...................................................................... nb/intel/x4x: Use parallel MP init Use parallel MP init code to initialize all AP's. Also remove guards around CPU code where all platforms now use parallel MP init. This also removes the code required on lapic init path for model_6fx, model_1017x and model_f4x as all platforms now use the parallel MP code. Tested on Intel DG41WV, shaves off about 90ms on a quad core. Change-Id: Id5a2729f5bf6b525abad577e63d7953ae6640921 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/25601 Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/cpu/intel/model_1067x/model_1067x_init.c M src/cpu/intel/model_6fx/model_6fx_init.c M src/cpu/intel/model_f4x/model_f4x_init.c M src/mainboard/asrock/g41c-gs/cmos.layout M src/mainboard/foxconn/g41s-k/cmos.layout M src/mainboard/gigabyte/ga-g41m-es2l/cmos.layout M src/northbridge/intel/x4x/Kconfig M src/northbridge/intel/x4x/northbridge.c M src/southbridge/intel/i82801jx/lpc.c 9 files changed, 2 insertions(+), 78 deletions(-) Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved diff --git a/src/cpu/intel/model_1067x/model_1067x_init.c b/src/cpu/intel/model_1067x/model_1067x_init.c index 8f8af57..275ff70 100644 --- a/src/cpu/intel/model_1067x/model_1067x_init.c +++ b/src/cpu/intel/model_1067x/model_1067x_init.c @@ -19,13 +19,10 @@ #include <device/device.h> #include <string.h> #include <cpu/cpu.h> -#include <cpu/x86/mtrr.h> #include <cpu/x86/msr.h> #include <cpu/x86/mp.h> #include <cpu/x86/lapic.h> -#include <cpu/intel/microcode.h> #include <cpu/intel/speedstep.h> -#include <cpu/intel/hyperthreading.h> #include <cpu/x86/cache.h> #include <cpu/x86/name.h> #include <cpu/intel/smm/gen1/smi.h> @@ -280,20 +277,10 @@ /* Turn on caching if we haven't already */ x86_enable_cache(); - /* Update the microcode */ - if (!IS_ENABLED(CONFIG_PARALLEL_MP)) - intel_update_microcode_from_cbfs(); - /* Print processor name */ fill_processor_name(processor_name); printk(BIOS_INFO, "CPU: %s.\n", processor_name); - /* Setup MTRRs */ - if (!IS_ENABLED(CONFIG_PARALLEL_MP)) { - x86_setup_mtrrs(); - x86_mtrr_check(); - } - /* Enable the local CPU APICs */ setup_lapic(); @@ -318,10 +305,6 @@ /* PIC thermal sensor control */ configure_pic_thermal_sensors(tm2, quad); - - /* Start up my CPU siblings */ - if (!IS_ENABLED(CONFIG_PARALLEL_MP)) - intel_sibling_init(cpu); } static struct device_operations cpu_dev_ops = { diff --git a/src/cpu/intel/model_6fx/model_6fx_init.c b/src/cpu/intel/model_6fx/model_6fx_init.c index a502826c..16ddcc4 100644 --- a/src/cpu/intel/model_6fx/model_6fx_init.c +++ b/src/cpu/intel/model_6fx/model_6fx_init.c @@ -18,11 +18,8 @@ #include <device/device.h> #include <string.h> #include <cpu/cpu.h> -#include <cpu/x86/mtrr.h> #include <cpu/x86/msr.h> #include <cpu/x86/lapic.h> -#include <cpu/intel/hyperthreading.h> -#include <cpu/intel/microcode.h> #include <cpu/intel/speedstep.h> #include <cpu/x86/cache.h> #include <cpu/x86/name.h> @@ -132,20 +129,10 @@ /* Turn on caching if we haven't already */ x86_enable_cache(); - /* Update the microcode */ - if (!IS_ENABLED(CONFIG_PARALLEL_MP)) - intel_update_microcode_from_cbfs(); - /* Print processor name */ fill_processor_name(processor_name); printk(BIOS_INFO, "CPU: %s.\n", processor_name); - /* Setup MTRRs */ - if (!IS_ENABLED(CONFIG_PARALLEL_MP)) { - x86_setup_mtrrs(); - x86_mtrr_check(); - } - /* Setup Page Attribute Tables (PAT) */ // TODO set up PAT @@ -163,10 +150,6 @@ /* PIC thermal sensor control */ configure_pic_thermal_sensors(); - - /* Start up my CPU siblings */ - if (!IS_ENABLED(CONFIG_PARALLEL_MP)) - intel_sibling_init(cpu); } static struct device_operations cpu_dev_ops = { diff --git a/src/cpu/intel/model_f4x/model_f4x_init.c b/src/cpu/intel/model_f4x/model_f4x_init.c index 1b3cfe9..941bee1 100644 --- a/src/cpu/intel/model_f4x/model_f4x_init.c +++ b/src/cpu/intel/model_f4x/model_f4x_init.c @@ -13,10 +13,7 @@ #include <device/device.h> #include <cpu/cpu.h> -#include <cpu/x86/mtrr.h> #include <cpu/x86/lapic.h> -#include <cpu/intel/microcode.h> -#include <cpu/intel/hyperthreading.h> #include <cpu/x86/cache.h> static void model_f4x_init(struct device *cpu) @@ -24,21 +21,8 @@ /* Turn on caching if we haven't already */ x86_enable_cache(); - if (!IS_ENABLED(CONFIG_PARALLEL_MP) && !intel_ht_sibling()) { - /* MTRRs are shared between threads */ - x86_setup_mtrrs(); - x86_mtrr_check(); - - /* Update the microcode */ - intel_update_microcode_from_cbfs(); - } - /* Enable the local CPU APICs */ setup_lapic(); - - /* Start up my CPU siblings */ - if (!IS_ENABLED(CONFIG_PARALLEL_MP)) - intel_sibling_init(cpu); }; static struct device_operations cpu_dev_ops = { diff --git a/src/mainboard/asrock/g41c-gs/cmos.layout b/src/mainboard/asrock/g41c-gs/cmos.layout index 57c30ae..e6df510 100644 --- a/src/mainboard/asrock/g41c-gs/cmos.layout +++ b/src/mainboard/asrock/g41c-gs/cmos.layout @@ -56,7 +56,6 @@ 409 2 e 7 power_on_after_fail # coreboot config options: cpu -#424 1 e 2 hyper_threading #425 7 r 0 unused # coreboot config options: northbridge diff --git a/src/mainboard/foxconn/g41s-k/cmos.layout b/src/mainboard/foxconn/g41s-k/cmos.layout index 57c30ae..e6df510 100644 --- a/src/mainboard/foxconn/g41s-k/cmos.layout +++ b/src/mainboard/foxconn/g41s-k/cmos.layout @@ -56,7 +56,6 @@ 409 2 e 7 power_on_after_fail # coreboot config options: cpu -#424 1 e 2 hyper_threading #425 7 r 0 unused # coreboot config options: northbridge diff --git a/src/mainboard/gigabyte/ga-g41m-es2l/cmos.layout b/src/mainboard/gigabyte/ga-g41m-es2l/cmos.layout index 4da0e96..749f91d 100644 --- a/src/mainboard/gigabyte/ga-g41m-es2l/cmos.layout +++ b/src/mainboard/gigabyte/ga-g41m-es2l/cmos.layout @@ -57,7 +57,6 @@ 409 2 e 7 power_on_after_fail # coreboot config options: cpu -#424 1 e 2 hyper_threading #425 7 r 0 unused # coreboot config options: northbridge diff --git a/src/northbridge/intel/x4x/Kconfig b/src/northbridge/intel/x4x/Kconfig index 117ac03..6f3546f 100644 --- a/src/northbridge/intel/x4x/Kconfig +++ b/src/northbridge/intel/x4x/Kconfig @@ -29,6 +29,7 @@ select POSTCAR_STAGE select POSTCAR_CONSOLE select SMM_TSEG + select PARALLEL_MP config CBFS_SIZE hex diff --git a/src/northbridge/intel/x4x/northbridge.c b/src/northbridge/intel/x4x/northbridge.c index 7de39d1..4b5a754 100644 --- a/src/northbridge/intel/x4x/northbridge.c +++ b/src/northbridge/intel/x4x/northbridge.c @@ -182,26 +182,6 @@ pci_write_config8(dev, D0F0_SMRAM, smram); } -/* - * Really doesn't belong here but will go away with parallel mp init, - * so let it be here for a while... - */ -int cpu_get_apic_id_map(int *apic_id_map) -{ - unsigned int i; - - /* Logical processors (threads) per core */ - const struct cpuid_result cpuid1 = cpuid(1); - /* Read number of cores. */ - const char cores = (cpuid1.ebx >> 16) & 0xf; - - /* TODO in parallel MP cpuid(1).ebx */ - for (i = 0; i < cores; i++) - apic_id_map[i] = i; - - return cores; -} - static struct device_operations pci_domain_ops = { .read_resources = mch_domain_read_resources, .set_resources = mch_domain_set_resources, @@ -215,7 +195,7 @@ static void cpu_bus_init(struct device *dev) { - initialize_cpus(dev->link_list); + bsp_init_and_start_aps(dev->link_list); } static struct device_operations cpu_bus_ops = { diff --git a/src/southbridge/intel/i82801jx/lpc.c b/src/southbridge/intel/i82801jx/lpc.c index 3f7095c..b06959a 100644 --- a/src/southbridge/intel/i82801jx/lpc.c +++ b/src/southbridge/intel/i82801jx/lpc.c @@ -392,10 +392,6 @@ printk(BIOS_DEBUG, "S3 wakeup, enabling ACPI via APMC\n"); outb(APM_CNT_ACPI_ENABLE, APM_CNT); } - /* Don't allow evil boot loaders, kernels, or - * userspace applications to deceive us: - */ - smm_lock(); #if TEST_SMM_FLASH_LOCKDOWN /* Now try this: */ -- To view, visit https://review.coreboot.org/c/coreboot/+/25601 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Id5a2729f5bf6b525abad577e63d7953ae6640921 Gerrit-Change-Number: 25601 Gerrit-PatchSet: 43 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Damien Zammit <damien(a)zamaudio.com> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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Change in ...coreboot[master]: nb/intel/i945: Use parallel MP init
by Patrick Georgi (Code Review) 23 Jan '19

23 Jan '19

Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/25600 ) Change subject: nb/intel/i945: Use parallel MP init ...................................................................... nb/intel/i945: Use parallel MP init Use the parallel mp init path to initialize AP's. This should result in a moderate speedup. Tested on Intel D945GCLF (1 core 2 threads), still boots fine and is 26ms faster compared to lapic_cpu_init. This removes the option to disable HT siblings. Change-Id: I955551b99e9cbc397f99c2a6bd355c6070390bcb Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/25600 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas(a)noos.fr> --- M src/cpu/intel/model_106cx/Makefile.inc M src/cpu/intel/model_106cx/model_106cx_init.c M src/cpu/intel/model_6ex/Makefile.inc M src/cpu/intel/model_6ex/model_6ex_init.c M src/cpu/intel/model_f3x/Makefile.inc M src/cpu/intel/model_f3x/model_f3x_init.c M src/cpu/intel/model_f4x/Makefile.inc M src/cpu/intel/model_f4x/model_f4x_init.c M src/mainboard/apple/macbook21/cmos.default M src/mainboard/apple/macbook21/cmos.layout M src/mainboard/asus/p5gc-mx/cmos.default M src/mainboard/asus/p5gc-mx/cmos.layout M src/mainboard/getac/p470/cmos.layout M src/mainboard/gigabyte/ga-945gcm-s2l/cmos.default M src/mainboard/gigabyte/ga-945gcm-s2l/cmos.layout M src/mainboard/ibase/mb899/cmos.layout M src/mainboard/intel/d945gclf/cmos.default M src/mainboard/intel/d945gclf/cmos.layout M src/mainboard/kontron/986lcd-m/cmos.layout M src/mainboard/lenovo/t60/cmos.default M src/mainboard/lenovo/t60/cmos.layout M src/mainboard/lenovo/x60/cmos.default M src/mainboard/lenovo/x60/cmos.layout M src/mainboard/lenovo/z61t/cmos.default M src/mainboard/lenovo/z61t/cmos.layout M src/mainboard/roda/rk886ex/cmos.layout M src/northbridge/intel/i945/Kconfig M src/northbridge/intel/i945/northbridge.c M src/southbridge/intel/i82801gx/lpc.c 29 files changed, 22 insertions(+), 61 deletions(-) Approvals: build bot (Jenkins): Verified HAOUAS Elyes: Looks good to me, approved diff --git a/src/cpu/intel/model_106cx/Makefile.inc b/src/cpu/intel/model_106cx/Makefile.inc index 0703099..eec544d 100644 --- a/src/cpu/intel/model_106cx/Makefile.inc +++ b/src/cpu/intel/model_106cx/Makefile.inc @@ -2,5 +2,6 @@ subdirs-y += ../../x86/name subdirs-y += ../common subdirs-$(CONFIG_SMM_TSEG) += ../smm/gen1 +ramstage-$(CONFIG_PARALLEL_MP) += ../model_1067x/mp_init.c cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_106cx/microcode.bin diff --git a/src/cpu/intel/model_106cx/model_106cx_init.c b/src/cpu/intel/model_106cx/model_106cx_init.c index a609aed..24a9ad2 100644 --- a/src/cpu/intel/model_106cx/model_106cx_init.c +++ b/src/cpu/intel/model_106cx/model_106cx_init.c @@ -85,15 +85,18 @@ x86_enable_cache(); /* Update the microcode */ - intel_update_microcode_from_cbfs(); + if (!IS_ENABLED(CONFIG_PARALLEL_MP)) + intel_update_microcode_from_cbfs(); /* Print processor name */ fill_processor_name(processor_name); printk(BIOS_INFO, "CPU: %s.\n", processor_name); /* Setup MTRRs */ - x86_setup_mtrrs(); - x86_mtrr_check(); + if (!IS_ENABLED(CONFIG_PARALLEL_MP)) { + x86_setup_mtrrs(); + x86_mtrr_check(); + } /* Enable the local CPU APICs */ setup_lapic(); @@ -110,7 +113,8 @@ /* TODO: PIC thermal sensor control */ /* Start up my CPU siblings */ - intel_sibling_init(cpu); + if (!IS_ENABLED(CONFIG_PARALLEL_MP)) + intel_sibling_init(cpu); } static struct device_operations cpu_dev_ops = { diff --git a/src/cpu/intel/model_6ex/Makefile.inc b/src/cpu/intel/model_6ex/Makefile.inc index 13e08f0..46ae7c7 100644 --- a/src/cpu/intel/model_6ex/Makefile.inc +++ b/src/cpu/intel/model_6ex/Makefile.inc @@ -2,5 +2,6 @@ subdirs-y += ../../x86/name subdirs-y += ../common subdirs-$(CONFIG_SMM_TSEG) += ../smm/gen1 +ramstage-y += ../model_1067x/mp_init.c cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_6ex/microcode.bin diff --git a/src/cpu/intel/model_6ex/model_6ex_init.c b/src/cpu/intel/model_6ex/model_6ex_init.c index 78ece74..72a259d 100644 --- a/src/cpu/intel/model_6ex/model_6ex_init.c +++ b/src/cpu/intel/model_6ex/model_6ex_init.c @@ -18,11 +18,8 @@ #include <device/device.h> #include <string.h> #include <cpu/cpu.h> -#include <cpu/x86/mtrr.h> #include <cpu/x86/msr.h> #include <cpu/x86/lapic.h> -#include <cpu/intel/hyperthreading.h> -#include <cpu/intel/microcode.h> #include <cpu/intel/speedstep.h> #include <cpu/x86/cache.h> #include <cpu/x86/name.h> @@ -118,17 +115,10 @@ /* Turn on caching if we haven't already */ x86_enable_cache(); - /* Update the microcode */ - intel_update_microcode_from_cbfs(); - /* Print processor name */ fill_processor_name(processor_name); printk(BIOS_INFO, "CPU: %s.\n", processor_name); - /* Setup MTRRs */ - x86_setup_mtrrs(); - x86_mtrr_check(); - /* Setup Page Attribute Tables (PAT) */ // TODO set up PAT @@ -146,9 +136,6 @@ /* PIC thermal sensor control */ configure_pic_thermal_sensors(); - - /* Start up my CPU siblings */ - intel_sibling_init(cpu); } static struct device_operations cpu_dev_ops = { diff --git a/src/cpu/intel/model_f3x/Makefile.inc b/src/cpu/intel/model_f3x/Makefile.inc index 7367914..19b2e93 100644 --- a/src/cpu/intel/model_f3x/Makefile.inc +++ b/src/cpu/intel/model_f3x/Makefile.inc @@ -1,4 +1,5 @@ ramstage-y += model_f3x_init.c subdirs-$(CONFIG_SMM_TSEG) += ../smm/gen1 +ramstage-$(CONFIG_PARALLEL_MP) += ../model_1067x/mp_init.c cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_f3x/microcode.bin diff --git a/src/cpu/intel/model_f3x/model_f3x_init.c b/src/cpu/intel/model_f3x/model_f3x_init.c index b71e279..fc0db17 100644 --- a/src/cpu/intel/model_f3x/model_f3x_init.c +++ b/src/cpu/intel/model_f3x/model_f3x_init.c @@ -24,7 +24,7 @@ /* Turn on caching if we haven't already */ x86_enable_cache(); - if (!intel_ht_sibling()) { + if (!IS_ENABLED(CONFIG_PARALLEL_MP) && !intel_ht_sibling()) { /* MTRRs are shared between threads */ x86_setup_mtrrs(); x86_mtrr_check(); @@ -37,7 +37,8 @@ setup_lapic(); /* Start up my CPU siblings */ - intel_sibling_init(cpu); + if (!IS_ENABLED(CONFIG_PARALLEL_MP)) + intel_sibling_init(cpu); }; static struct device_operations cpu_dev_ops = { diff --git a/src/cpu/intel/model_f4x/Makefile.inc b/src/cpu/intel/model_f4x/Makefile.inc index 2f11d7f..6fbc9ae 100644 --- a/src/cpu/intel/model_f4x/Makefile.inc +++ b/src/cpu/intel/model_f4x/Makefile.inc @@ -1,4 +1,5 @@ ramstage-y += model_f4x_init.c subdirs-$(CONFIG_SMM_TSEG) += ../smm/gen1 +ramstage-$(CONFIG_PARALLEL_MP) += ../model_1067x/mp_init.c cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_f4x/microcode.bin diff --git a/src/cpu/intel/model_f4x/model_f4x_init.c b/src/cpu/intel/model_f4x/model_f4x_init.c index a5322d7..1b3cfe9 100644 --- a/src/cpu/intel/model_f4x/model_f4x_init.c +++ b/src/cpu/intel/model_f4x/model_f4x_init.c @@ -24,7 +24,7 @@ /* Turn on caching if we haven't already */ x86_enable_cache(); - if (!intel_ht_sibling()) { + if (!IS_ENABLED(CONFIG_PARALLEL_MP) && !intel_ht_sibling()) { /* MTRRs are shared between threads */ x86_setup_mtrrs(); x86_mtrr_check(); @@ -37,7 +37,8 @@ setup_lapic(); /* Start up my CPU siblings */ - intel_sibling_init(cpu); + if (!IS_ENABLED(CONFIG_PARALLEL_MP)) + intel_sibling_init(cpu); }; static struct device_operations cpu_dev_ops = { diff --git a/src/mainboard/apple/macbook21/cmos.default b/src/mainboard/apple/macbook21/cmos.default index ad126ca..cf1bc456 100644 --- a/src/mainboard/apple/macbook21/cmos.default +++ b/src/mainboard/apple/macbook21/cmos.default @@ -1,6 +1,5 @@ boot_option=Fallback debug_level=Debug -hyper_threading=Enable nmi=Enable boot_devices='' boot_default=0x40 diff --git a/src/mainboard/apple/macbook21/cmos.layout b/src/mainboard/apple/macbook21/cmos.layout index 554d608..39bf608 100644 --- a/src/mainboard/apple/macbook21/cmos.layout +++ b/src/mainboard/apple/macbook21/cmos.layout @@ -53,7 +53,6 @@ #399 1 r 0 unused # coreboot config options: cpu -400 1 e 2 hyper_threading #401 7 r 0 unused # coreboot config options: southbridge diff --git a/src/mainboard/asus/p5gc-mx/cmos.default b/src/mainboard/asus/p5gc-mx/cmos.default index 2cb37df..e842a7d 100644 --- a/src/mainboard/asus/p5gc-mx/cmos.default +++ b/src/mainboard/asus/p5gc-mx/cmos.default @@ -1,6 +1,5 @@ boot_option=Fallback debug_level=Debug -hyper_threading=Enable nmi=Enable boot_devices='' gfx_uma_size=8M diff --git a/src/mainboard/asus/p5gc-mx/cmos.layout b/src/mainboard/asus/p5gc-mx/cmos.layout index 4ca560c..187b910 100644 --- a/src/mainboard/asus/p5gc-mx/cmos.layout +++ b/src/mainboard/asus/p5gc-mx/cmos.layout @@ -31,7 +31,6 @@ #399 1 r 0 unused # coreboot config options: cpu -400 1 e 2 hyper_threading #401 7 r 0 unused # coreboot config options: southbridge diff --git a/src/mainboard/getac/p470/cmos.layout b/src/mainboard/getac/p470/cmos.layout index f054851..fd627a5 100644 --- a/src/mainboard/getac/p470/cmos.layout +++ b/src/mainboard/getac/p470/cmos.layout @@ -53,7 +53,6 @@ #399 1 r 0 unused # coreboot config options: cpu -400 1 e 2 hyper_threading #401 7 r 0 unused # coreboot config options: southbridge diff --git a/src/mainboard/gigabyte/ga-945gcm-s2l/cmos.default b/src/mainboard/gigabyte/ga-945gcm-s2l/cmos.default index 2cb37df..e842a7d 100644 --- a/src/mainboard/gigabyte/ga-945gcm-s2l/cmos.default +++ b/src/mainboard/gigabyte/ga-945gcm-s2l/cmos.default @@ -1,6 +1,5 @@ boot_option=Fallback debug_level=Debug -hyper_threading=Enable nmi=Enable boot_devices='' gfx_uma_size=8M diff --git a/src/mainboard/gigabyte/ga-945gcm-s2l/cmos.layout b/src/mainboard/gigabyte/ga-945gcm-s2l/cmos.layout index bdc264b..881fd41 100644 --- a/src/mainboard/gigabyte/ga-945gcm-s2l/cmos.layout +++ b/src/mainboard/gigabyte/ga-945gcm-s2l/cmos.layout @@ -52,7 +52,6 @@ #399 1 r 0 unused # coreboot config options: cpu -400 1 e 2 hyper_threading #401 7 r 0 unused # coreboot config options: southbridge diff --git a/src/mainboard/ibase/mb899/cmos.layout b/src/mainboard/ibase/mb899/cmos.layout index 5b1799b..daa2999 100644 --- a/src/mainboard/ibase/mb899/cmos.layout +++ b/src/mainboard/ibase/mb899/cmos.layout @@ -52,7 +52,6 @@ #399 1 r 0 unused # coreboot config options: cpu -400 1 e 2 hyper_threading #401 7 r 0 unused # coreboot config options: southbridge diff --git a/src/mainboard/intel/d945gclf/cmos.default b/src/mainboard/intel/d945gclf/cmos.default index 2cb37df..e842a7d 100644 --- a/src/mainboard/intel/d945gclf/cmos.default +++ b/src/mainboard/intel/d945gclf/cmos.default @@ -1,6 +1,5 @@ boot_option=Fallback debug_level=Debug -hyper_threading=Enable nmi=Enable boot_devices='' gfx_uma_size=8M diff --git a/src/mainboard/intel/d945gclf/cmos.layout b/src/mainboard/intel/d945gclf/cmos.layout index bdc264b..881fd41 100644 --- a/src/mainboard/intel/d945gclf/cmos.layout +++ b/src/mainboard/intel/d945gclf/cmos.layout @@ -52,7 +52,6 @@ #399 1 r 0 unused # coreboot config options: cpu -400 1 e 2 hyper_threading #401 7 r 0 unused # coreboot config options: southbridge diff --git a/src/mainboard/kontron/986lcd-m/cmos.layout b/src/mainboard/kontron/986lcd-m/cmos.layout index dfa0cad..135c19a 100644 --- a/src/mainboard/kontron/986lcd-m/cmos.layout +++ b/src/mainboard/kontron/986lcd-m/cmos.layout @@ -52,7 +52,6 @@ #399 1 r 0 unused # coreboot config options: cpu -400 1 e 2 hyper_threading #401 7 r 0 unused # coreboot config options: southbridge diff --git a/src/mainboard/lenovo/t60/cmos.default b/src/mainboard/lenovo/t60/cmos.default index d6479af..af865f1 100644 --- a/src/mainboard/lenovo/t60/cmos.default +++ b/src/mainboard/lenovo/t60/cmos.default @@ -1,6 +1,5 @@ boot_option=Fallback debug_level=Debug -hyper_threading=Enable nmi=Enable boot_devices='' boot_default=0x41 diff --git a/src/mainboard/lenovo/t60/cmos.layout b/src/mainboard/lenovo/t60/cmos.layout index fd6b25f..d7ff0f2 100644 --- a/src/mainboard/lenovo/t60/cmos.layout +++ b/src/mainboard/lenovo/t60/cmos.layout @@ -69,7 +69,6 @@ #938 7 r 0 unused # coreboot config options: cpu -944 1 e 2 hyper_threading #945 3 r 0 unused # coreboot config options: ec diff --git a/src/mainboard/lenovo/x60/cmos.default b/src/mainboard/lenovo/x60/cmos.default index f17d57c..5c3576d 100644 --- a/src/mainboard/lenovo/x60/cmos.default +++ b/src/mainboard/lenovo/x60/cmos.default @@ -1,6 +1,5 @@ boot_option=Fallback debug_level=Debug -hyper_threading=Enable nmi=Enable boot_devices='' boot_default=0x40 diff --git a/src/mainboard/lenovo/x60/cmos.layout b/src/mainboard/lenovo/x60/cmos.layout index b5a31ca..bfc78bc 100644 --- a/src/mainboard/lenovo/x60/cmos.layout +++ b/src/mainboard/lenovo/x60/cmos.layout @@ -69,7 +69,6 @@ #938 6 r 0 unused # coreboot config options: cpu -944 1 e 2 hyper_threading #945 4 r 0 unused # coreboot config options: ec diff --git a/src/mainboard/lenovo/z61t/cmos.default b/src/mainboard/lenovo/z61t/cmos.default index d6479af..af865f1 100644 --- a/src/mainboard/lenovo/z61t/cmos.default +++ b/src/mainboard/lenovo/z61t/cmos.default @@ -1,6 +1,5 @@ boot_option=Fallback debug_level=Debug -hyper_threading=Enable nmi=Enable boot_devices='' boot_default=0x41 diff --git a/src/mainboard/lenovo/z61t/cmos.layout b/src/mainboard/lenovo/z61t/cmos.layout index bb3b94a..b9e2b44 100644 --- a/src/mainboard/lenovo/z61t/cmos.layout +++ b/src/mainboard/lenovo/z61t/cmos.layout @@ -68,7 +68,6 @@ #938 7 r 0 unused # coreboot config options: cpu -944 1 e 2 hyper_threading #945 3 r 0 unused # coreboot config options: ec diff --git a/src/mainboard/roda/rk886ex/cmos.layout b/src/mainboard/roda/rk886ex/cmos.layout index 618745a..57ffa43 100644 --- a/src/mainboard/roda/rk886ex/cmos.layout +++ b/src/mainboard/roda/rk886ex/cmos.layout @@ -53,7 +53,6 @@ #399 1 r 0 unused # coreboot config options: cpu -400 1 e 2 hyper_threading #401 7 r 0 unused # coreboot config options: southbridge diff --git a/src/northbridge/intel/i945/Kconfig b/src/northbridge/intel/i945/Kconfig index 92bf652..996e1d9 100644 --- a/src/northbridge/intel/i945/Kconfig +++ b/src/northbridge/intel/i945/Kconfig @@ -30,6 +30,7 @@ select POSTCAR_STAGE select POSTCAR_CONSOLE select SMM_TSEG + select PARALLEL_MP config NORTHBRIDGE_INTEL_SUBTYPE_I945GC def_bool n diff --git a/src/northbridge/intel/i945/northbridge.c b/src/northbridge/intel/i945/northbridge.c index 10a7ba4..7c209dc 100644 --- a/src/northbridge/intel/i945/northbridge.c +++ b/src/northbridge/intel/i945/northbridge.c @@ -165,26 +165,6 @@ pci_write_config8(dev, SMRAM, smram); } -/* - * Really doesn't belong here but will go away with parallel mp init, - * so let it be here for a while... - */ -int cpu_get_apic_id_map(int *apic_id_map) -{ - unsigned int i; - - /* Logical processors (threads) per core */ - const struct cpuid_result cpuid1 = cpuid(1); - /* Read number of cores. */ - const char cores = (cpuid1.ebx >> 16) & 0xf; - - /* TODO in parallel MP cpuid(1).ebx */ - for (i = 0; i < cores; i++) - apic_id_map[i] = i; - - return cores; -} - /* TODO We could determine how many PCIe busses we need in * the bar. For now that number is hardcoded to a max of 64. * See e7525/northbridge.c for an example. @@ -249,7 +229,7 @@ static void cpu_bus_init(struct device *dev) { - initialize_cpus(dev->link_list); + bsp_init_and_start_aps(dev->link_list); } static struct device_operations cpu_bus_ops = { diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c index b20b2aa..5ad05c7 100644 --- a/src/southbridge/intel/i82801gx/lpc.c +++ b/src/southbridge/intel/i82801gx/lpc.c @@ -353,7 +353,8 @@ /* Don't allow evil boot loaders, kernels, or * userspace applications to deceive us: */ - smm_lock(); + if (!IS_ENABLED(CONFIG_PARALLEL_MP)) + smm_lock(); #if TEST_SMM_FLASH_LOCKDOWN /* Now try this: */ -- To view, visit https://review.coreboot.org/c/coreboot/+/25600 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I955551b99e9cbc397f99c2a6bd355c6070390bcb Gerrit-Change-Number: 25600 Gerrit-PatchSet: 43 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

1 0

Change in ...coreboot[master]: nb/intel/gm45: Use parallel MP init
by Patrick Georgi (Code Review) 23 Jan '19

23 Jan '19

Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/23434 ) Change subject: nb/intel/gm45: Use parallel MP init ...................................................................... nb/intel/gm45: Use parallel MP init This places the parallel mp ops up in the model_1067x dir and is included from other Intel core2 CPU dirs that can use the same code. Tested on Thinkpad X200 on which boot time is reduced by ~35ms. Change-Id: Iac416f671407246ee223075eee1aff511e612889 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/23434 Reviewed-by: Angel Pons <th3fanbus(a)gmail.com> Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/cpu/intel/model_1067x/Makefile.inc M src/cpu/intel/model_1067x/model_1067x_init.c A src/cpu/intel/model_1067x/mp_init.c M src/cpu/intel/model_6fx/Makefile.inc M src/cpu/intel/model_6fx/model_6fx_init.c M src/northbridge/intel/gm45/Kconfig M src/northbridge/intel/gm45/northbridge.c M src/southbridge/intel/i82801ix/lpc.c 8 files changed, 109 insertions(+), 30 deletions(-) Approvals: build bot (Jenkins): Verified Patrick Georgi: Looks good to me, approved Angel Pons: Looks good to me, but someone else must approve diff --git a/src/cpu/intel/model_1067x/Makefile.inc b/src/cpu/intel/model_1067x/Makefile.inc index 133c9cf..451df6e 100644 --- a/src/cpu/intel/model_1067x/Makefile.inc +++ b/src/cpu/intel/model_1067x/Makefile.inc @@ -1,4 +1,5 @@ ramstage-y += model_1067x_init.c +ramstage-$(CONFIG_PARALLEL_MP) += mp_init.c subdirs-y += ../../x86/name subdirs-y += ../common subdirs-$(CONFIG_SMM_TSEG) += ../smm/gen1 diff --git a/src/cpu/intel/model_1067x/model_1067x_init.c b/src/cpu/intel/model_1067x/model_1067x_init.c index dbb9631..8f8af57 100644 --- a/src/cpu/intel/model_1067x/model_1067x_init.c +++ b/src/cpu/intel/model_1067x/model_1067x_init.c @@ -21,12 +21,14 @@ #include <cpu/cpu.h> #include <cpu/x86/mtrr.h> #include <cpu/x86/msr.h> +#include <cpu/x86/mp.h> #include <cpu/x86/lapic.h> #include <cpu/intel/microcode.h> #include <cpu/intel/speedstep.h> #include <cpu/intel/hyperthreading.h> #include <cpu/x86/cache.h> #include <cpu/x86/name.h> +#include <cpu/intel/smm/gen1/smi.h> #include <cpu/intel/common/common.h> #include "chip.h" @@ -279,15 +281,18 @@ x86_enable_cache(); /* Update the microcode */ - intel_update_microcode_from_cbfs(); + if (!IS_ENABLED(CONFIG_PARALLEL_MP)) + intel_update_microcode_from_cbfs(); /* Print processor name */ fill_processor_name(processor_name); printk(BIOS_INFO, "CPU: %s.\n", processor_name); /* Setup MTRRs */ - x86_setup_mtrrs(); - x86_mtrr_check(); + if (!IS_ENABLED(CONFIG_PARALLEL_MP)) { + x86_setup_mtrrs(); + x86_mtrr_check(); + } /* Enable the local CPU APICs */ setup_lapic(); @@ -315,7 +320,8 @@ configure_pic_thermal_sensors(tm2, quad); /* Start up my CPU siblings */ - intel_sibling_init(cpu); + if (!IS_ENABLED(CONFIG_PARALLEL_MP)) + intel_sibling_init(cpu); } static struct device_operations cpu_dev_ops = { diff --git a/src/cpu/intel/model_1067x/mp_init.c b/src/cpu/intel/model_1067x/mp_init.c new file mode 100644 index 0000000..52e9d3f --- /dev/null +++ b/src/cpu/intel/model_1067x/mp_init.c @@ -0,0 +1,85 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007-2009 coresystems GmbH + * 2012 secunet Security Networks AG + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; version 2 of + * the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <console/console.h> +#include <cpu/x86/mtrr.h> +#include <cpu/x86/mp.h> +#include <cpu/intel/microcode.h> +#include <cpu/intel/smm/gen1/smi.h> +#include <cpu/intel/common/common.h> + +/* Parallel MP initialization support. */ +static const void *microcode_patch; + +static void pre_mp_init(void) +{ + /* Setup MTRRs based on physical address size. */ + x86_setup_mtrrs_with_detect(); + x86_mtrr_check(); +} + +static int get_cpu_count(void) +{ + const struct cpuid_result cpuid1 = cpuid(1); + const char cores = (cpuid1.ebx >> 16) & 0xf; + + printk(BIOS_DEBUG, "CPU has %u cores.\n", cores); + + return cores; +} + +/* the SMRR enable and lock bit need to be set in IA32_FEATURE_CONTROL + to enable SMRR so configure IA32_FEATURE_CONTROL early on */ +static void pre_mp_smm_init(void) +{ + smm_initialize(); +} + +static void per_cpu_smm_trigger(void) +{ + /* Relocate the SMM handler. */ + smm_relocate(); + + /* After SMM relocation a 2nd microcode load is required. */ + intel_microcode_load_unlocked(microcode_patch); +} + +static void post_mp_init(void) +{ + /* Now that all APs have been relocated as well as the BSP let SMIs + * start flowing. */ + southbridge_smm_init(); + + /* Lock down the SMRAM space. */ + smm_lock(); +} + +static const struct mp_ops mp_ops = { + .pre_mp_init = pre_mp_init, + .get_cpu_count = get_cpu_count, + .get_smm_info = smm_info, + .pre_mp_smm_init = pre_mp_smm_init, + .per_cpu_smm_trigger = per_cpu_smm_trigger, + .relocation_handler = smm_relocation_handler, + .post_mp_init = post_mp_init, +}; + +void bsp_init_and_start_aps(struct bus *cpu_bus) +{ + if (mp_init_with_smm(cpu_bus, &mp_ops)) + printk(BIOS_ERR, "MP initialization failure.\n"); +} diff --git a/src/cpu/intel/model_6fx/Makefile.inc b/src/cpu/intel/model_6fx/Makefile.inc index a0824fd..9564bf9 100644 --- a/src/cpu/intel/model_6fx/Makefile.inc +++ b/src/cpu/intel/model_6fx/Makefile.inc @@ -1,6 +1,7 @@ ramstage-y += model_6fx_init.c subdirs-y += ../../x86/name subdirs-y += ../common +ramstage-$(CONFIG_PARALLEL_MP) += ../model_1067x/mp_init.c subdirs-$(CONFIG_SMM_TSEG) += ../smm/gen1 cpu_microcode_bins += 3rdparty/blobs/cpu/intel/model_6fx/microcode.bin diff --git a/src/cpu/intel/model_6fx/model_6fx_init.c b/src/cpu/intel/model_6fx/model_6fx_init.c index 9d11478..a502826c 100644 --- a/src/cpu/intel/model_6fx/model_6fx_init.c +++ b/src/cpu/intel/model_6fx/model_6fx_init.c @@ -133,15 +133,18 @@ x86_enable_cache(); /* Update the microcode */ - intel_update_microcode_from_cbfs(); + if (!IS_ENABLED(CONFIG_PARALLEL_MP)) + intel_update_microcode_from_cbfs(); /* Print processor name */ fill_processor_name(processor_name); printk(BIOS_INFO, "CPU: %s.\n", processor_name); /* Setup MTRRs */ - x86_setup_mtrrs(); - x86_mtrr_check(); + if (!IS_ENABLED(CONFIG_PARALLEL_MP)) { + x86_setup_mtrrs(); + x86_mtrr_check(); + } /* Setup Page Attribute Tables (PAT) */ // TODO set up PAT @@ -162,7 +165,8 @@ configure_pic_thermal_sensors(); /* Start up my CPU siblings */ - intel_sibling_init(cpu); + if (!IS_ENABLED(CONFIG_PARALLEL_MP)) + intel_sibling_init(cpu); } static struct device_operations cpu_dev_ops = { diff --git a/src/northbridge/intel/gm45/Kconfig b/src/northbridge/intel/gm45/Kconfig index e7b9603..ef6b4ef 100644 --- a/src/northbridge/intel/gm45/Kconfig +++ b/src/northbridge/intel/gm45/Kconfig @@ -29,6 +29,7 @@ select POSTCAR_STAGE select POSTCAR_CONSOLE select SMM_TSEG + select PARALLEL_MP config CBFS_SIZE hex diff --git a/src/northbridge/intel/gm45/northbridge.c b/src/northbridge/intel/gm45/northbridge.c index 7ff046e..791559b 100644 --- a/src/northbridge/intel/gm45/northbridge.c +++ b/src/northbridge/intel/gm45/northbridge.c @@ -230,26 +230,6 @@ pci_write_config8(dev, D0F0_SMRAM, smram); } -/* - * Really doesn't belong here but will go away with parallel mp init, - * so let it be here for a while... - */ -int cpu_get_apic_id_map(int *apic_id_map) -{ - unsigned int i; - - /* Logical processors (threads) per core */ - const struct cpuid_result cpuid1 = cpuid(1); - /* Read number of cores. */ - const char cores = (cpuid1.ebx >> 16) & 0xf; - - /* TODO in parallel MP cpuid(1).ebx */ - for (i = 0; i < cores; i++) - apic_id_map[i] = i; - - return cores; -} - static struct device_operations pci_domain_ops = { .read_resources = mch_domain_read_resources, .set_resources = mch_domain_set_resources, @@ -264,7 +244,7 @@ static void cpu_bus_init(struct device *dev) { - initialize_cpus(dev->link_list); + bsp_init_and_start_aps(dev->link_list); } static struct device_operations cpu_bus_ops = { diff --git a/src/southbridge/intel/i82801ix/lpc.c b/src/southbridge/intel/i82801ix/lpc.c index e18f616..f9e1114 100644 --- a/src/southbridge/intel/i82801ix/lpc.c +++ b/src/southbridge/intel/i82801ix/lpc.c @@ -393,7 +393,8 @@ /* Don't allow evil boot loaders, kernels, or * userspace applications to deceive us: */ - smm_lock(); + if (!IS_ENABLED(CONFIG_PARALLEL_MP)) + smm_lock(); #if TEST_SMM_FLASH_LOCKDOWN /* Now try this: */ -- To view, visit https://review.coreboot.org/c/coreboot/+/23434 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iac416f671407246ee223075eee1aff511e612889 Gerrit-Change-Number: 23434 Gerrit-PatchSet: 51 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

1 0

Change in ...coreboot[master]: nb/intel/gm45: Use parallel MP init
by Patrick Georgi (Code Review) 23 Jan '19

23 Jan '19

Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/23434 ) Change subject: nb/intel/gm45: Use parallel MP init ...................................................................... Patch Set 50: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/23434 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Iac416f671407246ee223075eee1aff511e612889 Gerrit-Change-Number: 23434 Gerrit-PatchSet: 50 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 23 Jan 2019 14:45:29 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in ...coreboot[master]: mediatek/mt8183: Add Micron 4GB LPDDR4X DDR support
by Huayang Duan (Code Review) 23 Jan '19

23 Jan '19

Huayang Duan has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31033 Change subject: mediatek/mt8183: Add Micron 4GB LPDDR4X DDR support ...................................................................... mediatek/mt8183: Add Micron 4GB LPDDR4X DDR support BUG=b:80501386 BRANCH=none TEST=Boots correctly and stress test pass on Kukui. Change-Id: I985c5061ce4ed4d88a17619aa5cde7d0121dd3a3 Signed-off-by: Huayang Duan <huayang.duan(a)mediatek.com> --- M src/mainboard/google/kukui/sdram_configs.c M src/mainboard/google/kukui/sdram_params/Makefile.inc A src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT53E1G32D4NQ-4GB.c 3 files changed, 43 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/33/31033/1 diff --git a/src/mainboard/google/kukui/sdram_configs.c b/src/mainboard/google/kukui/sdram_configs.c index 25bbe8f..cbfb08d 100644 --- a/src/mainboard/google/kukui/sdram_configs.c +++ b/src/mainboard/google/kukui/sdram_configs.c @@ -20,6 +20,7 @@ static const char *const sdram_configs[] = { [1] = "sdram-lpddr4x-H9HCNNNCPMALHR-4GB", + [2] = "sdram-lpddr4x-MT53E1G32D4NQ-4GB", }; static struct sdram_params params; diff --git a/src/mainboard/google/kukui/sdram_params/Makefile.inc b/src/mainboard/google/kukui/sdram_params/Makefile.inc index d15c40d..1e11140 100644 --- a/src/mainboard/google/kukui/sdram_params/Makefile.inc +++ b/src/mainboard/google/kukui/sdram_params/Makefile.inc @@ -1,5 +1,6 @@ sdram-params := sdram-params += sdram-lpddr4x-H9HCNNNCPMALHR-4GB +sdram-params += sdram-lpddr4x-MT53E1G32D4NQ-4GB $(foreach params,$(sdram-params), \ $(eval cbfs-files-y += $(params)) \ diff --git a/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT53E1G32D4NQ-4GB.c b/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT53E1G32D4NQ-4GB.c new file mode 100644 index 0000000..0fb5aba --- /dev/null +++ b/src/mainboard/google/kukui/sdram_params/sdram-lpddr4x-MT53E1G32D4NQ-4GB.c @@ -0,0 +1,41 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2018 MediaTek Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <soc/emi.h> + +struct sdram_params params = { + .impedance = { + [ODT_OFF] = {0x5, 0x7, 0x0, 0xF}, + [ODT_ON] = {0x6, 0x9, 0x0, 0xF} + }, + .wr_level = { + [CHANNEL_A] = { {0x1F, 0x19}, {0x20, 0x1A} }, + [CHANNEL_B] = { {0x22, 0x1E}, {0x22, 0x1E} } + }, + .cbt_cs = { + [CHANNEL_A] = {0x5, 0x4}, + [CHANNEL_B] = {0x8, 0x8} + }, + .cbt_mr12 = { + [CHANNEL_A] = {0x56, 0x56}, + [CHANNEL_B] = {0x56, 0x56} + }, + .emi_cona_val = 0xF053F154, + .emi_conh_val = 0x44440003, + .emi_conf_val = 0x00421000, + .chn_emi_cona_val = {0x0444F051, 0x0444F051}, + .cbt_mode_extern = CBT_NORMAL_MODE, + .delay_cell_unit = 868, +}; -- To view, visit https://review.coreboot.org/c/coreboot/+/31033 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I985c5061ce4ed4d88a17619aa5cde7d0121dd3a3 Gerrit-Change-Number: 31033 Gerrit-PatchSet: 1 Gerrit-Owner: Huayang Duan <huayang.duan(a)mediatek.corp-partner.google.com> Gerrit-MessageType: newchange

3 2

Change in ...coreboot[master]: soc/intel/baytrail/romstage: Remove unneeded white space
by HAOUAS Elyes (Code Review) 23 Jan '19

23 Jan '19

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30953 Change subject: soc/intel/baytrail/romstage: Remove unneeded white space ...................................................................... soc/intel/baytrail/romstage: Remove unneeded white space Change-Id: I6725d1130a40d3c458a3cd5a116d6e91354ec41b Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/soc/intel/baytrail/romstage/cache_as_ram.inc 1 file changed, 2 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/30953/1 diff --git a/src/soc/intel/baytrail/romstage/cache_as_ram.inc b/src/soc/intel/baytrail/romstage/cache_as_ram.inc index 4326636..3dcf019 100644 --- a/src/soc/intel/baytrail/romstage/cache_as_ram.inc +++ b/src/soc/intel/baytrail/romstage/cache_as_ram.inc @@ -185,11 +185,11 @@ /* push TSC and BIST to stack */ movd %mm0, %eax - pushl %eax /* BIST */ + pushl %eax /* BIST */ movd %mm2, %eax pushl %eax /* tsc[63:32] */ movd %mm1, %eax - pushl %eax /* tsc[31:0] */ + pushl %eax /* tsc[31:0] */ before_c_entry: post_code(0x2a) -- To view, visit https://review.coreboot.org/c/coreboot/+/30953 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6725d1130a40d3c458a3cd5a116d6e91354ec41b Gerrit-Change-Number: 30953 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

3 2

Change in ...coreboot[master]: src/drivers: Remove needless '&' on function pointers
by Patrick Georgi (Code Review) 23 Jan '19

23 Jan '19

Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/29868 ) Change subject: src/drivers: Remove needless '&' on function pointers ...................................................................... src/drivers: Remove needless '&' on function pointers Change-Id: I7a99d0dcbc8ea1362a12a68fa519c49058d30a05 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> Reviewed-on: https://review.coreboot.org/c/29868 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> --- M src/drivers/generic/adau7002/adau7002.c M src/drivers/generic/generic/generic.c M src/drivers/generic/gpio_keys/gpio_keys.c M src/drivers/generic/gpio_regulator/gpio_regulator.c M src/drivers/generic/max98357a/max98357a.c M src/drivers/i2c/da7219/da7219.c M src/drivers/i2c/generic/generic.c M src/drivers/i2c/hid/hid.c M src/drivers/i2c/max98373/max98373.c M src/drivers/i2c/max98927/max98927.c M src/drivers/i2c/nau8825/nau8825.c M src/drivers/i2c/rt5663/rt5663.c M src/drivers/i2c/sx9310/sx9310.c M src/drivers/i2c/tpm/chip.c M src/drivers/intel/mipi_camera/camera.c M src/drivers/intel/wifi/wifi.c M src/drivers/lenovo/hybrid_graphics/hybrid_graphics.c M src/drivers/net/r8168.c M src/drivers/pc80/tpm/tis.c M src/drivers/ricoh/rce822/rce822.c M src/drivers/spi/acpi/acpi.c M src/drivers/usb/acpi/usb_acpi.c 22 files changed, 62 insertions(+), 62 deletions(-) Approvals: build bot (Jenkins): Verified Patrick Georgi: Looks good to me, approved diff --git a/src/drivers/generic/adau7002/adau7002.c b/src/drivers/generic/adau7002/adau7002.c index 38d3d07..a8a4128 100644 --- a/src/drivers/generic/adau7002/adau7002.c +++ b/src/drivers/generic/adau7002/adau7002.c @@ -72,8 +72,8 @@ .set_resources = DEVICE_NOOP, .enable_resources = DEVICE_NOOP, #if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) - .acpi_name = &adau7002_acpi_name, - .acpi_fill_ssdt_generator = &adau7002_fill_ssdt, + .acpi_name = adau7002_acpi_name, + .acpi_fill_ssdt_generator = adau7002_fill_ssdt, #endif }; @@ -84,5 +84,5 @@ struct chip_operations drivers_generic_adau7002_ops = { CHIP_NAME("Analog Digital DMIC") - .enable_dev = &adau7002_enable + .enable_dev = adau7002_enable }; diff --git a/src/drivers/generic/generic/generic.c b/src/drivers/generic/generic/generic.c index 37fbab5..b5541a3 100644 --- a/src/drivers/generic/generic/generic.c +++ b/src/drivers/generic/generic/generic.c @@ -83,8 +83,8 @@ .read_resources = DEVICE_NOOP, .set_resources = DEVICE_NOOP, .enable_resources = DEVICE_NOOP, - .acpi_name = &generic_dev_acpi_name, - .acpi_fill_ssdt_generator = &generic_dev_fill_ssdt_generator, + .acpi_name = generic_dev_acpi_name, + .acpi_fill_ssdt_generator = generic_dev_fill_ssdt_generator, }; static void generic_dev_enable(struct device *dev) @@ -94,5 +94,5 @@ struct chip_operations drivers_generic_generic_ops = { CHIP_NAME("Generic Device") - .enable_dev = &generic_dev_enable + .enable_dev = generic_dev_enable }; diff --git a/src/drivers/generic/gpio_keys/gpio_keys.c b/src/drivers/generic/gpio_keys/gpio_keys.c index 5ecb63e..77e7740 100644 --- a/src/drivers/generic/gpio_keys/gpio_keys.c +++ b/src/drivers/generic/gpio_keys/gpio_keys.c @@ -116,8 +116,8 @@ .read_resources = DEVICE_NOOP, .set_resources = DEVICE_NOOP, .enable_resources = DEVICE_NOOP, - .acpi_name = &gpio_keys_acpi_name, - .acpi_fill_ssdt_generator = &gpio_keys_fill_ssdt_generator, + .acpi_name = gpio_keys_acpi_name, + .acpi_fill_ssdt_generator = gpio_keys_fill_ssdt_generator, }; static void gpio_keys_enable(struct device *dev) @@ -127,5 +127,5 @@ struct chip_operations drivers_generic_gpio_keys_ops = { CHIP_NAME("GPIO Keys") - .enable_dev = &gpio_keys_enable + .enable_dev = gpio_keys_enable }; diff --git a/src/drivers/generic/gpio_regulator/gpio_regulator.c b/src/drivers/generic/gpio_regulator/gpio_regulator.c index c038392..3b33525 100644 --- a/src/drivers/generic/gpio_regulator/gpio_regulator.c +++ b/src/drivers/generic/gpio_regulator/gpio_regulator.c @@ -75,8 +75,8 @@ .read_resources = DEVICE_NOOP, .set_resources = DEVICE_NOOP, .enable_resources = DEVICE_NOOP, - .acpi_name = &gpio_regulator_acpi_name, - .acpi_fill_ssdt_generator = &gpio_regulator_fill_ssdt_generator, + .acpi_name = gpio_regulator_acpi_name, + .acpi_fill_ssdt_generator = gpio_regulator_fill_ssdt_generator, }; static void gpio_regulator_enable(struct device *dev) @@ -86,5 +86,5 @@ struct chip_operations drivers_generic_gpio_regulator_ops = { CHIP_NAME("GPIO Regulator") - .enable_dev = &gpio_regulator_enable + .enable_dev = gpio_regulator_enable }; diff --git a/src/drivers/generic/max98357a/max98357a.c b/src/drivers/generic/max98357a/max98357a.c index f9b2d6c..8e5ea0c 100644 --- a/src/drivers/generic/max98357a/max98357a.c +++ b/src/drivers/generic/max98357a/max98357a.c @@ -77,8 +77,8 @@ .set_resources = DEVICE_NOOP, .enable_resources = DEVICE_NOOP, #if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) - .acpi_name = &max98357a_acpi_name, - .acpi_fill_ssdt_generator = &max98357a_fill_ssdt, + .acpi_name = max98357a_acpi_name, + .acpi_fill_ssdt_generator = max98357a_fill_ssdt, #endif }; @@ -105,5 +105,5 @@ struct chip_operations drivers_generic_max98357a_ops = { CHIP_NAME("Maxim Integrated 98357A Amplifier") - .enable_dev = &max98357a_enable + .enable_dev = max98357a_enable }; diff --git a/src/drivers/i2c/da7219/da7219.c b/src/drivers/i2c/da7219/da7219.c index d2a4b78..ebc22e0 100644 --- a/src/drivers/i2c/da7219/da7219.c +++ b/src/drivers/i2c/da7219/da7219.c @@ -114,8 +114,8 @@ .set_resources = DEVICE_NOOP, .enable_resources = DEVICE_NOOP, #if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) - .acpi_name = &da7219_acpi_name, - .acpi_fill_ssdt_generator = &da7219_fill_ssdt, + .acpi_name = da7219_acpi_name, + .acpi_fill_ssdt_generator = da7219_fill_ssdt, #endif }; @@ -126,5 +126,5 @@ struct chip_operations drivers_i2c_da7219_ops = { CHIP_NAME("Dialog Semiconductor DA7219 Audio Codec") - .enable_dev = &da7219_enable + .enable_dev = da7219_enable }; diff --git a/src/drivers/i2c/generic/generic.c b/src/drivers/i2c/generic/generic.c index df929b7..ca2dfaf 100644 --- a/src/drivers/i2c/generic/generic.c +++ b/src/drivers/i2c/generic/generic.c @@ -193,8 +193,8 @@ .set_resources = DEVICE_NOOP, .enable_resources = DEVICE_NOOP, #if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) - .acpi_name = &i2c_generic_acpi_name, - .acpi_fill_ssdt_generator = &i2c_generic_fill_ssdt_generator, + .acpi_name = i2c_generic_acpi_name, + .acpi_fill_ssdt_generator = i2c_generic_fill_ssdt_generator, #endif }; @@ -228,5 +228,5 @@ struct chip_operations drivers_i2c_generic_ops = { CHIP_NAME("I2C Device") - .enable_dev = &i2c_generic_enable + .enable_dev = i2c_generic_enable }; diff --git a/src/drivers/i2c/hid/hid.c b/src/drivers/i2c/hid/hid.c index bccce75..952e3e4 100644 --- a/src/drivers/i2c/hid/hid.c +++ b/src/drivers/i2c/hid/hid.c @@ -51,8 +51,8 @@ .set_resources = DEVICE_NOOP, .enable_resources = DEVICE_NOOP, #if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) - .acpi_name = &i2c_hid_acpi_name, - .acpi_fill_ssdt_generator = &i2c_hid_fill_ssdt_generator, + .acpi_name = i2c_hid_acpi_name, + .acpi_fill_ssdt_generator = i2c_hid_fill_ssdt_generator, #endif }; @@ -69,5 +69,5 @@ struct chip_operations drivers_i2c_hid_ops = { CHIP_NAME("I2C HID Device") - .enable_dev = &i2c_hid_enable + .enable_dev = i2c_hid_enable }; diff --git a/src/drivers/i2c/max98373/max98373.c b/src/drivers/i2c/max98373/max98373.c index e019b70..e10ccf1 100644 --- a/src/drivers/i2c/max98373/max98373.c +++ b/src/drivers/i2c/max98373/max98373.c @@ -91,8 +91,8 @@ .read_resources = DEVICE_NOOP, .set_resources = DEVICE_NOOP, .enable_resources = DEVICE_NOOP, - .acpi_name = &max98373_acpi_name, - .acpi_fill_ssdt_generator = &max98373_fill_ssdt, + .acpi_name = max98373_acpi_name, + .acpi_fill_ssdt_generator = max98373_fill_ssdt, }; static void max98373_enable(struct device *dev) @@ -108,5 +108,5 @@ struct chip_operations drivers_i2c_max98373_ops = { CHIP_NAME("Maxim MAX98373 Codec") - .enable_dev = &max98373_enable + .enable_dev = max98373_enable }; diff --git a/src/drivers/i2c/max98927/max98927.c b/src/drivers/i2c/max98927/max98927.c index ec05034..68a167d 100644 --- a/src/drivers/i2c/max98927/max98927.c +++ b/src/drivers/i2c/max98927/max98927.c @@ -87,8 +87,8 @@ .read_resources = DEVICE_NOOP, .set_resources = DEVICE_NOOP, .enable_resources = DEVICE_NOOP, - .acpi_name = &max98927_acpi_name, - .acpi_fill_ssdt_generator = &max98927_fill_ssdt, + .acpi_name = max98927_acpi_name, + .acpi_fill_ssdt_generator = max98927_fill_ssdt, }; static void max98927_enable(struct device *dev) @@ -104,5 +104,5 @@ struct chip_operations drivers_i2c_max98927_ops = { CHIP_NAME("Maxim MAX98927 Codec") - .enable_dev = &max98927_enable + .enable_dev = max98927_enable }; diff --git a/src/drivers/i2c/nau8825/nau8825.c b/src/drivers/i2c/nau8825/nau8825.c index 86d4306..3f90512 100644 --- a/src/drivers/i2c/nau8825/nau8825.c +++ b/src/drivers/i2c/nau8825/nau8825.c @@ -103,8 +103,8 @@ .set_resources = DEVICE_NOOP, .enable_resources = DEVICE_NOOP, #if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) - .acpi_name = &nau8825_acpi_name, - .acpi_fill_ssdt_generator = &nau8825_fill_ssdt, + .acpi_name = nau8825_acpi_name, + .acpi_fill_ssdt_generator = nau8825_fill_ssdt, #endif }; @@ -115,5 +115,5 @@ struct chip_operations drivers_i2c_nau8825_ops = { CHIP_NAME("Nuvoton NAU8825 Codec") - .enable_dev = &nau8825_enable + .enable_dev = nau8825_enable }; diff --git a/src/drivers/i2c/rt5663/rt5663.c b/src/drivers/i2c/rt5663/rt5663.c index 38b2a98..1ce5993 100644 --- a/src/drivers/i2c/rt5663/rt5663.c +++ b/src/drivers/i2c/rt5663/rt5663.c @@ -91,8 +91,8 @@ .read_resources = DEVICE_NOOP, .set_resources = DEVICE_NOOP, .enable_resources = DEVICE_NOOP, - .acpi_name = &rt5663_acpi_name, - .acpi_fill_ssdt_generator = &rt5663_fill_ssdt, + .acpi_name = rt5663_acpi_name, + .acpi_fill_ssdt_generator = rt5663_fill_ssdt, }; static void rt5663_enable(struct device *dev) @@ -102,5 +102,5 @@ struct chip_operations drivers_i2c_rt5663_ops = { CHIP_NAME("Realtek RT5663 Codec") - .enable_dev = &rt5663_enable + .enable_dev = rt5663_enable }; diff --git a/src/drivers/i2c/sx9310/sx9310.c b/src/drivers/i2c/sx9310/sx9310.c index 0e98bcb..afd9e35 100644 --- a/src/drivers/i2c/sx9310/sx9310.c +++ b/src/drivers/i2c/sx9310/sx9310.c @@ -85,8 +85,8 @@ .read_resources = DEVICE_NOOP, .set_resources = DEVICE_NOOP, .enable_resources = DEVICE_NOOP, - .acpi_name = &i2c_sx9310_acpi_name, - .acpi_fill_ssdt_generator = &i2c_sx9310_fill_ssdt, + .acpi_name = i2c_sx9310_acpi_name, + .acpi_fill_ssdt_generator = i2c_sx9310_fill_ssdt, }; static void i2c_sx9310_enable(struct device *dev) @@ -106,5 +106,5 @@ struct chip_operations drivers_i2c_sx9310_ops = { CHIP_NAME(I2C_SX9310_ACPI_NAME) - .enable_dev = &i2c_sx9310_enable + .enable_dev = i2c_sx9310_enable }; diff --git a/src/drivers/i2c/tpm/chip.c b/src/drivers/i2c/tpm/chip.c index 3dbe811..687ce05 100644 --- a/src/drivers/i2c/tpm/chip.c +++ b/src/drivers/i2c/tpm/chip.c @@ -78,8 +78,8 @@ .read_resources = DEVICE_NOOP, .set_resources = DEVICE_NOOP, .enable_resources = DEVICE_NOOP, - .acpi_name = &i2c_tpm_acpi_name, - .acpi_fill_ssdt_generator = &i2c_tpm_fill_ssdt, + .acpi_name = i2c_tpm_acpi_name, + .acpi_fill_ssdt_generator = i2c_tpm_fill_ssdt, }; static void i2c_tpm_enable(struct device *dev) @@ -95,5 +95,5 @@ struct chip_operations drivers_i2c_tpm_ops = { CHIP_NAME("I2C TPM") - .enable_dev = &i2c_tpm_enable + .enable_dev = i2c_tpm_enable }; diff --git a/src/drivers/intel/mipi_camera/camera.c b/src/drivers/intel/mipi_camera/camera.c index cdb9da3..0cea0ba 100644 --- a/src/drivers/intel/mipi_camera/camera.c +++ b/src/drivers/intel/mipi_camera/camera.c @@ -84,8 +84,8 @@ .read_resources = DEVICE_NOOP, .set_resources = DEVICE_NOOP, .enable_resources = DEVICE_NOOP, - .acpi_name = &camera_acpi_name, - .acpi_fill_ssdt_generator = &camera_fill_ssdt, + .acpi_name = camera_acpi_name, + .acpi_fill_ssdt_generator = camera_fill_ssdt, }; static void camera_enable(struct device *dev) @@ -95,5 +95,5 @@ struct chip_operations drivers_intel_mipi_camera_ops = { CHIP_NAME("Intel MIPI Camera Device") - .enable_dev = &camera_enable + .enable_dev = camera_enable }; diff --git a/src/drivers/intel/wifi/wifi.c b/src/drivers/intel/wifi/wifi.c index 01a338d..cd512ea 100644 --- a/src/drivers/intel/wifi/wifi.c +++ b/src/drivers/intel/wifi/wifi.c @@ -306,8 +306,8 @@ #endif .ops_pci = &pci_ops, #if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) - .acpi_name = &intel_wifi_acpi_name, - .acpi_fill_ssdt_generator = &intel_wifi_fill_ssdt, + .acpi_name = intel_wifi_acpi_name, + .acpi_fill_ssdt_generator = intel_wifi_fill_ssdt, #endif }; @@ -366,5 +366,5 @@ struct chip_operations drivers_intel_wifi_ops = { CHIP_NAME("Intel WiFi") - .enable_dev = &intel_wifi_enable + .enable_dev = intel_wifi_enable }; diff --git a/src/drivers/lenovo/hybrid_graphics/hybrid_graphics.c b/src/drivers/lenovo/hybrid_graphics/hybrid_graphics.c index 4fa5b81..b6d2241 100644 --- a/src/drivers/lenovo/hybrid_graphics/hybrid_graphics.c +++ b/src/drivers/lenovo/hybrid_graphics/hybrid_graphics.c @@ -68,5 +68,5 @@ struct chip_operations drivers_lenovo_hybrid_graphics_ops = { CHIP_NAME("Lenovo hybrid graphics driver") - .enable_dev = &lenovo_hybrid_graphics_enable + .enable_dev = lenovo_hybrid_graphics_enable }; diff --git a/src/drivers/net/r8168.c b/src/drivers/net/r8168.c index 5280cb6..4057ffd 100644 --- a/src/drivers/net/r8168.c +++ b/src/drivers/net/r8168.c @@ -347,8 +347,8 @@ .init = r8168_init, .scan_bus = 0, #if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) - .acpi_name = &r8168_net_acpi_name, - .acpi_fill_ssdt_generator = &r8168_net_fill_ssdt, + .acpi_name = r8168_net_acpi_name, + .acpi_fill_ssdt_generator = r8168_net_fill_ssdt, #endif }; diff --git a/src/drivers/pc80/tpm/tis.c b/src/drivers/pc80/tpm/tis.c index f7d9d6f..d63dcbe 100644 --- a/src/drivers/pc80/tpm/tis.c +++ b/src/drivers/pc80/tpm/tis.c @@ -979,11 +979,11 @@ #endif static struct device_operations lpc_tpm_ops = { - .read_resources = &lpc_tpm_read_resources, - .set_resources = &lpc_tpm_set_resources, + .read_resources = lpc_tpm_read_resources, + .set_resources = lpc_tpm_set_resources, #if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) - .acpi_name = &lpc_tpm_acpi_name, - .acpi_fill_ssdt_generator = &lpc_tpm_fill_ssdt, + .acpi_name = lpc_tpm_acpi_name, + .acpi_fill_ssdt_generator = lpc_tpm_fill_ssdt, #endif }; diff --git a/src/drivers/ricoh/rce822/rce822.c b/src/drivers/ricoh/rce822/rce822.c index b16b05a..d576762 100644 --- a/src/drivers/ricoh/rce822/rce822.c +++ b/src/drivers/ricoh/rce822/rce822.c @@ -51,7 +51,7 @@ } static struct pci_operations lops_pci = { - .set_subsystem = &rce822_set_subsystem, + .set_subsystem = rce822_set_subsystem, }; static struct device_operations rce822_ops = { diff --git a/src/drivers/spi/acpi/acpi.c b/src/drivers/spi/acpi/acpi.c index cf75f9e..7c8a887 100644 --- a/src/drivers/spi/acpi/acpi.c +++ b/src/drivers/spi/acpi/acpi.c @@ -205,8 +205,8 @@ .read_resources = DEVICE_NOOP, .set_resources = DEVICE_NOOP, .enable_resources = DEVICE_NOOP, - .acpi_name = &spi_acpi_name, - .acpi_fill_ssdt_generator = &spi_acpi_fill_ssdt_generator, + .acpi_name = spi_acpi_name, + .acpi_fill_ssdt_generator = spi_acpi_fill_ssdt_generator, }; static void spi_acpi_enable(struct device *dev) @@ -216,5 +216,5 @@ struct chip_operations drivers_spi_acpi_ops = { CHIP_NAME("SPI Device") - .enable_dev = &spi_acpi_enable + .enable_dev = spi_acpi_enable }; diff --git a/src/drivers/usb/acpi/usb_acpi.c b/src/drivers/usb/acpi/usb_acpi.c index abc1718..8c63d2a 100644 --- a/src/drivers/usb/acpi/usb_acpi.c +++ b/src/drivers/usb/acpi/usb_acpi.c @@ -86,8 +86,8 @@ .read_resources = DEVICE_NOOP, .set_resources = DEVICE_NOOP, .enable_resources = DEVICE_NOOP, - .scan_bus = &scan_usb_bus, - .acpi_fill_ssdt_generator = &usb_acpi_fill_ssdt_generator, + .scan_bus = scan_usb_bus, + .acpi_fill_ssdt_generator = usb_acpi_fill_ssdt_generator, }; static void usb_acpi_enable(struct device *dev) @@ -97,5 +97,5 @@ struct chip_operations drivers_usb_acpi_ops = { CHIP_NAME("USB ACPI Device") - .enable_dev = &usb_acpi_enable + .enable_dev = usb_acpi_enable }; -- To view, visit https://review.coreboot.org/c/coreboot/+/29868 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7a99d0dcbc8ea1362a12a68fa519c49058d30a05 Gerrit-Change-Number: 29868 Gerrit-PatchSet: 5 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

1 0

Change in ...coreboot[master]: src/drivers: Remove needless '&' on function pointers
by Patrick Georgi (Code Review) 23 Jan '19

23 Jan '19

Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29868 ) Change subject: src/drivers: Remove needless '&' on function pointers ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/29868 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7a99d0dcbc8ea1362a12a68fa519c49058d30a05 Gerrit-Change-Number: 29868 Gerrit-PatchSet: 4 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 23 Jan 2019 14:43:46 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

1 0

Change in ...coreboot[master]: soc/{amd,intel}: Remove needless '&' on function pointers
by Patrick Georgi (Code Review) 23 Jan '19

23 Jan '19

Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/c/coreboot/+/29862 ) Change subject: soc/{amd,intel}: Remove needless '&' on function pointers ...................................................................... soc/{amd,intel}: Remove needless '&' on function pointers Change-Id: I7a59fd2f370d2b0d830ca83be9a9bc1abe2750f5 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> Reviewed-on: https://review.coreboot.org/c/29862 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Alex Thiessen <alex.thiessen.de+coreboot(a)gmail.com> --- M src/soc/amd/stoneyridge/chip.c M src/soc/intel/apollolake/chip.c M src/soc/intel/broadwell/adsp.c M src/soc/intel/broadwell/ehci.c M src/soc/intel/broadwell/sata.c M src/soc/intel/broadwell/smbus.c M src/soc/intel/broadwell/systemagent.c M src/soc/intel/broadwell/xhci.c M src/soc/intel/common/block/dsp/dsp.c M src/soc/intel/common/block/hda/hda.c M src/soc/intel/common/block/i2c/i2c.c M src/soc/intel/common/block/pmc/pmc.c M src/soc/intel/common/block/sata/sata.c M src/soc/intel/common/block/scs/sd.c M src/soc/intel/common/block/smbus/smbus.c M src/soc/intel/common/block/spi/spi.c M src/soc/intel/common/block/systemagent/systemagent.c M src/soc/intel/common/block/uart/uart.c M src/soc/intel/common/block/xdci/xdci.c M src/soc/intel/common/block/xhci/xhci.c M src/soc/intel/denverton_ns/chip.c M src/soc/intel/denverton_ns/systemagent.c M src/soc/intel/fsp_broadwell_de/smbus.c M src/soc/intel/quark/lpc.c M src/soc/intel/quark/northcluster.c M src/soc/intel/quark/uart.c 26 files changed, 106 insertions(+), 106 deletions(-) Approvals: build bot (Jenkins): Verified Alex Thiessen: Looks good to me, approved diff --git a/src/soc/amd/stoneyridge/chip.c b/src/soc/amd/stoneyridge/chip.c index 90b25bb..9743aa9 100644 --- a/src/soc/amd/stoneyridge/chip.c +++ b/src/soc/amd/stoneyridge/chip.c @@ -148,9 +148,9 @@ struct chip_operations soc_amd_stoneyridge_ops = { CHIP_NAME("AMD StoneyRidge SOC") - .enable_dev = &enable_dev, - .init = &soc_init, - .final = &soc_final + .enable_dev = enable_dev, + .init = soc_init, + .final = soc_final }; static void earliest_ramstage(void *unused) diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c index b38265f..0d6d6d5 100644 --- a/src/soc/intel/apollolake/chip.c +++ b/src/soc/intel/apollolake/chip.c @@ -679,9 +679,9 @@ struct chip_operations soc_intel_apollolake_ops = { CHIP_NAME("Intel Apollolake SOC") - .enable_dev = &enable_dev, - .init = &soc_init, - .final = &soc_final + .enable_dev = enable_dev, + .init = soc_init, + .final = soc_final }; static void drop_privilege_all(void) diff --git a/src/soc/intel/broadwell/adsp.c b/src/soc/intel/broadwell/adsp.c index 261445b..72a4b8c 100644 --- a/src/soc/intel/broadwell/adsp.c +++ b/src/soc/intel/broadwell/adsp.c @@ -142,10 +142,10 @@ } static struct device_operations adsp_ops = { - .read_resources = &pci_dev_read_resources, - .set_resources = &pci_dev_set_resources, - .enable_resources = &pci_dev_enable_resources, - .init = &adsp_init, + .read_resources = pci_dev_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, + .init = adsp_init, .ops_pci = &broadwell_pci_ops, }; diff --git a/src/soc/intel/broadwell/ehci.c b/src/soc/intel/broadwell/ehci.c index be46727..8972f56 100644 --- a/src/soc/intel/broadwell/ehci.c +++ b/src/soc/intel/broadwell/ehci.c @@ -58,11 +58,11 @@ }; static struct device_operations usb_ehci_ops = { - .read_resources = &pci_ehci_read_resources, - .set_resources = &pci_dev_set_resources, - .enable_resources = &pci_dev_enable_resources, + .read_resources = pci_ehci_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, .ops_pci = &ehci_ops_pci, - .enable = &ehci_enable, + .enable = ehci_enable, }; static const unsigned short pci_device_ids[] = { diff --git a/src/soc/intel/broadwell/sata.c b/src/soc/intel/broadwell/sata.c index 3dadccc..f66eb0a 100644 --- a/src/soc/intel/broadwell/sata.c +++ b/src/soc/intel/broadwell/sata.c @@ -279,11 +279,11 @@ } static struct device_operations sata_ops = { - .read_resources = &pci_dev_read_resources, - .set_resources = &pci_dev_set_resources, - .enable_resources = &pci_dev_enable_resources, - .init = &sata_init, - .enable = &sata_enable, + .read_resources = pci_dev_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, + .init = sata_init, + .enable = sata_enable, .ops_pci = &broadwell_pci_ops, }; diff --git a/src/soc/intel/broadwell/smbus.c b/src/soc/intel/broadwell/smbus.c index 26483fd..9367f33 100644 --- a/src/soc/intel/broadwell/smbus.c +++ b/src/soc/intel/broadwell/smbus.c @@ -86,11 +86,11 @@ } static struct device_operations smbus_ops = { - .read_resources = &smbus_read_resources, - .set_resources = &pci_dev_set_resources, - .enable_resources = &pci_dev_enable_resources, - .scan_bus = &scan_smbus, - .init = &pch_smbus_init, + .read_resources = smbus_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, + .scan_bus = scan_smbus, + .init = pch_smbus_init, .ops_smbus_bus = &lops_smbus_bus, .ops_pci = &broadwell_pci_ops, }; diff --git a/src/soc/intel/broadwell/systemagent.c b/src/soc/intel/broadwell/systemagent.c index e0d8b76..2ef8691 100644 --- a/src/soc/intel/broadwell/systemagent.c +++ b/src/soc/intel/broadwell/systemagent.c @@ -439,11 +439,11 @@ } static struct device_operations systemagent_ops = { - .read_resources = &systemagent_read_resources, - .acpi_fill_ssdt_generator = &generate_cpu_entries, - .set_resources = &pci_dev_set_resources, - .enable_resources = &pci_dev_enable_resources, - .init = &systemagent_init, + .read_resources = systemagent_read_resources, + .acpi_fill_ssdt_generator = generate_cpu_entries, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, + .init = systemagent_init, .ops_pci = &broadwell_pci_ops, }; diff --git a/src/soc/intel/broadwell/xhci.c b/src/soc/intel/broadwell/xhci.c index aba1123..b5980df 100644 --- a/src/soc/intel/broadwell/xhci.c +++ b/src/soc/intel/broadwell/xhci.c @@ -216,11 +216,11 @@ } static struct device_operations usb_xhci_ops = { - .read_resources = &pci_dev_read_resources, - .set_resources = &pci_dev_set_resources, - .enable_resources = &pci_dev_enable_resources, + .read_resources = pci_dev_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, .ops_pci = &broadwell_pci_ops, - .init = &xhci_init, + .init = xhci_init, }; static const unsigned short pci_device_ids[] = { diff --git a/src/soc/intel/common/block/dsp/dsp.c b/src/soc/intel/common/block/dsp/dsp.c index 65c86cc..2bd6599 100644 --- a/src/soc/intel/common/block/dsp/dsp.c +++ b/src/soc/intel/common/block/dsp/dsp.c @@ -19,11 +19,11 @@ #include <device/pci_ids.h> static struct device_operations dsp_dev_ops = { - .read_resources = &pci_dev_read_resources, - .set_resources = &pci_dev_set_resources, - .enable_resources = &pci_dev_enable_resources, + .read_resources = pci_dev_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, .ops_pci = &pci_dev_ops_pci, - .scan_bus = &scan_static_bus, + .scan_bus = scan_static_bus, }; static const unsigned short pci_device_ids[] = { diff --git a/src/soc/intel/common/block/hda/hda.c b/src/soc/intel/common/block/hda/hda.c index 5e09ddd..4de3137 100644 --- a/src/soc/intel/common/block/hda/hda.c +++ b/src/soc/intel/common/block/hda/hda.c @@ -61,14 +61,14 @@ #endif static struct device_operations hda_ops = { - .read_resources = &pci_dev_read_resources, - .set_resources = &pci_dev_set_resources, - .enable_resources = &pci_dev_enable_resources, + .read_resources = pci_dev_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, #if IS_ENABLED(CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB) - .init = &hda_init, + .init = hda_init, #endif .ops_pci = &pci_dev_ops_pci, - .scan_bus = &scan_static_bus, + .scan_bus = scan_static_bus, }; static const unsigned short pci_device_ids[] = { diff --git a/src/soc/intel/common/block/i2c/i2c.c b/src/soc/intel/common/block/i2c/i2c.c index f72adfc..b7f240e 100644 --- a/src/soc/intel/common/block/i2c/i2c.c +++ b/src/soc/intel/common/block/i2c/i2c.c @@ -170,14 +170,14 @@ } static struct device_operations i2c_dev_ops = { - .read_resources = &pci_dev_read_resources, - .set_resources = &pci_dev_set_resources, - .enable_resources = &pci_dev_enable_resources, - .scan_bus = &scan_smbus, + .read_resources = pci_dev_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, + .scan_bus = scan_smbus, .ops_i2c_bus = &dw_i2c_bus_ops, .ops_pci = &pci_dev_ops_pci, - .init = &dw_i2c_device_init, - .acpi_fill_ssdt_generator = &dw_i2c_acpi_fill_ssdt, + .init = dw_i2c_device_init, + .acpi_fill_ssdt_generator = dw_i2c_acpi_fill_ssdt, }; static const unsigned short pci_device_ids[] = { diff --git a/src/soc/intel/common/block/pmc/pmc.c b/src/soc/intel/common/block/pmc/pmc.c index e418db0..9f1b94f 100644 --- a/src/soc/intel/common/block/pmc/pmc.c +++ b/src/soc/intel/common/block/pmc/pmc.c @@ -112,12 +112,12 @@ } static struct device_operations device_ops = { - .read_resources = &pch_pmc_read_resources, - .set_resources = &pci_dev_set_resources, - .enable_resources = &pci_dev_enable_resources, - .init = &pmc_soc_init, + .read_resources = pch_pmc_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, + .init = pmc_soc_init, .ops_pci = &pci_dev_ops_pci, - .scan_bus = &scan_lpc_bus, + .scan_bus = scan_lpc_bus, }; static const unsigned short pci_device_ids[] = { diff --git a/src/soc/intel/common/block/sata/sata.c b/src/soc/intel/common/block/sata/sata.c index a600cb9..936fc9b 100644 --- a/src/soc/intel/common/block/sata/sata.c +++ b/src/soc/intel/common/block/sata/sata.c @@ -62,9 +62,9 @@ } static struct device_operations sata_ops = { - .read_resources = &pci_dev_read_resources, - .set_resources = &pci_dev_set_resources, - .enable_resources = &pci_dev_enable_resources, + .read_resources = pci_dev_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, .final = sata_final, .ops_pci = &pci_dev_ops_pci, }; diff --git a/src/soc/intel/common/block/scs/sd.c b/src/soc/intel/common/block/scs/sd.c index 812146f..c8dc7d1 100644 --- a/src/soc/intel/common/block/scs/sd.c +++ b/src/soc/intel/common/block/scs/sd.c @@ -56,11 +56,11 @@ #endif static struct device_operations dev_ops = { - .read_resources = &pci_dev_read_resources, - .set_resources = &pci_dev_set_resources, - .enable_resources = &pci_dev_enable_resources, + .read_resources = pci_dev_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, #if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) - .acpi_fill_ssdt_generator = &sd_fill_ssdt, + .acpi_fill_ssdt_generator = sd_fill_ssdt, #endif .ops_pci = &pci_dev_ops_pci, }; diff --git a/src/soc/intel/common/block/smbus/smbus.c b/src/soc/intel/common/block/smbus/smbus.c index 83dfedf..2287138 100644 --- a/src/soc/intel/common/block/smbus/smbus.c +++ b/src/soc/intel/common/block/smbus/smbus.c @@ -78,11 +78,11 @@ } static struct device_operations smbus_ops = { - .read_resources = &smbus_read_resources, - .set_resources = &pci_dev_set_resources, - .enable_resources = &pci_dev_enable_resources, - .scan_bus = &scan_smbus, - .init = &pch_smbus_init, + .read_resources = smbus_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, + .scan_bus = scan_smbus, + .init = pch_smbus_init, .ops_pci = &pci_dev_ops_pci, .ops_smbus_bus = &lops_smbus_bus, }; diff --git a/src/soc/intel/common/block/spi/spi.c b/src/soc/intel/common/block/spi/spi.c index 6038f46..69449e7 100644 --- a/src/soc/intel/common/block/spi/spi.c +++ b/src/soc/intel/common/block/spi/spi.c @@ -44,10 +44,10 @@ }; static struct device_operations spi_dev_ops = { - .read_resources = &pci_dev_read_resources, - .set_resources = &pci_dev_set_resources, - .enable_resources = &pci_dev_enable_resources, - .scan_bus = &scan_generic_bus, + .read_resources = pci_dev_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, + .scan_bus = scan_generic_bus, .ops_spi_bus = &spi_bus_ops, .ops_pci = &pci_dev_ops_pci, }; diff --git a/src/soc/intel/common/block/systemagent/systemagent.c b/src/soc/intel/common/block/systemagent/systemagent.c index 9608359..a85bcab 100644 --- a/src/soc/intel/common/block/systemagent/systemagent.c +++ b/src/soc/intel/common/block/systemagent/systemagent.c @@ -278,9 +278,9 @@ } static struct device_operations systemagent_ops = { - .read_resources = &systemagent_read_resources, - .set_resources = &pci_dev_set_resources, - .enable_resources = &pci_dev_enable_resources, + .read_resources = systemagent_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, .init = soc_systemagent_init, .ops_pci = &pci_dev_ops_pci, }; diff --git a/src/soc/intel/common/block/uart/uart.c b/src/soc/intel/common/block/uart/uart.c index f0b6b24..57d9ebe 100644 --- a/src/soc/intel/common/block/uart/uart.c +++ b/src/soc/intel/common/block/uart/uart.c @@ -235,9 +235,9 @@ } static struct device_operations device_ops = { - .read_resources = &uart_read_resources, - .set_resources = &pci_dev_set_resources, - .enable_resources = &uart_common_enable_resources, + .read_resources = uart_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = uart_common_enable_resources, .ops_pci = &pci_dev_ops_pci, }; diff --git a/src/soc/intel/common/block/xdci/xdci.c b/src/soc/intel/common/block/xdci/xdci.c index d2e8769..0ee6365 100644 --- a/src/soc/intel/common/block/xdci/xdci.c +++ b/src/soc/intel/common/block/xdci/xdci.c @@ -29,9 +29,9 @@ } static struct device_operations usb_xdci_ops = { - .read_resources = &pci_dev_read_resources, - .set_resources = &pci_dev_set_resources, - .enable_resources = &pci_dev_enable_resources, + .read_resources = pci_dev_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, .init = soc_xdci_init, .ops_pci = &pci_dev_ops_pci, }; diff --git a/src/soc/intel/common/block/xhci/xhci.c b/src/soc/intel/common/block/xhci/xhci.c index 9641177..ab87f36 100644 --- a/src/soc/intel/common/block/xhci/xhci.c +++ b/src/soc/intel/common/block/xhci/xhci.c @@ -24,14 +24,14 @@ __weak void soc_xhci_init(struct device *dev) { /* no-op */ } static struct device_operations usb_xhci_ops = { - .read_resources = &pci_dev_read_resources, - .set_resources = &pci_dev_set_resources, - .enable_resources = &pci_dev_enable_resources, + .read_resources = pci_dev_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, .init = soc_xhci_init, .ops_pci = &pci_dev_ops_pci, - .scan_bus = &scan_usb_bus, + .scan_bus = scan_usb_bus, #if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) - .acpi_name = &soc_acpi_name, + .acpi_name = soc_acpi_name, #endif }; diff --git a/src/soc/intel/denverton_ns/chip.c b/src/soc/intel/denverton_ns/chip.c index d0a21ac..0f3c8a0 100644 --- a/src/soc/intel/denverton_ns/chip.c +++ b/src/soc/intel/denverton_ns/chip.c @@ -123,9 +123,9 @@ struct chip_operations soc_intel_denverton_ns_ops = { CHIP_NAME("Intel Denverton-NS SOC") - .enable_dev = &soc_enable_dev, - .init = &soc_init, - .final = &soc_final + .enable_dev = soc_enable_dev, + .init = soc_init, + .final = soc_final }; static void soc_set_subsystem(struct device *dev, uint32_t vendor, diff --git a/src/soc/intel/denverton_ns/systemagent.c b/src/soc/intel/denverton_ns/systemagent.c index 6ffa2c7..abce0ab 100644 --- a/src/soc/intel/denverton_ns/systemagent.c +++ b/src/soc/intel/denverton_ns/systemagent.c @@ -335,10 +335,10 @@ } static struct device_operations systemagent_ops = { - .read_resources = &systemagent_read_resources, - .set_resources = &pci_dev_set_resources, - .enable_resources = &pci_dev_enable_resources, - .init = &systemagent_init, + .read_resources = systemagent_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, + .init = systemagent_init, .ops_pci = &soc_pci_ops, }; diff --git a/src/soc/intel/fsp_broadwell_de/smbus.c b/src/soc/intel/fsp_broadwell_de/smbus.c index 339d47b..94474f7 100644 --- a/src/soc/intel/fsp_broadwell_de/smbus.c +++ b/src/soc/intel/fsp_broadwell_de/smbus.c @@ -75,12 +75,12 @@ }; static struct device_operations smbus_ops = { - .read_resources = &pci_dev_read_resources, - .set_resources = &pci_dev_set_resources, - .enable_resources = &pci_dev_enable_resources, - .scan_bus = &scan_smbus, - .init = &pch_smbus_init, - .enable = &pch_smbus_enable, + .read_resources = pci_dev_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, + .scan_bus = scan_smbus, + .init = pch_smbus_init, + .enable = pch_smbus_enable, .ops_smbus_bus = &lops_smbus_bus, }; diff --git a/src/soc/intel/quark/lpc.c b/src/soc/intel/quark/lpc.c index 809122b..19f7ceb 100644 --- a/src/soc/intel/quark/lpc.c +++ b/src/soc/intel/quark/lpc.c @@ -50,10 +50,10 @@ } static struct device_operations device_ops = { - .read_resources = &pmc_read_resources, - .set_resources = &pci_dev_set_resources, - .enable_resources = &pci_dev_enable_resources, - .scan_bus = &scan_lpc_bus, + .read_resources = pmc_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, + .scan_bus = scan_lpc_bus, }; static const struct pci_driver pmc __pci_driver = { diff --git a/src/soc/intel/quark/northcluster.c b/src/soc/intel/quark/northcluster.c index 01ff6b5..0507efc 100644 --- a/src/soc/intel/quark/northcluster.c +++ b/src/soc/intel/quark/northcluster.c @@ -71,9 +71,9 @@ } static struct device_operations nc_ops = { - .read_resources = &nc_read_resources, - .set_resources = &pci_dev_set_resources, - .enable_resources = &pci_dev_enable_resources, + .read_resources = nc_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, }; static const struct pci_driver systemagent_driver __pci_driver = { diff --git a/src/soc/intel/quark/uart.c b/src/soc/intel/quark/uart.c index 0d86284..0037621 100644 --- a/src/soc/intel/quark/uart.c +++ b/src/soc/intel/quark/uart.c @@ -36,9 +36,9 @@ } static struct device_operations device_ops = { - .read_resources = &uart_read_resources, - .set_resources = &pci_dev_set_resources, - .enable_resources = &pci_dev_enable_resources, + .read_resources = uart_read_resources, + .set_resources = pci_dev_set_resources, + .enable_resources = pci_dev_enable_resources, }; static const struct pci_driver uart_driver __pci_driver = { -- To view, visit https://review.coreboot.org/c/coreboot/+/29862 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I7a59fd2f370d2b0d830ca83be9a9bc1abe2750f5 Gerrit-Change-Number: 29862 Gerrit-PatchSet: 9 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Alex Thiessen <alex.thiessen.de+coreboot(a)gmail.com> Gerrit-Reviewer: David Guckian Gerrit-Reviewer: David Guckian <david.guckian(a)intel.com> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Vanny E <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: York Yang <york.yang(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: merged

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coreboot-gerrit January 2019