coreboot-gerrit September 2018

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: amd/stoneyridge: Construct ACPI BERT table
by Martin Roth (Code Review) 06 Sep '18

06 Sep '18

Martin Roth has posted comments on this change. ( https://review.coreboot.org/28478 ) Change subject: amd/stoneyridge: Construct ACPI BERT table ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/28478 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I6fe38eefacaad0bc73d0cb4ae44a339a45857128 Gerrit-Change-Number: 28478 Gerrit-PatchSet: 2 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 06 Sep 2018 02:16:17 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: amd/stoneyridge: Construct BERT region from machine check
by Martin Roth (Code Review) 06 Sep '18

06 Sep '18

Martin Roth has posted comments on this change. ( https://review.coreboot.org/28477 ) Change subject: amd/stoneyridge: Construct BERT region from machine check ...................................................................... Patch Set 2: (3 comments) https://review.coreboot.org/#/c/28477/2/src/soc/amd/stoneyridge/mca.c File src/soc/amd/stoneyridge/mca.c: https://review.coreboot.org/#/c/28477/2/src/soc/amd/stoneyridge/mca.c@47 PS2, Line 47: 1 * ? https://review.coreboot.org/#/c/28477/2/src/soc/amd/stoneyridge/mca.c@117 PS2, Line 117: if (!IS_ENABLED(CONFIG_ACPI_BERT)) : return; why put this here instead of around the call? https://review.coreboot.org/#/c/28477/2/src/soc/amd/stoneyridge/mca.c@141 PS2, Line 141: goto failed; Can we end up with a half-filled-in table? Will that cause issues on the reporting side? Would it be better to generate it somewhere else, then copy the full entry into the table if there's size? -- To view, visit https://review.coreboot.org/28477 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I4d4ce29ddefa22aa29e6d3184f1adeaea1d5f837 Gerrit-Change-Number: 28477 Gerrit-PatchSet: 2 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin Roth <martinroth(a)google.com> Gerrit-Comment-Date: Thu, 06 Sep 2018 02:14:36 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

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Change in coreboot[master]: amd/stoneyridge: Create an MCA structure
by Martin Roth (Code Review) 06 Sep '18

06 Sep '18

Martin Roth has posted comments on this change. ( https://review.coreboot.org/28476 ) Change subject: amd/stoneyridge: Create an MCA structure ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/28476 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I0a98aecc83a0fa1c5ca7926849a89145a595d9ff Gerrit-Change-Number: 28476 Gerrit-PatchSet: 2 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 06 Sep 2018 02:07:59 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: soc/intel/skylake: Add support for CmdTriStateDis UPD in devicetree
by Shaunak Saha (Code Review) 06 Sep '18

06 Sep '18

Shaunak Saha has posted comments on this change. ( https://review.coreboot.org/28424 ) Change subject: soc/intel/skylake: Add support for CmdTriStateDis UPD in devicetree ...................................................................... Patch Set 2: > Patch Set 2: > > Is there an associated CL for fsp code to add support for CmdTriStateDis that would be needed to support this change? We do not need any FSP change. CmdTriStateDis UPD is already exposed in Skylake/kabylake Fspm. We are just using it here in this patch. -- To view, visit https://review.coreboot.org/28424 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ida69e443aa6ea4b524bd3ea2dcf26f4e63010291 Gerrit-Change-Number: 28424 Gerrit-PatchSet: 2 Gerrit-Owner: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 06 Sep 2018 01:54:56 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: amd/stoneyridge: Relocate MCA error identification
by Martin Roth (Code Review) 06 Sep '18

06 Sep '18

Martin Roth has posted comments on this change. ( https://review.coreboot.org/28475 ) Change subject: amd/stoneyridge: Relocate MCA error identification ...................................................................... Patch Set 2: (1 comment) https://review.coreboot.org/#/c/28475/2/src/soc/amd/stoneyridge/mca.c File src/soc/amd/stoneyridge/mca.c: https://review.coreboot.org/#/c/28475/2/src/soc/amd/stoneyridge/mca.c@8 PS2, Line 8: either remove 'either' -- To view, visit https://review.coreboot.org/28475 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ia3275e9135dc96ba4a717c9371f38843fa1e3e64 Gerrit-Change-Number: 28475 Gerrit-PatchSet: 2 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin Roth <martinroth(a)google.com> Gerrit-Comment-Date: Thu, 06 Sep 2018 01:52:24 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

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Change in coreboot[master]: amd/stoneyridge: Adjust memory map for reserved
by Martin Roth (Code Review) 06 Sep '18

06 Sep '18

Martin Roth has posted comments on this change. ( https://review.coreboot.org/28474 ) Change subject: amd/stoneyridge: Adjust memory map for reserved ...................................................................... Patch Set 2: Maybe create a bug or add a TODO to examine the size when you have time? -- To view, visit https://review.coreboot.org/28474 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I0958f6b6bab3fe9dae36c83e1fd9ae6ed0290a18 Gerrit-Change-Number: 28474 Gerrit-PatchSet: 2 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 06 Sep 2018 01:50:53 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: amd/stoneyridge: Adjust memory map for reserved
by Martin Roth (Code Review) 06 Sep '18

06 Sep '18

Martin Roth has posted comments on this change. ( https://review.coreboot.org/28474 ) Change subject: amd/stoneyridge: Adjust memory map for reserved ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/28474 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I0958f6b6bab3fe9dae36c83e1fd9ae6ed0290a18 Gerrit-Change-Number: 28474 Gerrit-PatchSet: 2 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 06 Sep 2018 01:49:45 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: amd/fam15: Add more MCA information
by Martin Roth (Code Review) 06 Sep '18

06 Sep '18

Martin Roth has posted comments on this change. ( https://review.coreboot.org/28473 ) Change subject: amd/fam15: Add more MCA information ...................................................................... Patch Set 2: (1 comment) https://review.coreboot.org/#/c/28473/2/src/include/cpu/amd/amdfam15.h File src/include/cpu/amd/amdfam15.h: https://review.coreboot.org/#/c/28473/2/src/include/cpu/amd/amdfam15.h@39 PS2, Line 39: ERRCOREID Just want to verify that core is correct here and above and that this isn't a typo for code as below. -- To view, visit https://review.coreboot.org/28473 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I0682288aa58c69aee323fb43f74027f7a1905b68 Gerrit-Change-Number: 28473 Gerrit-PatchSet: 2 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin Roth <martinroth(a)google.com> Gerrit-Comment-Date: Thu, 06 Sep 2018 01:48:19 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

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Change in coreboot[master]: x86/acpi: Add BERT table
by Martin Roth (Code Review) 06 Sep '18

06 Sep '18

Martin Roth has posted comments on this change. ( https://review.coreboot.org/28472 ) Change subject: x86/acpi: Add BERT table ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/28472 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ibeef4347678598f9f967797202a4ae6b25ee5538 Gerrit-Change-Number: 28472 Gerrit-PatchSet: 2 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 06 Sep 2018 01:43:02 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: x86/acpi: add BERT to the revision table
by Martin Roth (Code Review) 06 Sep '18

06 Sep '18

Martin Roth has posted comments on this change. ( https://review.coreboot.org/28471 ) Change subject: x86/acpi: add BERT to the revision table ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/28471 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ib4596fe8c0dd2a4e2e98df3a1bb60803c48d0256 Gerrit-Change-Number: 28471 Gerrit-PatchSet: 2 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 06 Sep 2018 01:41:57 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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coreboot-gerrit September 2018