Evgeny Zinoviev has posted comments on this change. ( https://review.coreboot.org/28565 )
Change subject: util/board_status: Add support of CMOS values dump
......................................................................
Patch Set 1:
Lines over 80 characters are all over this script, I'm not sure if I should fix it in this commit.
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Gerrit-Change-Number: 28565
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Gerrit-Owner: Evgeny Zinoviev <me(a)ch1p.com>
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Richard Spiegel has uploaded this change for review. ( https://review.coreboot.org/28564
Change subject: mb/google/kahlee/variants/baseboard: Set STAPM percentage
......................................................................
mb/google/kahlee/variants/baseboard: Set STAPM percentage
Default STAPM percentage is 68%, which causes a lot of thermal throttling.
AMD experimented with 80%, it works for grunt. This is initial code to
provide easy change path for other grunt based platforms.
BUG=b:111608748
TEST=build and boot grunt.
Change-Id: I22863f6ed76152bf872fce3e275f8a7fd8077504
Signed-off-by: Richard Spiegel <richard.spiegel(a)silverbackltd.com>
---
M src/mainboard/google/kahlee/Kconfig
M src/mainboard/google/kahlee/variants/baseboard/OemCustomize.c
2 files changed, 6 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/64/28564/1
diff --git a/src/mainboard/google/kahlee/Kconfig b/src/mainboard/google/kahlee/Kconfig
index 9180906..6f05fb8 100644
--- a/src/mainboard/google/kahlee/Kconfig
+++ b/src/mainboard/google/kahlee/Kconfig
@@ -88,6 +88,10 @@
int
default 4
+config STAPM_PERCENT
+ int
+ default 80
+
config IRQ_SLOT_COUNT
int
default 11
diff --git a/src/mainboard/google/kahlee/variants/baseboard/OemCustomize.c b/src/mainboard/google/kahlee/variants/baseboard/OemCustomize.c
index 4c5a294..c125af6 100644
--- a/src/mainboard/google/kahlee/variants/baseboard/OemCustomize.c
+++ b/src/mainboard/google/kahlee/variants/baseboard/OemCustomize.c
@@ -151,4 +151,6 @@
InitEarly->GnbConfig.PsppPolicy = PsppBalanceLow;
InitEarly->PlatformConfig.GnbAzI2sBusSelect = GnbAcpI2sBus;
InitEarly->PlatformConfig.GnbAzI2sBusPinConfig = GnbAcp2Tx4RxBluetooth;
+ InitEarly->PlatformConfig.PlatStapmConfig.CfgStapmScalar =
+ CONFIG_STAPM_PERCENT;
}
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Marc Jones has posted comments on this change. ( https://review.coreboot.org/28554 )
Change subject: amd/stoneyridge: Set BERT region size when no TSEG used
......................................................................
Patch Set 1: Code-Review+2
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Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/28553 )
Change subject: soc/sifive: fix compiler warning
......................................................................
soc/sifive: fix compiler warning
Fix the following compiler warning on the latest toolchain:
src/soc/sifive/fu540/otp.c:48:1: error: useless storage class specifier in empty declaration [-Werror]
} __packed;
^
Change-Id: Ice87c821de7650ac547394efa2a4bcc5ae1ea668
Signed-off-by: Philipp Hug <philipp(a)hug.cx>
Reviewed-on: https://review.coreboot.org/28553
Tested-by: Patrick Georgi <pgeorgi(a)google.com>
Reviewed-by: Patrick Georgi <pgeorgi(a)google.com>
---
M src/soc/sifive/fu540/otp.c
1 file changed, 1 insertion(+), 1 deletion(-)
Approvals:
Patrick Georgi: Verified; Looks good to me, approved
diff --git a/src/soc/sifive/fu540/otp.c b/src/soc/sifive/fu540/otp.c
index e6900fe..73a5573 100644
--- a/src/soc/sifive/fu540/otp.c
+++ b/src/soc/sifive/fu540/otp.c
@@ -29,7 +29,7 @@
* https://www.sifive.com/documentation/chips/freedom-u540-c000-manual/
*/
-typedef struct sifive_otp_registers {
+struct sifive_otp_registers {
u32 pa; /* Address input */
u32 paio; /* Program address input */
u32 pas; /* Program redundancy cell selection input */
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Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/28551 )
Change subject: soc/sifive/fu540: Makefile: include mtime_init in ramstage
......................................................................
Patch Set 4: Verified+1 Code-Review+2
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Patrick Georgi has removed a vote on this change.
Change subject: soc/sifive/fu540: Makefile: include mtime_init in ramstage
......................................................................
Removed Verified-1 by build bot (Jenkins) <no-reply(a)coreboot.org>
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