coreboot-gerrit September 2018

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Change in coreboot[master]: soc/sifive/fu540: create ram_resource with actual memory size
by Philipp Hug (Code Review) 13 Sep '18

13 Sep '18

Philipp Hug has uploaded this change for review. ( https://review.coreboot.org/28592 Change subject: soc/sifive/fu540: create ram_resource with actual memory size ...................................................................... soc/sifive/fu540: create ram_resource with actual memory size Change-Id: If6af6f679e24e56c79b995de0970d4e6f455e40a Signed-off-by: Philipp Hug <philipp(a)hug.cx> --- A src/soc/sifive/fu540/soc.c 1 file changed, 23 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/28592/1 diff --git a/src/soc/sifive/fu540/soc.c b/src/soc/sifive/fu540/soc.c new file mode 100644 index 0000000..34864ed --- /dev/null +++ b/src/soc/sifive/fu540/soc.c @@ -0,0 +1,23 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2018 Philipp Hug <philipp(a)hug.cx> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +static void soc_enable(struct device *dev) +{ + ram_resource(dev, 0, (uintptr_t)_dram/KiB, + (sdram_max_addressable_mb() - fb_size)*KiB - + (uintptr_t)_dram/KiB); +} + + -- To view, visit https://review.coreboot.org/28592 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: If6af6f679e24e56c79b995de0970d4e6f455e40a Gerrit-Change-Number: 28592 Gerrit-PatchSet: 1 Gerrit-Owner: Philipp Hug <philipp(a)hug.cx>

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Change in coreboot[master]: soc/sifive/fu540: Get SDRAM controller out of reset
by Jonathan Neuschäfer (Code Review) 13 Sep '18

13 Sep '18

Jonathan Neuschäfer has posted comments on this change. ( https://review.coreboot.org/28583 ) Change subject: soc/sifive/fu540: Get SDRAM controller out of reset ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/28583 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ifa6faffbaf353379f57e0f80c1c4ca2fc380f874 Gerrit-Change-Number: 28583 Gerrit-PatchSet: 2 Gerrit-Owner: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 13 Sep 2018 14:02:43 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: Makefile.inc: Fix dependency tracking of fmap{_config.h, .desc}
by Patrick Georgi (Code Review) 13 Sep '18

13 Sep '18

Patrick Georgi has submitted this change and it was merged. ( https://review.coreboot.org/28198 ) Change subject: Makefile.inc: Fix dependency tracking of fmap{_config.h,.desc} ...................................................................... Makefile.inc: Fix dependency tracking of fmap{_config.h,.desc} GNU make is too smart (or too stupid?) for empty recipes. In the case of empty recipes, GNU make doesn't consider the target as updated even if its prerequisites are. So if we told make to rebuild `build/romstage/ lib/cbfs.o` for instance, and the FMAP changed, it rerun the fmaptool recipe (as a prerequisite) but only considered `cbfs.o` to be updated by chance. Just not leaving the recipes empty seems to help here. I seeemed to remember that it wasn't that easy, but it fixes the issue for me... Change-Id: Ic7ecb88cf7df7f2488defd47ea02255fc10a67e9 Signed-off-by: Nico Huber <nico.h(a)gmx.de> Reviewed-on: https://review.coreboot.org/28198 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> --- M Makefile.inc 1 file changed, 2 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Patrick Georgi: Looks good to me, approved diff --git a/Makefile.inc b/Makefile.inc index 68b0eb2..8f58958 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -961,7 +961,9 @@ # generated at the same time as fmap.fmap $(obj)/fmap_config.h: $(obj)/fmap.fmap + true $(obj)/fmap.desc: $(obj)/fmap.fmap + true $(obj)/fmap.fmap: $(obj)/fmap.fmd $(FMAPTOOL) echo " FMAP $(FMAPTOOL) -h $(obj)/fmap_config.h $< $@" -- To view, visit https://review.coreboot.org/28198 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: merged Gerrit-Change-Id: Ic7ecb88cf7df7f2488defd47ea02255fc10a67e9 Gerrit-Change-Number: 28198 Gerrit-PatchSet: 2 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes HAOUAS <ehaouas(a)noos.fr>

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Change in coreboot[master]: Makefile.inc: Fix dependency tracking of fmap{_config.h, .desc}
by Patrick Georgi (Code Review) 13 Sep '18

13 Sep '18

Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/28198 ) Change subject: Makefile.inc: Fix dependency tracking of fmap{_config.h,.desc} ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/28198 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ic7ecb88cf7df7f2488defd47ea02255fc10a67e9 Gerrit-Change-Number: 28198 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Comment-Date: Thu, 13 Sep 2018 13:58:24 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: arch/riscv: provide a monotonic timer
by build bot (Jenkins) (Code Review) 13 Sep '18

13 Sep '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/27434 ) Change subject: arch/riscv: provide a monotonic timer ...................................................................... Patch Set 11: (2 comments) https://review.coreboot.org/#/c/27434/11/src/arch/riscv/include/arch/io.h File src/arch/riscv/include/arch/io.h: https://review.coreboot.org/#/c/27434/11/src/arch/riscv/include/arch/io.h@34 PS11, Line 34: static inline __attribute__((always_inline)) uint64_t read64(const volatile void *addr) line over 80 characters https://review.coreboot.org/#/c/27434/11/src/arch/riscv/include/arch/io.h@54 PS11, Line 54: static inline __attribute__((always_inline)) void write64(volatile void *addr, uint64_t value) line over 80 characters -- To view, visit https://review.coreboot.org/27434 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I5139601226e6f89da69e302a10f2fb56b4b24f38 Gerrit-Change-Number: 27434 Gerrit-PatchSet: 11 Gerrit-Owner: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: Ronald G. Minnich <rminnich(a)gmail.com> Gerrit-Reviewer: Shawn Chang <citypw(a)gmail.com> Gerrit-Reviewer: Xiang Wang <wxjstz(a)126.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 13 Sep 2018 13:54:17 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

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Change in coreboot[master]: soc/sifive/fu540: Implement uart_platform_refclk for UART divisor cal...
by Jonathan Neuschäfer (Code Review) 13 Sep '18

13 Sep '18

Jonathan Neuschäfer has posted comments on this change. ( https://review.coreboot.org/28584 ) Change subject: soc/sifive/fu540: Implement uart_platform_refclk for UART divisor calculation ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/28584 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I2291e4198cf466a8334211c6c46bc3268fc979a9 Gerrit-Change-Number: 28584 Gerrit-PatchSet: 2 Gerrit-Owner: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 13 Sep 2018 13:45:59 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: soc/sifive/fu540: Update clock settings according SiFive bootloader
by Jonathan Neuschäfer (Code Review) 13 Sep '18

13 Sep '18

Jonathan Neuschäfer has posted comments on this change. ( https://review.coreboot.org/28582 ) Change subject: soc/sifive/fu540: Update clock settings according SiFive bootloader ...................................................................... Patch Set 3: Code-Review+2 Thanks -- To view, visit https://review.coreboot.org/28582 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I844cc41ed197333adeae495e71ea70b4a9603650 Gerrit-Change-Number: 28582 Gerrit-PatchSet: 3 Gerrit-Owner: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 13 Sep 2018 13:40:42 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: soc/sifive/fu540: Update clock settings according SiFive bootloader
by Philipp Hug (Code Review) 13 Sep '18

13 Sep '18

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/28582 to look at the new patch set (#3). Change subject: soc/sifive/fu540: Update clock settings according SiFive bootloader ...................................................................... soc/sifive/fu540: Update clock settings according SiFive bootloader The documentation unfortunately doesn't match what SiFive uses in their FSBL. Use the same values as in FSBL to make DDR RAM work. Change-Id: I844cc41ed197333adeae495e71ea70b4a9603650 Signed-off-by: Philipp Hug <philipp(a)hug.cx> --- M src/soc/sifive/fu540/clock.c 1 file changed, 30 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/28582/3 -- To view, visit https://review.coreboot.org/28582 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I844cc41ed197333adeae495e71ea70b4a9603650 Gerrit-Change-Number: 28582 Gerrit-PatchSet: 3 Gerrit-Owner: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: soc/sifive/fu540: Update clock settings according SiFive bootloader
by Philipp Hug (Code Review) 13 Sep '18

13 Sep '18

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/28582 to look at the new patch set (#2). Change subject: soc/sifive/fu540: Update clock settings according SiFive bootloader ...................................................................... soc/sifive/fu540: Update clock settings according SiFive bootloader The documentation unfortunately doesn't match what SiFive uses in their FSBL. Use the same values as in FSBL to make DDR RAM work. Change-Id: I844cc41ed197333adeae495e71ea70b4a9603650 Signed-off-by: Philipp Hug <philipp(a)hug.cx> --- M src/soc/sifive/fu540/clock.c 1 file changed, 30 insertions(+), 8 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/28582/2 -- To view, visit https://review.coreboot.org/28582 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I844cc41ed197333adeae495e71ea70b4a9603650 Gerrit-Change-Number: 28582 Gerrit-PatchSet: 2 Gerrit-Owner: Philipp Hug <philipp(a)hug.cx> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: payloads/external: Add yabits payload
by Marc Jones (Code Review) 13 Sep '18

13 Sep '18

Marc Jones has posted comments on this change. ( https://review.coreboot.org/28590 ) Change subject: payloads/external: Add yabits payload ...................................................................... Patch Set 4: Code-Review+2 -- To view, visit https://review.coreboot.org/28590 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I132970e952c605c73cfe33dc47f20170ae8aa899 Gerrit-Change-Number: 28590 Gerrit-PatchSet: 4 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Marc Jones <marc(a)marcjonesconsulting.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 13 Sep 2018 13:33:52 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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coreboot-gerrit September 2018