Hello Alexander Couzens,
I'd like you to do a code review. Please visit
https://review.coreboot.org/28636
to review the following change.
Change subject: Kconfig: hide most options for non-developers
......................................................................
Kconfig: hide most options for non-developers
Add a new DEVELOPER option. If not set, most options are
invisible (and therefore take the default value), except for:
- mainboard selection
- payload selection
- choice if blobs shall be included
- version string suffix
Also shuffle around some of the generic options so they're grouped
by topic (eg. everything involving compilers is now in a "Compiler"
menu).
Change-Id: I3d7a298807185419ecc400a9072269b32c7d71d4
Signed-off-by: Patrick Georgi <pgeorgi(a)google.com>
---
M src/Kconfig
M src/console/Kconfig
M src/device/Kconfig
3 files changed, 120 insertions(+), 80 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/28636/1
diff --git a/src/Kconfig b/src/Kconfig
index ca75c0b..0876bce 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -22,6 +22,13 @@
bool
default y
+config DEVELOPER
+ bool "Show developer options"
+ default n
+ help
+ Make it easier for non-developers to build an image by hiding all
+ the cruft.
+
config LOCALVERSION
string "Local version string"
help
@@ -32,12 +39,15 @@
the coreboot version number, so that you can easily distinguish
boot logs of different boards from each other.
-config CBFS_PREFIX
- string "CBFS prefix to use"
- default "fallback"
+config USE_BLOBS
+ bool "Allow use of binary-only repository"
help
- Select the prefix to all files put into the image. It's "fallback"
- by default, "normal" is a common alternative.
+ This draws in the blobs repository, which contains binary files that
+ might be required for some chipsets or boards.
+ This flag ensures that a "Free" option remains available for users.
+
+menu "Compiler settings"
+ visible if DEVELOPER
choice
prompt "Compiler to use"
@@ -94,6 +104,27 @@
For details see https://ccache.samba.org.
+config COVERAGE
+ bool "Code coverage support"
+ depends on COMPILER_GCC
+ help
+ Add code coverage support for coreboot. This will store code
+ coverage information in CBMEM for extraction from user space.
+ If unsure, say N.
+
+config UBSAN
+ bool "Undefined behavior sanitizer support"
+ default n
+ help
+ Instrument the code with checks for undefined behavior. If unsure,
+ say N because it adds a small performance penalty and may abort
+ on code that happens to work in spite of the UB.
+
+endmenu
+
+menu "Regenerate pre-compiled code"
+ visible if DEVELOPER
+
config FMD_GENPARSER
bool "Generate flashmap descriptor parser using flex and bison"
default n
@@ -112,21 +143,28 @@
Otherwise, say N to use the provided pregenerated scanner/parser.
+endmenu
+
config USE_OPTION_TABLE
- bool "Use CMOS for configuration values"
+ prompt "Use CMOS for configuration values" if DEVELOPER
+ bool
depends on HAVE_OPTION_TABLE
help
Enable this option if coreboot shall read options from the "CMOS"
NVRAM instead of using hard-coded values.
config STATIC_OPTION_TABLE
- bool "Load default configuration values into CMOS on each boot"
+ prompt "Load default configuration values into CMOS on each boot" if DEVELOPER
+ bool
depends on USE_OPTION_TABLE
help
Enable this option to reset "CMOS" NVRAM values to default on
every boot. Use this if you want the NVRAM configuration to
never be modified from its default values.
+menu "Compression"
+ visible if DEVELOPER
+
config COMPRESS_RAMSTAGE
bool "Compress ramstage with LZMA"
# Default value set at the end of the file
@@ -158,6 +196,68 @@
user-selectable. (There's no real point in offering this to the user
anyway... if it works and saves boot time, you would always want it.)
+endmenu
+
+config COLLECT_TIMESTAMPS
+ prompt "Create a table of timestamps collected during boot" if DEVELOPER
+ bool
+ default y if ARCH_X86
+ help
+ Make coreboot create a table of timer-ID/timer-value pairs to
+ allow measuring time spent at different phases of the boot process.
+
+config TIMESTAMPS_ON_CONSOLE
+ prompt "Print the timestamp values on the console" if DEVELOPER
+ bool
+ default n
+ depends on COLLECT_TIMESTAMPS
+ help
+ Print the timestamps to the debug console if enabled at level spew.
+
+config NO_RELOCATABLE_RAMSTAGE
+ bool
+ default n if ARCH_X86
+ default y
+
+config RELOCATABLE_RAMSTAGE
+ bool
+ depends on EARLY_CBMEM_INIT
+ default !NO_RELOCATABLE_RAMSTAGE
+ select RELOCATABLE_MODULES
+ help
+ The reloctable ramstage support allows for the ramstage to be built
+ as a relocatable module. The stage loader can identify a place
+ out of the OS way so that copying memory is unnecessary during an S3
+ wake. When selecting this option the romstage is responsible for
+ determing a stack location to use for loading the ramstage.
+
+config CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM
+ depends on RELOCATABLE_RAMSTAGE
+ bool
+ help
+ The relocated ramstage is saved in an area specified by the
+ by the board and/or chipset.
+
+menu "CBFS configuration"
+ visible if DEVELOPER
+
+config UPDATE_IMAGE
+ bool "Update existing coreboot.rom image"
+ help
+ If this option is enabled, no new coreboot.rom file
+ is created. Instead it is expected that there already
+ is a suitable file for further processing.
+ The bootblock will not be modified.
+
+ If unsure, select 'N'
+
+config CBFS_PREFIX
+ string "CBFS prefix to use"
+ default "fallback"
+ help
+ Select the prefix to all files put into the image. It's "fallback"
+ by default, "normal" is a common alternative.
+
config INCLUDE_CONFIG_FILE
bool "Include the coreboot .config file into the ROM image"
# Default value set at the end of the file
@@ -190,77 +290,6 @@
config 0x8d740 raw 3324
(empty) 0x8e480 null 3610440
-config COLLECT_TIMESTAMPS
- bool "Create a table of timestamps collected during boot"
- default y if ARCH_X86
- help
- Make coreboot create a table of timer-ID/timer-value pairs to
- allow measuring time spent at different phases of the boot process.
-
-config TIMESTAMPS_ON_CONSOLE
- bool "Print the timestamp values on the console"
- default n
- depends on COLLECT_TIMESTAMPS
- help
- Print the timestamps to the debug console if enabled at level spew.
-
-config USE_BLOBS
- bool "Allow use of binary-only repository"
- help
- This draws in the blobs repository, which contains binary files that
- might be required for some chipsets or boards.
- This flag ensures that a "Free" option remains available for users.
-
-config COVERAGE
- bool "Code coverage support"
- depends on COMPILER_GCC
- help
- Add code coverage support for coreboot. This will store code
- coverage information in CBMEM for extraction from user space.
- If unsure, say N.
-
-config UBSAN
- bool "Undefined behavior sanitizer support"
- default n
- help
- Instrument the code with checks for undefined behavior. If unsure,
- say N because it adds a small performance penalty and may abort
- on code that happens to work in spite of the UB.
-
-config NO_RELOCATABLE_RAMSTAGE
- bool
- default n if ARCH_X86
- default y
-
-config RELOCATABLE_RAMSTAGE
- bool
- depends on EARLY_CBMEM_INIT
- default !NO_RELOCATABLE_RAMSTAGE
- select RELOCATABLE_MODULES
- help
- The reloctable ramstage support allows for the ramstage to be built
- as a relocatable module. The stage loader can identify a place
- out of the OS way so that copying memory is unnecessary during an S3
- wake. When selecting this option the romstage is responsible for
- determing a stack location to use for loading the ramstage.
-
-config CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM
- depends on RELOCATABLE_RAMSTAGE
- bool
- help
- The relocated ramstage is saved in an area specified by the
- by the board and/or chipset.
-
-config UPDATE_IMAGE
- bool "Update existing coreboot.rom image"
- help
- If this option is enabled, no new coreboot.rom file
- is created. Instead it is expected that there already
- is a suitable file for further processing.
- The bootblock will not be modified.
-
- If unsure, select 'N'
-
config BOOTSPLASH_IMAGE
bool "Add a bootsplash image"
help
@@ -280,6 +309,8 @@
endmenu
+endmenu
+
menu "Mainboard"
source "src/mainboard/Kconfig"
@@ -307,7 +338,8 @@
"variant/devicetree-override.cb"
config CBFS_SIZE
- hex "Size of CBFS filesystem in ROM"
+ prompt "Size of CBFS filesystem in ROM" if DEVELOPER
+ hex
# Default value set at the end of the file
help
This is the part of the ROM actually managed by CBFS, located at the
@@ -319,7 +351,8 @@
binaries.
config FMDFILE
- string "fmap description file in fmd format"
+ prompt "fmap description file in fmd format" if DEVELOPER
+ string
default "src/mainboard/$(CONFIG_MAINBOARD_DIR)/chromeos.fmd" if CHROMEOS
default ""
help
@@ -345,6 +378,7 @@
which describes this constraint.
menu "Chipset"
+ visible if DEVELOPER
comment "SoC"
source "src/soc/*/Kconfig"
@@ -372,12 +406,14 @@
source "src/device/Kconfig"
menu "Generic Drivers"
+ visible if DEVELOPER
source "src/drivers/*/Kconfig"
source "src/drivers/*/*/Kconfig"
source "src/commonlib/storage/Kconfig"
endmenu
menu "Security"
+ visible if DEVELOPER
source "src/security/Kconfig"
@@ -596,6 +632,7 @@
#The actual selection and help texts are in the following menu.
menu "System tables"
+ visible if DEVELOPER
config GENERATE_MP_TABLE
prompt "Generate an MP table" if HAVE_MP_TABLE || DRIVERS_GENERIC_IOAPIC
@@ -676,6 +713,7 @@
source "payloads/Kconfig"
menu "Debugging"
+ visible if DEVELOPER
# TODO: Better help text and detailed instructions.
config GDB_STUB
diff --git a/src/console/Kconfig b/src/console/Kconfig
index a7a16f0..98689c4 100644
--- a/src/console/Kconfig
+++ b/src/console/Kconfig
@@ -1,4 +1,5 @@
menu "Console"
+ visible if DEVELOPER
config BOOTBLOCK_CONSOLE
bool "Enable early (bootblock) console output."
diff --git a/src/device/Kconfig b/src/device/Kconfig
index 016e104..083092a 100644
--- a/src/device/Kconfig
+++ b/src/device/Kconfig
@@ -15,6 +15,7 @@
##
menu "Devices"
+ visible if DEVELOPER
config HAVE_VGA_TEXT_FRAMEBUFFER
bool
--
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-MessageType: newchange
Gerrit-Change-Id: I3d7a298807185419ecc400a9072269b32c7d71d4
Gerrit-Change-Number: 28636
Gerrit-PatchSet: 1
Gerrit-Owner: Patrick Georgi <pgeorgi(a)google.com>
Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu>
Hello Alexander Couzens,
I'd like you to do a code review. Please visit
https://review.coreboot.org/28635
to review the following change.
Change subject: util/lint: Ignore "visible if" statement in Kconfig files
......................................................................
util/lint: Ignore "visible if" statement in Kconfig files
They allow reducing the visible set of options to remove clutter.
Change-Id: I18c953c7feae23c0752392a2bf8f49783c17310e
Signed-off-by: Patrick Georgi <pgeorgi(a)google.com>
---
M util/lint/kconfig_lint
1 file changed, 7 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/28635/1
diff --git a/util/lint/kconfig_lint b/util/lint/kconfig_lint
index fb8e60f..62997dd 100755
--- a/util/lint/kconfig_lint
+++ b/util/lint/kconfig_lint
@@ -682,6 +682,13 @@
push( @inside_menu, $menu );
}
+ # visible if <expr>
+ elsif ( $line =~ /^\s*visible if.*$/ ) {
+ # Must come directly after menu line (and on a separate line)
+ # but kconfig already checks for that.
+ # Ignore it.
+ }
+
# endmenu
elsif ( $line =~ /^\s*endmenu/ ) {
$inside_config = "";
--
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Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu>
Felix Held has posted comments on this change. ( https://review.coreboot.org/28368 )
Change subject: Documentation: add description for util/pmh7tool
......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/#/c/28368/2/util/pmh7tool/description.md
File util/pmh7tool/description.md:
https://review.coreboot.org/#/c/28368/2/util/pmh7tool/description.md@1
PS2, Line 1: Dumps PMH7 registers on Lenovo ThinkPads. `C`
The tool can not only dump the register space, but also write registers. I'd suggest to add that to the description. Maybe also add that the pmh7 is for example used for switching on and off the power of some devices on the board.
--
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Gerrit-Owner: Evgeny Zinoviev <me(a)ch1p.com>
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Felix Held has posted comments on this change. ( https://review.coreboot.org/28596 )
Change subject: mb/asrock/g41m_vs3_r2: Add mainboard
......................................................................
Patch Set 8: Code-Review+1
Is the different PCI IRQ assignment necessary?
--
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Gerrit-Comment-Date: Sun, 16 Sep 2018 18:09:11 +0000
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Felix Held has posted comments on this change. ( https://review.coreboot.org/28630 )
Change subject: mb/asrock/g41c-gs: Link separate gpio.c files
......................................................................
Patch Set 2: Code-Review+2
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