Matthias Kaehlcke has uploaded this change for review. ( https://review.coreboot.org/28712
Change subject: google/cheza: Read MAC addresses from the VPD
......................................................................
google/cheza: Read MAC addresses from the VPD
The Bluetooth/WiFi module on cheza isn't pre-programmed with MAC
addresses. Read the MAC addresses from the VPD and add them the
coreboot tables.
BUG=b:113114217
Change-Id: I35a6c343e60d3ff76610a7e1eec38b8e53644eec
Signed-off-by: Matthias Kaehlcke <mka(a)chromium.org>
---
M src/mainboard/google/cheza/mainboard.c
1 file changed, 9 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/28712/1
diff --git a/src/mainboard/google/cheza/mainboard.c b/src/mainboard/google/cheza/mainboard.c
index fdec3fb..e2c7ecb 100644
--- a/src/mainboard/google/cheza/mainboard.c
+++ b/src/mainboard/google/cheza/mainboard.c
@@ -13,6 +13,7 @@
* GNU General Public License for more details.
*/
+#include <boot/coreboot_tables.h>
#include <device/device.h>
#include <bootblock_common.h>
#include <gpio.h>
@@ -37,3 +38,11 @@
.name = CONFIG_MAINBOARD_PART_NUMBER,
.enable_dev = mainboard_enable,
};
+
+void lb_board(struct lb_header *header)
+{
+#if IS_ENABLED(CONFIG_CHROMEOS)
+ /* Retrieve WiFi and Bluetooth MAC addresses. */
+ lb_table_add_macs_from_vpd(header);
+#endif
+}
--
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Gerrit-Change-Id: I35a6c343e60d3ff76610a7e1eec38b8e53644eec
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Gerrit-Owner: Matthias Kaehlcke <mka(a)chromium.org>
Matthias Kaehlcke has uploaded this change for review. ( https://review.coreboot.org/28711
Change subject: vpd: Add support for reading BD addreses from the VPD
......................................................................
vpd: Add support for reading BD addreses from the VPD
Also scan the VPD for Bluetooth device addresses (BD_ADDR). Add them to
the tables after Ethernet and WiFi MACs to avoid mismatches on existing
systems that may have 'bluetooth_macX' set.
BUG=b:113114217
Change-Id: Ib290fba2504f6ed80c3a95e24627ae5922e608af
Signed-off-by: Matthias Kaehlcke <mka(a)chromium.org>
---
M src/vendorcode/google/chromeos/vpd_mac.c
1 file changed, 5 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/28711/1
diff --git a/src/vendorcode/google/chromeos/vpd_mac.c b/src/vendorcode/google/chromeos/vpd_mac.c
index e3ef04b..08ca58c 100644
--- a/src/vendorcode/google/chromeos/vpd_mac.c
+++ b/src/vendorcode/google/chromeos/vpd_mac.c
@@ -59,10 +59,12 @@
void lb_table_add_macs_from_vpd(struct lb_header *header)
{
/*
- * Mac addresses in the VPD can be stored in two groups, for ethernet
- * and WiFi, with keys 'ethernet_macX and wifi_macX.
+ * Mac addresses in the VPD can be stored in three groups, for
+ * ethernet, WiFi and Bluetooh, with keys 'ethernet_macX,
+ * wifi_macX and bluetooth_macX
*/
- const char *mac_addr_key_bases[] = {"ethernet_mac0", "wifi_mac0"};
+ const char *mac_addr_key_bases[] = {"ethernet_mac0", "wifi_mac0",
+ "bluetooth_mac0"};
char mac_addr_key[20]; /* large enough for either key */
char mac_addr_str[13]; /* 12 symbols and the trailing zero. */
int i, count;
--
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Nick Vaccaro has posted comments on this change. ( https://review.coreboot.org/28274 )
Change subject: skylake,kabylake: Add support to set eMMC tuning param from dev tree
......................................................................
Patch Set 1: Code-Review+2
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build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/27619 )
Change subject: amd/common/psp: Remove use of PspBaseLib
......................................................................
Patch Set 18:
(2 comments)
https://review.coreboot.org/#/c/27619/18/src/soc/amd/common/block/psp/psp.c
File src/soc/amd/common/block/psp/psp.c:
https://review.coreboot.org/#/c/27619/18/src/soc/amd/common/block/psp/psp.c…
PS18, Line 70: pci_write_config32(SOC_PSP_DEV, PSP_PCI_EXT_HDR_CTRL, MAGIC_ENABLE_BITS);
line over 80 characters
https://review.coreboot.org/#/c/27619/18/src/soc/amd/common/block/psp/psp.c…
PS18, Line 92: if (pci_read_config32(SOC_PSP_DEV, PSP_PCI_EXT_HDR_CTRL) & BAR3HIDEBIT) {
line over 80 characters
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Philipp Hug has posted comments on this change. ( https://review.coreboot.org/28710 )
Change subject: soc/sifive/fu540: Remove PLL parameters from sdram.c
......................................................................
Patch Set 1: Code-Review+1
Thanks!
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Jonathan Neuschäfer has uploaded this change for review. ( https://review.coreboot.org/28710
Change subject: soc/sifive/fu540: Remove PLL parameters from sdram.c
......................................................................
soc/sifive/fu540: Remove PLL parameters from sdram.c
These parameters are not used and not necessary in sdram.c, because the
DDR PLL is configured in clock.c.
Change-Id: I8060bd21e05765cedf7bdabc28052c32774f9ca1
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net>
---
M src/soc/sifive/fu540/sdram.c
1 file changed, 0 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/28710/1
diff --git a/src/soc/sifive/fu540/sdram.c b/src/soc/sifive/fu540/sdram.c
index 6418b0d..bf549bf 100644
--- a/src/soc/sifive/fu540/sdram.c
+++ b/src/soc/sifive/fu540/sdram.c
@@ -25,8 +25,6 @@
#include "ddrregs.h"
#define DDR_SIZE (8UL * 1024UL * 1024UL * 1024UL)
-#define DDRCTLPLL_F 55
-#define DDRCTLPLL_Q 2
void sdram_init(void)
{
--
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Martin Roth has posted comments on this change. ( https://review.coreboot.org/28690 )
Change subject: Revert "mb/google/poppy/variants/nautilus: Set grip sensor threshold"
......................................................................
Patch Set 2:
(1 comment)
https://review.coreboot.org/#/c/28690/2//COMMIT_MSG
Commit Message:
https://review.coreboot.org/#/c/28690/2//COMMIT_MSG@11
PS2, Line 11: Reason for revert: b:113303916
Please remember that this is an open source project and most people can't see this bug. A comment like this would be more appropriate:
Use values from driver instead of hardcoding in firmware ( b:113303916)
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