coreboot-gerrit September 2018

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: soc/amd/stoneyridge/BiosCallOuts: Remove #include <AmdLib.h>
by Richard Spiegel (Code Review) 25 Sep '18

25 Sep '18

Richard Spiegel has uploaded this change for review. ( https://review.coreboot.org/28741 Change subject: soc/amd/stoneyridge/BiosCallOuts: Remove #include <AmdLib.h> ...................................................................... soc/amd/stoneyridge/BiosCallOuts: Remove #include <AmdLib.h> In preparation to remove AmdLib, remove reference to AmdLib.h in soc/amd/stoneyridge/BiosCallOuts. BUG=b:112525011 TEST=Buildgrunt. Change-Id: If80eb64fb736ff26ab226a16b583c8b1c29831f4 Signed-off-by: Richard Spiegel <richard.spiegel(a)silverbackltd.com> --- M src/soc/amd/stoneyridge/BiosCallOuts.c 1 file changed, 0 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/28741/1 diff --git a/src/soc/amd/stoneyridge/BiosCallOuts.c b/src/soc/amd/stoneyridge/BiosCallOuts.c index 9f74e8f..027ba4e 100644 --- a/src/soc/amd/stoneyridge/BiosCallOuts.c +++ b/src/soc/amd/stoneyridge/BiosCallOuts.c @@ -24,7 +24,6 @@ #include <stdlib.h> #include <amdblocks/agesawrapper.h> -#include <amdlib.h> #include <amdblocks/dimm_spd.h> #include "chip.h" #include <amdblocks/car.h> -- To view, visit https://review.coreboot.org/28741 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: If80eb64fb736ff26ab226a16b583c8b1c29831f4 Gerrit-Change-Number: 28741 Gerrit-PatchSet: 1 Gerrit-Owner: Richard Spiegel <richard.spiegel(a)silverbackltd.com>

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Change in coreboot[master]: mb/google/nocturne: Change IMX319 sensor link freq
by Lijian Zhao (Code Review) 25 Sep '18

25 Sep '18

Lijian Zhao has posted comments on this change. ( https://review.coreboot.org/28736 ) Change subject: mb/google/nocturne: Change IMX319 sensor link freq ...................................................................... Patch Set 2: > (1 comment) > > Are there corresponding kernel changes? > Please ensure coreboot and kernel changes land in ToT as well as > respective branches of kernel and coreboot. Please share the link of kernel changes in commit message. -- To view, visit https://review.coreboot.org/28736 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Iac9a72253e0529bf2c0785fb701b7bc251bcbab5 Gerrit-Change-Number: 28736 Gerrit-PatchSet: 2 Gerrit-Owner: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Bingbu Cao <bingbu.cao(a)intel.com> Gerrit-Reviewer: Chiranjeevi Rapolu <chiranjeevi.rapolu(a)intel.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Rajmohan Mani <rajmohan.mani(a)intel.com> Gerrit-Reviewer: Ricky Liang <jcliang(a)chromium.org> Gerrit-Reviewer: Tomasz Figa <tfiga(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 25 Sep 2018 22:04:05 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: mb/google/nocturne: Change IMX319 sensor link freq
by Lijian Zhao (Code Review) 25 Sep '18

25 Sep '18

Hello Rajmohan Mani, Tomasz Figa, Ricky Liang, build bot (Jenkins), Bingbu Cao, Chiranjeevi Rapolu, I'd like you to reexamine a change. Please visit https://review.coreboot.org/28736 to look at the new patch set (#2). Change subject: mb/google/nocturne: Change IMX319 sensor link freq ...................................................................... mb/google/nocturne: Change IMX319 sensor link freq Change link frequency of IMX319 from 360Mhz to 482.4 Mhz to match the changes from kernel driver. Bug=b.116082248 Change-Id: Iac9a72253e0529bf2c0785fb701b7bc251bcbab5 Signed-off-by: Lijian Zhao <lijian.zhao(a)intel.com> --- M src/mainboard/google/poppy/variants/nocturne/include/variant/acpi/cam0.asl 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/36/28736/2 -- To view, visit https://review.coreboot.org/28736 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: Iac9a72253e0529bf2c0785fb701b7bc251bcbab5 Gerrit-Change-Number: 28736 Gerrit-PatchSet: 2 Gerrit-Owner: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Bingbu Cao <bingbu.cao(a)intel.com> Gerrit-Reviewer: Chiranjeevi Rapolu <chiranjeevi.rapolu(a)intel.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Rajmohan Mani <rajmohan.mani(a)intel.com> Gerrit-Reviewer: Ricky Liang <jcliang(a)chromium.org> Gerrit-Reviewer: Tomasz Figa <tfiga(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: soc/intel/cannonlake: Move SkipMpInit config to FSPM
by Lijian Zhao (Code Review) 25 Sep '18

25 Sep '18

Lijian Zhao has uploaded this change for review. ( https://review.coreboot.org/28740 Change subject: soc/intel/cannonlake: Move SkipMpInit config to FSPM ...................................................................... soc/intel/cannonlake: Move SkipMpInit config to FSPM SkipMpInit UPD had ben moved from Fsp SiliconInit UPD to Fsp MemoryInit UPD, hence change the settings in coreboot side as well. The old options in SiliconInit get deprecated, so leave the code as is will be harmless. Make the changes limited to coffeelake itself. Change-Id: If968de78117068668e4f0006c412442c50658ba9 Signed-off-by: Lijian Zhao <lijian.zhao(a)intel.com> --- M src/soc/intel/cannonlake/romstage/romstage.c 1 file changed, 4 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/28740/1 diff --git a/src/soc/intel/cannonlake/romstage/romstage.c b/src/soc/intel/cannonlake/romstage/romstage.c index ae1ba4d..8bdabbf 100644 --- a/src/soc/intel/cannonlake/romstage/romstage.c +++ b/src/soc/intel/cannonlake/romstage/romstage.c @@ -22,6 +22,7 @@ #include <compiler.h> #include <console/console.h> #include <fsp/util.h> +#include <intelblocks/chip.h> #include <intelblocks/cse.h> #include <intelblocks/pmclib.h> #include <memory_info.h> @@ -175,6 +176,9 @@ m_cfg->VmxEnable = 0; else m_cfg->VmxEnable = config->VmxEnable; +#if IS_ENABLED(CONFIG_SOC_INTEL_COFFEELAKE) + m_cfg->SkipMpInit = !chip_get_fsp_mp_init(); +#endif } void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version) -- To view, visit https://review.coreboot.org/28740 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: If968de78117068668e4f0006c412442c50658ba9 Gerrit-Change-Number: 28740 Gerrit-PatchSet: 1 Gerrit-Owner: Lijian Zhao <lijian.zhao(a)intel.com>

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Change in coreboot[master]: vpd: Add support for reading BD addreses from the VPD
by Matthias Kaehlcke (Code Review) 25 Sep '18

25 Sep '18

Matthias Kaehlcke has abandoned this change. ( https://review.coreboot.org/28711 ) Change subject: vpd: Add support for reading BD addreses from the VPD ...................................................................... Abandoned Will implement functionality in depthcharge as suggested by Julius -- To view, visit https://review.coreboot.org/28711 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: abandon Gerrit-Change-Id: Ib290fba2504f6ed80c3a95e24627ae5922e608af Gerrit-Change-Number: 28711 Gerrit-PatchSet: 1 Gerrit-Owner: Matthias Kaehlcke <mka(a)chromium.org> Gerrit-Reviewer: Brian Norris <briannorris(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Matthias Kaehlcke <mka(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: vendorcode/intel fspapi.h replace proprietary copy with free copy
by Ian Kelling (Code Review) 25 Sep '18

25 Sep '18

Ian Kelling has uploaded this change for review. ( https://review.coreboot.org/28739 Change subject: vendorcode/intel fspapi.h replace proprietary copy with free copy ...................................................................... vendorcode/intel fspapi.h replace proprietary copy with free copy src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fspapi.h has a nonfree license. src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fspapi.h is freely licensed and the the same except a small comment. Replace the nonfree copy with the free one. Change-Id: Ie45608423935f21aaee7772f283df63fd55d2ad3 Signed-off-by: Ian Kelling <iank(a)fsf.org> --- M src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fspapi.h 1 file changed, 26 insertions(+), 10 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/28739/1 diff --git a/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fspapi.h b/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fspapi.h index 18a1582..26afc0e 100644 --- a/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fspapi.h +++ b/src/vendorcode/intel/fsp1_0/ivybridge_i89xx/include/fspapi.h @@ -1,13 +1,30 @@ /** -Copyright (c) 2008 - 2013, Intel Corporation. All rights reserved. -This software and associated documentation (if any) is furnished -under a license and may only be used or copied in accordance -with the terms of the license. Except as permitted by such -license, no part of this software or documentation may be -reproduced, stored in a retrieval system, or transmitted in any -form or by any means without the express written consent of -Intel Corporation. +Copyright (C) 2013, Intel Corporation + +Redistribution and use in source and binary forms, with or without modification, +are permitted provided that the following conditions are met: + +* Redistributions of source code must retain the above copyright notice, this + list of conditions and the following disclaimer. +* Redistributions in binary form must reproduce the above copyright notice, this + list of conditions and the following disclaimer in the documentation and/or + other materials provided with the distribution. +* Neither the name of Intel Corporation nor the names of its contributors may + be used to endorse or promote products derived from this software without + specific prior written permission. + + THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" + AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE + LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR + CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF + SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS + INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN + CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) + ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF + THE POSSIBILITY OF SUCH DAMAGE. **/ @@ -26,7 +43,7 @@ typedef struct { UINT32 *StackTop; - UINT32 BootMode; /* Refer to boot mode defined in MdePkg\Include\Pi\PiBootMode.h */ + UINT32 BootMode; VOID *UpdDataRgnPtr; UINT32 Reserved[7]; } FSP_INIT_RT_COMMON_BUFFER; @@ -42,7 +59,6 @@ #pragma pack() - typedef FSP_STATUS (FSPAPI *FSP_FSP_INIT) (FSP_INIT_PARAMS *FspInitParamPtr); typedef FSP_STATUS (FSPAPI *FSP_NOTFY_PHASE) (NOTIFY_PHASE_PARAMS *NotifyPhaseParamPtr); -- To view, visit https://review.coreboot.org/28739 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ie45608423935f21aaee7772f283df63fd55d2ad3 Gerrit-Change-Number: 28739 Gerrit-PatchSet: 1 Gerrit-Owner: Ian Kelling <ian(a)iankelling.org>

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Change in coreboot[master]: mb/google/nocturne: Change IMX319 sensor link freq
by Rajmohan Mani (Code Review) 25 Sep '18

25 Sep '18

Rajmohan Mani has posted comments on this change. ( https://review.coreboot.org/28736 ) Change subject: mb/google/nocturne: Change IMX319 sensor link freq ...................................................................... Patch Set 1: (1 comment) Are there corresponding kernel changes? Please ensure coreboot and kernel changes land in ToT as well as respective branches of kernel and coreboot. https://review.coreboot.org/#/c/28736/1//COMMIT_MSG Commit Message: https://review.coreboot.org/#/c/28736/1//COMMIT_MSG@9 PS1, Line 9: Change link frequency of IMX319 from 360Mhz to 482.4 Mhz Please also state why this change is needed. -- To view, visit https://review.coreboot.org/28736 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Iac9a72253e0529bf2c0785fb701b7bc251bcbab5 Gerrit-Change-Number: 28736 Gerrit-PatchSet: 1 Gerrit-Owner: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Bingbu Cao <bingbu.cao(a)intel.com> Gerrit-Reviewer: Chiranjeevi Rapolu <chiranjeevi.rapolu(a)intel.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Rajmohan Mani <rajmohan.mani(a)intel.com> Gerrit-Reviewer: Ricky Liang <jcliang(a)chromium.org> Gerrit-Reviewer: Tomasz Figa <tfiga(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 25 Sep 2018 18:41:51 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

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Change in coreboot[master]: mb/google/poppy/variants/nocturne: Update DPTF settings
by Puthikorn Voravootivat (Code Review) 25 Sep '18

25 Sep '18

Puthikorn Voravootivat has uploaded a new patch set (#2). ( https://review.coreboot.org/28738 ) Change subject: mb/google/poppy/variants/nocturne: Update DPTF settings ...................................................................... mb/google/poppy/variants/nocturne: Update DPTF settings The previous does not work well enough when testing with high ambient temperature. Update DPTF settings to make it work better. BUG=b:112550414 BRANCH=None TEST=Manually tested by thermal team. Change-Id: Idf7efa76b2c6085cf97aa9f65c6ce066e8cff99a Signed-off-by: Puthikorn Voravootivat <puthik(a)chromium.org> --- M src/mainboard/google/poppy/variants/nocturne/include/variant/acpi/dptf.asl 1 file changed, 3 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/28738/2 -- To view, visit https://review.coreboot.org/28738 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: Idf7efa76b2c6085cf97aa9f65c6ce066e8cff99a Gerrit-Change-Number: 28738 Gerrit-PatchSet: 2 Gerrit-Owner: Puthikorn Voravootivat <puthik(a)chromium.org>

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Change in coreboot[master]: mb/google/poppy/variants/nocturne: Update DPTF settings
by Puthikorn Voravootivat (Code Review) 25 Sep '18

25 Sep '18

Puthikorn Voravootivat has uploaded this change for review. ( https://review.coreboot.org/28738 Change subject: mb/google/poppy/variants/nocturne: Update DPTF settings ...................................................................... mb/google/poppy/variants/nocturne: Update DPTF settings The previous does not work well enough when testing with high ambient temperature. Update DPTF settings to make it work better. BUG=b:112550414 BRANCH=None TEST=Manually tested by thermal team. Change-Id: Idf7efa76b2c6085cf97aa9f65c6ce066e8cff99a Signed-off-by: Puthikorn Voravootivat <puthik(a)chromium.org> --- M 3rdparty/blobs M src/mainboard/google/poppy/variants/nocturne/include/variant/acpi/dptf.asl 2 files changed, 4 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/28738/1 diff --git a/3rdparty/blobs b/3rdparty/blobs index 372012e..c285102 160000 --- a/3rdparty/blobs +++ b/3rdparty/blobs @@ -1 +1 @@ -Subproject commit 372012e8e1d0d01f3e77ff73b118665b41ff68b6 +Subproject commit c2851026e72dcb7b8c1d19e750c0416a6abf41ce diff --git a/src/mainboard/google/poppy/variants/nocturne/include/variant/acpi/dptf.asl b/src/mainboard/google/poppy/variants/nocturne/include/variant/acpi/dptf.asl index f9773b8..40c7f63 100644 --- a/src/mainboard/google/poppy/variants/nocturne/include/variant/acpi/dptf.asl +++ b/src/mainboard/google/poppy/variants/nocturne/include/variant/acpi/dptf.asl @@ -30,7 +30,7 @@ #define DPTF_TSR2_SENSOR_ID 3 #define DPTF_TSR2_SENSOR_NAME "DRAM" #define DPTF_TSR2_PASSIVE 45 -#define DPTF_TSR2_CRITICAL 48 +#define DPTF_TSR2_CRITICAL 55 #define DPTF_TSR3_SENSOR_ID 4 #define DPTF_TSR3_SENSOR_NAME "eMMC" @@ -56,7 +56,7 @@ Package () { \_SB.PCI0.B0D4, \_SB.DPTF.TSR0, 100, 600, 0, 0, 0, 0 }, /* CPU Throttle Effect on DRAM (TSR2) */ - Package () { \_SB.PCI0.B0D4, \_SB.DPTF.TSR2, 100, 600, 0, 0, 0, 0 }, + Package () { \_SB.PCI0.B0D4, \_SB.DPTF.TSR2, 100, 50, 0, 0, 0, 0 }, /* CPU Throttle Effect on eMMC (TSR3) */ Package () { \_SB.PCI0.B0D4, \_SB.DPTF.TSR3, 100, 600, 0, 0, 0, 0 }, @@ -66,7 +66,7 @@ Package () { \_SB.DPTF.TCHG, \_SB.DPTF.TSR1, 100, 600, 0, 0, 0, 0 }, /* Charger Throttle Effect on DRAM (TSR2) */ - Package () { \_SB.DPTF.TCHG, \_SB.DPTF.TSR2, 100, 600, 0, 0, 0, 0 }, + Package () { \_SB.DPTF.TCHG, \_SB.DPTF.TSR2, 200, 50, 0, 0, 0, 0 }, #endif }) -- To view, visit https://review.coreboot.org/28738 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Idf7efa76b2c6085cf97aa9f65c6ce066e8cff99a Gerrit-Change-Number: 28738 Gerrit-PatchSet: 1 Gerrit-Owner: Puthikorn Voravootivat <puthik(a)chromium.org>

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Change in coreboot[master]: src/vendorcode/amd/pi/00670F00/Lib: Remove folder
by Richard Spiegel (Code Review) 25 Sep '18

25 Sep '18

Richard Spiegel has posted comments on this change. ( https://review.coreboot.org/28737 ) Change subject: src/vendorcode/amd/pi/00670F00/Lib: Remove folder ...................................................................... Patch Set 1: (1 comment) https://review.coreboot.org/#/c/28737/1//COMMIT_MSG Commit Message: https://review.coreboot.org/#/c/28737/1//COMMIT_MSG@7 PS1, Line 7: src/ remove -- To view, visit https://review.coreboot.org/28737 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I3530857b872d0cb5ed2e3f3a294cc50b45ff6969 Gerrit-Change-Number: 28737 Gerrit-PatchSet: 1 Gerrit-Owner: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Comment-Date: Tue, 25 Sep 2018 16:58:41 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

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coreboot-gerrit September 2018