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Change in coreboot[master]: Documentation: Add make rule for sphinx-autobuild
by Tom Hiller (Code Review) 19 Aug '18

19 Aug '18

Tom Hiller has posted comments on this change. ( https://review.coreboot.org/28210 ) Change subject: Documentation: Add make rule for sphinx-autobuild ...................................................................... Patch Set 1: This change is ready for review. -- To view, visit https://review.coreboot.org/28210 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I9eb3217e758c2c882c759fa7ae75a39aaf1a0358 Gerrit-Change-Number: 28210 Gerrit-PatchSet: 1 Gerrit-Owner: Tom Hiller <thrilleratplay(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Tom Hiller <thrilleratplay(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 19 Aug 2018 00:40:03 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: util: Fix typos
by Elyes HAOUAS (Code Review) 18 Aug '18

18 Aug '18

Elyes HAOUAS has uploaded a new patch set (#2). ( https://review.coreboot.org/28208 ) Change subject: util: Fix typos ...................................................................... util: Fix typos Change-Id: I6967a106ce1286d633ddeeb041f582e65f9ea78c Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M util/cbfstool/cbfs_image.c M util/cbfstool/common.c M util/cbfstool/common.h M util/cbfstool/elfheaders.c M util/cbfstool/elfparsing.h M util/cbfstool/linux.h M util/cbfstool/lz4/lib/lz4frame.c M util/cbfstool/lz4/lib/xxhash.c M util/cbfstool/lzma/C/LzmaEnc.h M util/cbfstool/rmodule.h M util/ifdtool/ifdtool.c M util/ipqheader/mbn_tools.py M util/kconfig/conf.c M util/kconfig/confdata.c M util/kconfig/gconf.c M util/kconfig/kxgettext.c M util/kconfig/lkc_proto.h M util/kconfig/mconf.c M util/kconfig/nconf.c M util/kconfig/qconf.cc M util/kconfig/symbol.c M util/msrtool/intel_atom.c M util/msrtool/intel_core2_later.c M util/msrtool/intel_nehalem.c M util/nvramtool/coreboot_tables.h M util/romcc/romcc.c M util/romcc/tests/linux_test2.c M util/romcc/tests/raminit_test.c M util/romcc/tests/raminit_test1.c M util/romcc/tests/raminit_test2.c M util/romcc/tests/simple_test30.c M util/scripts/dts-to-fmd.sh M util/superiotool/ite.c 33 files changed, 262 insertions(+), 262 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/28208/2 -- To view, visit https://review.coreboot.org/28208 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I6967a106ce1286d633ddeeb041f582e65f9ea78c Gerrit-Change-Number: 28208 Gerrit-PatchSet: 2 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr>

1 0

Change in coreboot[master]: Fix typos
by Elyes HAOUAS (Code Review) 18 Aug '18

18 Aug '18

Elyes HAOUAS has uploaded this change for review. ( https://review.coreboot.org/28208 Change subject: Fix typos ...................................................................... Fix typos Change-Id: I6967a106ce1286d633ddeeb041f582e65f9ea78c Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M util/cbfstool/cbfs_image.c M util/cbfstool/common.c M util/cbfstool/common.h M util/cbfstool/elfheaders.c M util/cbfstool/elfparsing.h M util/cbfstool/linux.h M util/cbfstool/lz4/lib/lz4frame.c M util/cbfstool/lz4/lib/xxhash.c M util/cbfstool/lzma/C/LzmaEnc.h M util/cbfstool/rmodule.h M util/ifdtool/ifdtool.c M util/ipqheader/mbn_tools.py M util/kconfig/conf.c M util/kconfig/confdata.c M util/kconfig/gconf.c M util/kconfig/kxgettext.c M util/kconfig/lkc_proto.h M util/kconfig/mconf.c M util/kconfig/nconf.c M util/kconfig/qconf.cc M util/kconfig/symbol.c M util/msrtool/intel_atom.c M util/msrtool/intel_core2_later.c M util/msrtool/intel_nehalem.c M util/nvramtool/coreboot_tables.h M util/romcc/romcc.c M util/romcc/tests/linux_test2.c M util/romcc/tests/raminit_test.c M util/romcc/tests/raminit_test1.c M util/romcc/tests/raminit_test2.c M util/romcc/tests/simple_test30.c M util/scripts/dts-to-fmd.sh M util/superiotool/ite.c 33 files changed, 262 insertions(+), 262 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/08/28208/1 diff --git a/util/cbfstool/cbfs_image.c b/util/cbfstool/cbfs_image.c index 4b6bda9..963c892 100644 --- a/util/cbfstool/cbfs_image.c +++ b/util/cbfstool/cbfs_image.c @@ -685,7 +685,7 @@ len = content_offset - addr - header_size; memcpy(entry, header, header_size); if (len != 0) { - /* the header moved backwards a bit to accomodate cbfs_file + /* the header moved backwards a bit to accommodate cbfs_file * alignment requirements, so patch up ->offset to still point * to file data. */ @@ -1867,9 +1867,9 @@ * If NULL, we have to create the first one. */ if (attr == NULL) { /* New attributes start where the header ends. - * header->offset is later set to accomodate the + * header->offset is later set to accommodate the * additional structure. - * No endianess translation necessary here, because both + * No endianness translation necessary here, because both * fields are encoded the same way. */ header->attributes_offset = header->offset; attr = (struct cbfs_file_attribute *) diff --git a/util/cbfstool/common.c b/util/cbfstool/common.c index 14ccaa9..c1725dc 100644 --- a/util/cbfstool/common.c +++ b/util/cbfstool/common.c @@ -29,7 +29,7 @@ /* Utilities */ int verbose = 0; -/* Small, OS/libc independent runtime check for endianess */ +/* Small, OS/libc independent runtime check for endianness */ int is_big_endian(void) { static const uint32_t inttest = 0x12345678; diff --git a/util/cbfstool/common.h b/util/cbfstool/common.h index baefc1c..f152104 100644 --- a/util/cbfstool/common.h +++ b/util/cbfstool/common.h @@ -25,7 +25,7 @@ #include <commonlib/helpers.h> #include <console/console.h> -/* Endianess */ +/* Endianness */ #include "swab.h" #define IS_TOP_ALIGNED_ADDRESS(x) ((uint32_t)(x) > 0x80000000) diff --git a/util/cbfstool/elfheaders.c b/util/cbfstool/elfheaders.c index 3622663..9d02c30 100644 --- a/util/cbfstool/elfheaders.c +++ b/util/cbfstool/elfheaders.c @@ -100,7 +100,7 @@ * accurate but it is actually good enough in practice. It allows the * header transformation code to ignore the possibility of underrun. * - * We also must accomodate different ELF files, and hence formats, + * We also must accommodate different ELF files, and hence formats, * in the same cbfs invocation. We might load a 64-bit payload * on a 32-bit machine; we might even have a mixed armv7/armv8 * SOC or even a system with an x86/ARM! diff --git a/util/cbfstool/elfparsing.h b/util/cbfstool/elfparsing.h index 1c6bf5e..8b08c13 100644 --- a/util/cbfstool/elfparsing.h +++ b/util/cbfstool/elfparsing.h @@ -84,7 +84,7 @@ void elf_init_eheader(Elf64_Ehdr *ehdr, int machine, int nbits, int endian); /* - * Initialize a new ELF writer. Deafult machine type, endianness, etc is + * Initialize a new ELF writer. Default machine type, endianness, etc is * copied from the passed in Elf64_Ehdr. Returns NULL on failure, valid * pointer on success. */ diff --git a/util/cbfstool/linux.h b/util/cbfstool/linux.h index c2d9079..4bba6f0 100644 --- a/util/cbfstool/linux.h +++ b/util/cbfstool/linux.h @@ -91,7 +91,7 @@ u32 init_size; /* 0x260 */ } __packed; -/* Paramters passed to 32-bit part of Linux +/* Parameters passed to 32-bit part of Linux * This is another view of the structure above.. */ struct linux_params { u8 orig_x; /* 0x00 */ diff --git a/util/cbfstool/lz4/lib/lz4frame.c b/util/cbfstool/lz4/lib/lz4frame.c index f984b27..aef508d 100644 --- a/util/cbfstool/lz4/lib/lz4frame.c +++ b/util/cbfstool/lz4/lib/lz4frame.c @@ -184,7 +184,7 @@ } -/* unoptimized version; solves endianess & alignment issues */ +/* unoptimized version; solves endianness & alignment issues */ static U32 LZ4F_readLE32 (const BYTE* srcPtr) { U32 value32 = srcPtr[0]; diff --git a/util/cbfstool/lz4/lib/xxhash.c b/util/cbfstool/lz4/lib/xxhash.c index ed9f8ed..0f89626 100644 --- a/util/cbfstool/lz4/lib/xxhash.c +++ b/util/cbfstool/lz4/lib/xxhash.c @@ -65,7 +65,7 @@ /* #define XXH_ACCEPT_NULL_INPUT_POINTER 1 */ /* XXH_FORCE_NATIVE_FORMAT : - * By default, xxHash library provides endian-independant Hash values, based on little-endian convention. + * By default, xxHash library provides endian-independent Hash values, based on little-endian convention. * Results are therefore identical for little-endian and big-endian CPU. * This comes at a performance cost for big-endian CPU, since some swapping is required to emulate little-endian format. * Should endian-independance be of no importance for your application, you may set the #define below to 1, @@ -219,7 +219,7 @@ /*************************************** * Architecture Macros ***************************************/ -typedef enum { XXH_bigEndian=0, XXH_littleEndian=1 } XXH_endianess; +typedef enum { XXH_bigEndian=0, XXH_littleEndian=1 } XXH_endianness; /* XXH_CPU_LITTLE_ENDIAN can be defined externally, for example one the compiler command line */ #ifndef XXH_CPU_LITTLE_ENDIAN @@ -233,7 +233,7 @@ *****************************/ typedef enum { XXH_aligned, XXH_unaligned } XXH_alignment; -FORCE_INLINE U32 XXH_readLE32_align(const void* ptr, XXH_endianess endian, XXH_alignment align) +FORCE_INLINE U32 XXH_readLE32_align(const void* ptr, XXH_endianness endian, XXH_alignment align) { if (align==XXH_unaligned) return endian==XXH_littleEndian ? XXH_read32(ptr) : XXH_swap32(XXH_read32(ptr)); @@ -241,12 +241,12 @@ return endian==XXH_littleEndian ? *(const U32*)ptr : XXH_swap32(*(const U32*)ptr); } -FORCE_INLINE U32 XXH_readLE32(const void* ptr, XXH_endianess endian) +FORCE_INLINE U32 XXH_readLE32(const void* ptr, XXH_endianness endian) { return XXH_readLE32_align(ptr, endian, XXH_unaligned); } -FORCE_INLINE U64 XXH_readLE64_align(const void* ptr, XXH_endianess endian, XXH_alignment align) +FORCE_INLINE U64 XXH_readLE64_align(const void* ptr, XXH_endianness endian, XXH_alignment align) { if (align==XXH_unaligned) return endian==XXH_littleEndian ? XXH_read64(ptr) : XXH_swap64(XXH_read64(ptr)); @@ -254,7 +254,7 @@ return endian==XXH_littleEndian ? *(const U64*)ptr : XXH_swap64(*(const U64*)ptr); } -FORCE_INLINE U64 XXH_readLE64(const void* ptr, XXH_endianess endian) +FORCE_INLINE U64 XXH_readLE64(const void* ptr, XXH_endianness endian) { return XXH_readLE64_align(ptr, endian, XXH_unaligned); } @@ -285,7 +285,7 @@ /***************************** * Simple Hash Functions *****************************/ -FORCE_INLINE U32 XXH32_endian_align(const void* input, size_t len, U32 seed, XXH_endianess endian, XXH_alignment align) +FORCE_INLINE U32 XXH32_endian_align(const void* input, size_t len, U32 seed, XXH_endianness endian, XXH_alignment align) { const BYTE* p = (const BYTE*)input; const BYTE* bEnd = p + len; @@ -371,7 +371,7 @@ XXH32_update(&state, input, len); return XXH32_digest(&state); #else - XXH_endianess endian_detected = (XXH_endianess)XXH_CPU_LITTLE_ENDIAN; + XXH_endianness endian_detected = (XXH_endianness)XXH_CPU_LITTLE_ENDIAN; # if !defined(XXH_USELESS_ALIGN_BRANCH) if ((((size_t)input) & 3) == 0) /* Input is 4-bytes aligned, leverage the speed benefit */ @@ -390,7 +390,7 @@ #endif } -FORCE_INLINE U64 XXH64_endian_align(const void* input, size_t len, U64 seed, XXH_endianess endian, XXH_alignment align) +FORCE_INLINE U64 XXH64_endian_align(const void* input, size_t len, U64 seed, XXH_endianness endian, XXH_alignment align) { const BYTE* p = (const BYTE*)input; const BYTE* bEnd = p + len; @@ -511,7 +511,7 @@ XXH64_update(&state, input, len); return XXH64_digest(&state); #else - XXH_endianess endian_detected = (XXH_endianess)XXH_CPU_LITTLE_ENDIAN; + XXH_endianness endian_detected = (XXH_endianness)XXH_CPU_LITTLE_ENDIAN; # if !defined(XXH_USELESS_ALIGN_BRANCH) if ((((size_t)input) & 7)==0) /* Input is aligned, let's leverage the speed advantage */ @@ -612,7 +612,7 @@ } -FORCE_INLINE XXH_errorcode XXH32_update_endian (XXH32_state_t* state_in, const void* input, size_t len, XXH_endianess endian) +FORCE_INLINE XXH_errorcode XXH32_update_endian (XXH32_state_t* state_in, const void* input, size_t len, XXH_endianness endian) { XXH_istate32_t* state = (XXH_istate32_t *) state_in; const BYTE* p = (const BYTE*)input; @@ -703,7 +703,7 @@ XXH_errorcode XXH32_update (XXH32_state_t* state_in, const void* input, size_t len) { - XXH_endianess endian_detected = (XXH_endianess)XXH_CPU_LITTLE_ENDIAN; + XXH_endianness endian_detected = (XXH_endianness)XXH_CPU_LITTLE_ENDIAN; if ((endian_detected==XXH_littleEndian) || XXH_FORCE_NATIVE_FORMAT) return XXH32_update_endian(state_in, input, len, XXH_littleEndian); @@ -713,7 +713,7 @@ -FORCE_INLINE U32 XXH32_digest_endian (const XXH32_state_t* state_in, XXH_endianess endian) +FORCE_INLINE U32 XXH32_digest_endian (const XXH32_state_t* state_in, XXH_endianness endian) { const XXH_istate32_t* state = (const XXH_istate32_t*) state_in; const BYTE * p = (const BYTE*)state->mem32; @@ -757,7 +757,7 @@ unsigned int XXH32_digest (const XXH32_state_t* state_in) { - XXH_endianess endian_detected = (XXH_endianess)XXH_CPU_LITTLE_ENDIAN; + XXH_endianness endian_detected = (XXH_endianness)XXH_CPU_LITTLE_ENDIAN; if ((endian_detected==XXH_littleEndian) || XXH_FORCE_NATIVE_FORMAT) return XXH32_digest_endian(state_in, XXH_littleEndian); @@ -766,7 +766,7 @@ } -FORCE_INLINE XXH_errorcode XXH64_update_endian (XXH64_state_t* state_in, const void* input, size_t len, XXH_endianess endian) +FORCE_INLINE XXH_errorcode XXH64_update_endian (XXH64_state_t* state_in, const void* input, size_t len, XXH_endianness endian) { XXH_istate64_t * state = (XXH_istate64_t *) state_in; const BYTE* p = (const BYTE*)input; @@ -857,7 +857,7 @@ XXH_errorcode XXH64_update (XXH64_state_t* state_in, const void* input, size_t len) { - XXH_endianess endian_detected = (XXH_endianess)XXH_CPU_LITTLE_ENDIAN; + XXH_endianness endian_detected = (XXH_endianness)XXH_CPU_LITTLE_ENDIAN; if ((endian_detected==XXH_littleEndian) || XXH_FORCE_NATIVE_FORMAT) return XXH64_update_endian(state_in, input, len, XXH_littleEndian); @@ -867,7 +867,7 @@ -FORCE_INLINE U64 XXH64_digest_endian (const XXH64_state_t* state_in, XXH_endianess endian) +FORCE_INLINE U64 XXH64_digest_endian (const XXH64_state_t* state_in, XXH_endianness endian) { const XXH_istate64_t * state = (const XXH_istate64_t *) state_in; const BYTE * p = (const BYTE*)state->mem64; @@ -951,7 +951,7 @@ unsigned long long XXH64_digest (const XXH64_state_t* state_in) { - XXH_endianess endian_detected = (XXH_endianess)XXH_CPU_LITTLE_ENDIAN; + XXH_endianness endian_detected = (XXH_endianness)XXH_CPU_LITTLE_ENDIAN; if ((endian_detected==XXH_littleEndian) || XXH_FORCE_NATIVE_FORMAT) return XXH64_digest_endian(state_in, XXH_littleEndian); diff --git a/util/cbfstool/lzma/C/LzmaEnc.h b/util/cbfstool/lzma/C/LzmaEnc.h index e62bdb3..c57c320 100644 --- a/util/cbfstool/lzma/C/LzmaEnc.h +++ b/util/cbfstool/lzma/C/LzmaEnc.h @@ -37,7 +37,7 @@ Returns: SZ_OK - OK SZ_ERROR_MEM - Memory allocation error - SZ_ERROR_PARAM - Incorrect paramater in props + SZ_ERROR_PARAM - Incorrect parameter in props SZ_ERROR_WRITE - Write callback error. SZ_ERROR_PROGRESS - some break from progress callback SZ_ERROR_THREAD - errors in multithreading functions (only for Mt version) @@ -60,7 +60,7 @@ Return code: SZ_OK - OK SZ_ERROR_MEM - Memory allocation error - SZ_ERROR_PARAM - Incorrect paramater + SZ_ERROR_PARAM - Incorrect parameter SZ_ERROR_OUTPUT_EOF - output buffer overflow SZ_ERROR_THREAD - errors in multithreading functions (only for Mt version) */ diff --git a/util/cbfstool/rmodule.h b/util/cbfstool/rmodule.h index 4385100..192928a 100644 --- a/util/cbfstool/rmodule.h +++ b/util/cbfstool/rmodule.h @@ -36,7 +36,7 @@ /* endian conversion ops */ struct xdr *xdr; - /* Parsed ELF sturcture. */ + /* Parsed ELF structure. */ struct parsed_elf pelf; /* Program segment. */ Elf64_Phdr *phdr; diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c index eb5dbc3..671c7d5 100644 --- a/util/ifdtool/ifdtool.c +++ b/util/ifdtool/ifdtool.c @@ -1144,7 +1144,7 @@ * Determine if two memory regions overlap. * * @param r1, r2 Memory regions to compare. - * @return 0 if the two regions are seperate + * @return 0 if the two regions are separate * @return 1 if the two regions overlap */ static int regions_collide(const region_t *r1, const region_t *r2) diff --git a/util/ipqheader/mbn_tools.py b/util/ipqheader/mbn_tools.py index bc2cdd2..c4d26c1 100755 --- a/util/ipqheader/mbn_tools.py +++ b/util/ipqheader/mbn_tools.py @@ -1165,7 +1165,7 @@ bytes_to_pad = ELF_BLOCK_ALIGN - pad_hash_segment hash_seg_end = hash_tbl_end_addr + bytes_to_pad - # Check if a shifting is required to accomodate for the hash segment. + # Check if a shifting is required to accommodate for the hash segment. # Get the minimum offset by going through the program headers. # Note that the program headers in the input file do not contain # the dummy program header for ELF + Program header, and the diff --git a/util/kconfig/conf.c b/util/kconfig/conf.c index 7aae1c7..1e704a6 100644 --- a/util/kconfig/conf.c +++ b/util/kconfig/conf.c @@ -93,7 +93,7 @@ line[0] = '\n'; line[1] = 0; - if (!sym_is_changable(sym)) { + if (!sym_is_changeable(sym)) { printf("%s\n", def); line[0] = '\n'; line[1] = 0; @@ -242,7 +242,7 @@ sym = menu->sym; is_new = !sym_has_value(sym); - if (sym_is_changable(sym)) { + if (sym_is_changeable(sym)) { conf_sym(menu); sym_calc_value(sym); switch (sym_get_tristate_value(sym)) { @@ -429,7 +429,7 @@ sym = menu->sym; if (sym && !sym_has_value(sym)) { - if (sym_is_changable(sym) || + if (sym_is_changeable(sym) || (sym_is_choice(sym) && sym_get_tristate_value(sym) == yes)) { if (input_mode == listnewconfig) { if (sym->name && !sym_is_choice_value(sym)) { diff --git a/util/kconfig/confdata.c b/util/kconfig/confdata.c index fc4a07a..a9051fa 100644 --- a/util/kconfig/confdata.c +++ b/util/kconfig/confdata.c @@ -718,7 +718,7 @@ goto next_menu; sym->flags &= ~SYMBOL_WRITE; /* If we cannot change the symbol - skip */ - if (!sym_is_changable(sym)) + if (!sym_is_changeable(sym)) goto next_menu; /* If symbol equals to default value - skip */ if (strcmp(sym_get_string_value(sym), sym_get_string_default(sym)) == 0) diff --git a/util/kconfig/gconf.c b/util/kconfig/gconf.c index faa1c59..f0291c4 100644 --- a/util/kconfig/gconf.c +++ b/util/kconfig/gconf.c @@ -40,7 +40,7 @@ static gboolean show_name = TRUE; static gboolean show_range = TRUE; static gboolean show_value = TRUE; -static gboolean resizeable = FALSE; +static gboolean resizable = FALSE; static int opt_mode = OPT_NORMAL; GtkWidget *main_wnd = NULL; @@ -375,7 +375,7 @@ column = gtk_tree_view_get_column(view, COL_VALUE); gtk_tree_view_column_set_visible(column, show_value); - if (resizeable) { + if (resizable) { for (i = 0; i < COL_VALUE; i++) { column = gtk_tree_view_get_column(view, i); gtk_tree_view_column_set_resizable(column, TRUE); diff --git a/util/kconfig/kxgettext.c b/util/kconfig/kxgettext.c index 2858738..907eae8 100644 --- a/util/kconfig/kxgettext.c +++ b/util/kconfig/kxgettext.c @@ -117,7 +117,7 @@ goto out; } -static struct message *mesage__find(const char *msg) +static struct message *message__find(const char *msg) { struct message *m = message__list; @@ -152,7 +152,7 @@ int rc = 0; char bf[16384]; char *escaped = escape(msg, bf, sizeof(bf)); - struct message *m = mesage__find(escaped); + struct message *m = message__find(escaped); if (m != NULL) rc = message__add_file_line(m, file, lineno); diff --git a/util/kconfig/lkc_proto.h b/util/kconfig/lkc_proto.h index ecdb965..a6e30c7 100644 --- a/util/kconfig/lkc_proto.h +++ b/util/kconfig/lkc_proto.h @@ -45,7 +45,7 @@ P(sym_string_valid,bool,(struct symbol *sym, const char *newval)); P(sym_string_within_range,bool,(struct symbol *sym, const char *str)); P(sym_set_string_value,bool,(struct symbol *sym, const char *newval)); -P(sym_is_changable,bool,(struct symbol *sym)); +P(sym_is_changeable,bool,(struct symbol *sym)); P(sym_get_choice_prop,struct property *,(struct symbol *sym)); P(sym_get_default_prop,struct property *,(struct symbol *sym)); P(sym_get_string_value,const char *,(struct symbol *sym)); diff --git a/util/kconfig/mconf.c b/util/kconfig/mconf.c index 7e5dc76..81eebba 100644 --- a/util/kconfig/mconf.c +++ b/util/kconfig/mconf.c @@ -539,7 +539,7 @@ } val = sym_get_tristate_value(sym); - if (sym_is_changable(sym)) { + if (sym_is_changeable(sym)) { switch (type) { case S_BOOLEAN: item_make("[%c]", val == no ? ' ' : '*'); @@ -590,7 +590,7 @@ } else { switch (type) { case S_BOOLEAN: - if (sym_is_changable(sym)) + if (sym_is_changeable(sym)) item_make("[%c]", val == no ? ' ' : '*'); else item_make("-%c-", val == no ? ' ' : '*'); @@ -603,7 +603,7 @@ case mod: ch = 'M'; break; default: ch = ' '; break; } - if (sym_is_changable(sym)) { + if (sym_is_changeable(sym)) { if (sym->rev_dep.tri == mod) item_make("{%c}", ch); else @@ -620,7 +620,7 @@ if (tmp < 0) tmp = 0; item_add_str("%*c%s%s", tmp, ' ', _(menu_get_prompt(menu)), - (sym_has_value(sym) || !sym_is_changable(sym)) ? + (sym_has_value(sym) || !sym_is_changeable(sym)) ? "" : _(" (NEW)")); item_set_tag('s'); item_set_data(menu); @@ -628,7 +628,7 @@ } } item_add_str("%*c%s%s", indent + 1, ' ', _(menu_get_prompt(menu)), - (sym_has_value(sym) || !sym_is_changable(sym)) ? + (sym_has_value(sym) || !sym_is_changeable(sym)) ? "" : _(" (NEW)")); if (menu->prompt->type == P_MENU) { item_add_str(" %s", menu_is_empty(menu) ? "----" : "--->"); diff --git a/util/kconfig/nconf.c b/util/kconfig/nconf.c index 905dcd1..35c397f 100644 --- a/util/kconfig/nconf.c +++ b/util/kconfig/nconf.c @@ -814,7 +814,7 @@ } val = sym_get_tristate_value(sym); - if (sym_is_changable(sym)) { + if (sym_is_changeable(sym)) { switch (type) { case S_BOOLEAN: item_make(menu, 't', "[%c]", @@ -868,7 +868,7 @@ } else { switch (type) { case S_BOOLEAN: - if (sym_is_changable(sym)) + if (sym_is_changeable(sym)) item_make(menu, 't', "[%c]", val == no ? ' ' : '*'); else @@ -887,7 +887,7 @@ ch = ' '; break; } - if (sym_is_changable(sym)) { + if (sym_is_changeable(sym)) { if (sym->rev_dep.tri == mod) item_make(menu, 't', "{%c}", ch); @@ -907,14 +907,14 @@ item_add_str("%*c%s%s", tmp, ' ', _(menu_get_prompt(menu)), (sym_has_value(sym) || - !sym_is_changable(sym)) ? "" : + !sym_is_changeable(sym)) ? "" : _(" (NEW)")); goto conf_childs; } } item_add_str("%*c%s%s", indent + 1, ' ', _(menu_get_prompt(menu)), - (sym_has_value(sym) || !sym_is_changable(sym)) ? + (sym_has_value(sym) || !sym_is_changeable(sym)) ? "" : _(" (NEW)")); if (menu->prompt && menu->prompt->type == P_MENU) { item_add_str(" %s", menu_is_empty(menu) ? "----" : "--->"); diff --git a/util/kconfig/qconf.cc b/util/kconfig/qconf.cc index e787117..972326c 100644 --- a/util/kconfig/qconf.cc +++ b/util/kconfig/qconf.cc @@ -155,7 +155,7 @@ case S_TRISTATE: char ch; - if (!sym_is_changable(sym) && list->optMode == normalOpt) { + if (!sym_is_changeable(sym) && list->optMode == normalOpt) { setPixmap(promptColIdx, QIcon()); setText(noColIdx, QString::null); setText(modColIdx, QString::null); diff --git a/util/kconfig/symbol.c b/util/kconfig/symbol.c index af49439..b969616 100644 --- a/util/kconfig/symbol.c +++ b/util/kconfig/symbol.c @@ -792,7 +792,7 @@ return (const char *)sym->curr.val; } -bool sym_is_changable(struct symbol *sym) +bool sym_is_changeable(struct symbol *sym) { return sym->visible > sym->rev_dep.tri; } diff --git a/util/msrtool/intel_atom.c b/util/msrtool/intel_atom.c index f2df5ae..489e0a0 100644 --- a/util/msrtool/intel_atom.c +++ b/util/msrtool/intel_atom.c @@ -278,7 +278,7 @@ }}, { 1, 1, "VMX inside of SMX operation", "R/WL", PRESENT_BIN, { /* This bit enables a system executive to use - * VMX in conjuction with SMX to support Intel + * VMX in conjunction with SMX to support Intel * Trusted Execution Technology. */ { MSR1(0), "VMX inside of SMX operation disabled" }, @@ -797,9 +797,9 @@ /* if CPUID.0AH EAX[7:0] > 2 */ { 10, 1, "AnyThread 2", "R/W", PRESENT_BIN, { { MSR1(0), "Counter only increments the associated event \ - conditions occuring in the logical processor which programmed the MSR" }, + conditions occurring in the logical processor which programmed the MSR" }, { MSR1(1), "Counting the associated event conditions \ - occuring across all logical processors sharing a processor core" }, + occurring across all logical processors sharing a processor core" }, { BITVAL_EOT } }}, { 9, 1, "EN2_Usr", "R/W", PRESENT_BIN, { @@ -820,9 +820,9 @@ /* if CPUID.0AH: EAX[7:0] > 2 */ { 6, 1, "AnyThread 1", "R/W", PRESENT_BIN, { { MSR1(0), "Counter only increments the associated event \ - conditions occuring in the logical processor which programmed the MSR" }, + conditions occurring in the logical processor which programmed the MSR" }, { MSR1(1), "Counting the associated event conditions \ - occuring across all logical processors sharing a processor core" }, + occurring across all logical processors sharing a processor core" }, { BITVAL_EOT } }}, { 5, 1, "EN1_Usr", "R/W", PRESENT_BIN, { @@ -843,9 +843,9 @@ /* if CPUID.0AH: EAX[7:0] > 2 */ { 2, 1, "AnyThread 0", "R/W", PRESENT_BIN, { { MSR1(0), "Counter only increments the associated event \ - conditions occuring in the logical processor which programmed the MSR" }, + conditions occurring in the logical processor which programmed the MSR" }, { MSR1(1), "Counting the associated event conditions \ - occuring across all logical processors sharing a processor core" }, + occurring across all logical processors sharing a processor core" }, { BITVAL_EOT } }}, { 1, 1, "EN0_Usr", "R/W", PRESENT_BIN, { diff --git a/util/msrtool/intel_core2_later.c b/util/msrtool/intel_core2_later.c index 4bb0097..95e8e91 100644 --- a/util/msrtool/intel_core2_later.c +++ b/util/msrtool/intel_core2_later.c @@ -232,7 +232,7 @@ }}, { 1, 1, "VMX inside of SMX operation", "R/WL", PRESENT_BIN, { /* This bit enables a system executive to use - * VMX in conjuction with SMX to support Intel + * VMX in conjunction with SMX to support Intel * Trusted Execution Technology. */ { MSR1(0), "VMX inside of SMX operation disabled" }, @@ -821,9 +821,9 @@ /* if CPUID.0AH EAX[7:0] > 2 */ { 10, 1, "AnyThread 2", "R/W", PRESENT_BIN, { { MSR1(0), "Counter only increments the associated event \ - conditions occuring in the logical processor which programmed the MSR" }, + conditions occurring in the logical processor which programmed the MSR" }, { MSR1(1), "Counting the associated event conditions \ - occuring across all logical processors sharing a processor core" }, + occurring across all logical processors sharing a processor core" }, { BITVAL_EOT } }}, { 9, 1, "EN2_Usr", "R/W", PRESENT_BIN, { @@ -844,9 +844,9 @@ /* if CPUID.0AH: EAX[7:0] > 2 */ { 6, 1, "AnyThread 1", "R/W", PRESENT_BIN, { { MSR1(0), "Counter only increments the associated event \ - conditions occuring in the logical processor which programmed the MSR" }, + conditions occurring in the logical processor which programmed the MSR" }, { MSR1(1), "Counting the associated event conditions \ - occuring across all logical processors sharing a processor core" }, + occurring across all logical processors sharing a processor core" }, { BITVAL_EOT } }}, { 5, 1, "EN1_Usr", "R/W", PRESENT_BIN, { @@ -867,9 +867,9 @@ /* if CPUID.0AH: EAX[7:0] > 2 */ { 2, 1, "AnyThread 0", "R/W", PRESENT_BIN, { { MSR1(0), "Counter only increments the associated event \ - conditions occuring in the logical processor which programmed the MSR" }, + conditions occurring in the logical processor which programmed the MSR" }, { MSR1(1), "Counting the associated event conditions \ - occuring across all logical processors sharing a processor core" }, + occurring across all logical processors sharing a processor core" }, { BITVAL_EOT } }}, { 1, 1, "EN0_Usr", "R/W", PRESENT_BIN, { diff --git a/util/msrtool/intel_nehalem.c b/util/msrtool/intel_nehalem.c index 11acdd8..726ad0a 100644 --- a/util/msrtool/intel_nehalem.c +++ b/util/msrtool/intel_nehalem.c @@ -307,7 +307,7 @@ }}, { 1, 1, "VMX inside of SMX operation", "R/WL", PRESENT_BIN, { /* This bit enables a system executive to use - * VMX in conjuction with SMX to support Intel + * VMX in conjunction with SMX to support Intel * Trusted Execution Technology. */ { MSR1(0), "VMX inside of SMX operation disabled" }, @@ -1109,7 +1109,7 @@ /* Whole package bit */ { 1, 1, "C1E Enable", "R/W", PRESENT_BIN, { { MSR1(0), "Nothing" }, - { MSR1(1), "CPU switch to the Minimum Enhaced Intel \ + { MSR1(1), "CPU switch to the Minimum Enhanced Intel \ SpeedStep Technology operating point when all \ execution cores enter MWAIT (C1)" }, { BITVAL_EOT } @@ -1373,9 +1373,9 @@ /* if CPUID.0AH EAX[7:0] > 2 */ { 10, 1, "AnyThread 2", "R/W", PRESENT_BIN, { { MSR1(0), "Counter only increments the associated event \ - conditions occuring in the logical processor which programmed the MSR" }, + conditions occurring in the logical processor which programmed the MSR" }, { MSR1(1), "Counting the associated event conditions \ - occuring across all logical processors sharing a processor core" }, + occurring across all logical processors sharing a processor core" }, { BITVAL_EOT } }}, { 9, 1, "EN2_Usr", "R/W", PRESENT_BIN, { @@ -1396,9 +1396,9 @@ /* if CPUID.0AH: EAX[7:0] > 2 */ { 6, 1, "AnyThread 1", "R/W", PRESENT_BIN, { { MSR1(0), "Counter only increments the associated event \ - conditions occuring in the logical processor which programmed the MSR" }, + conditions occurring in the logical processor which programmed the MSR" }, { MSR1(1), "Counting the associated event conditions \ - occuring across all logical processors sharing a processor core" }, + occurring across all logical processors sharing a processor core" }, { BITVAL_EOT } }}, { 5, 1, "EN1_Usr", "R/W", PRESENT_BIN, { @@ -1419,9 +1419,9 @@ /* if CPUID.0AH: EAX[7:0] > 2 */ { 2, 1, "AnyThread 0", "R/W", PRESENT_BIN, { { MSR1(0), "Counter only increments the associated event \ - conditions occuring in the logical processor which programmed the MSR" }, + conditions occurring in the logical processor which programmed the MSR" }, { MSR1(1), "Counting the associated event conditions \ - occuring across all logical processors sharing a processor core" }, + occurring across all logical processors sharing a processor core" }, { BITVAL_EOT } }}, { 1, 1, "EN0_Usr", "R/W", PRESENT_BIN, { diff --git a/util/nvramtool/coreboot_tables.h b/util/nvramtool/coreboot_tables.h index 1bd1e53..361b626 100644 --- a/util/nvramtool/coreboot_tables.h +++ b/util/nvramtool/coreboot_tables.h @@ -15,7 +15,7 @@ /* The coreboot table information is for conveying information * from the firmware to the loaded OS image. Primarily this * is expected to be information that cannot be discovered by - * other means, such as quering the hardware directly. + * other means, such as querying the hardware directly. * * All of the information should be Position Independent Data. * That is it should be safe to relocated any of the information @@ -85,10 +85,10 @@ uint32_t table_entries; }; -/* Every entry in the boot enviroment list will correspond to a boot +/* Every entry in the boot environment list will correspond to a boot * info record. Encoding both type and size. The type is obviously * so you can tell what it is. The size allows you to skip that - * boot enviroment record if you don't know what it easy. This allows + * boot environment record if you don't know what it easy. This allows * forward compatibility with records not yet defined. */ struct lb_record { diff --git a/util/romcc/romcc.c b/util/romcc/romcc.c index ebea26f..307fcf8 100644 --- a/util/romcc/romcc.c +++ b/util/romcc/romcc.c @@ -446,14 +446,14 @@ #define OP_UEXTRACT 34 /* OP_UEXTRACT extracts an unsigned bitfield from a pseudo register - * RHS(0) holds the psuedo register to extract from + * RHS(0) holds the pseudo register to extract from * ->type holds the size of the bitfield. * ->u.bitfield.size holds the size of the bitfield. * ->u.bitfield.offset holds the offset to extract from */ #define OP_SEXTRACT 35 /* OP_SEXTRACT extracts a signed bitfield from a pseudo register - * RHS(0) holds the psuedo register to extract from + * RHS(0) holds the pseudo register to extract from * ->type holds the size of the bitfield. * ->u.bitfield.size holds the size of the bitfield. * ->u.bitfield.offset holds the offset to extract from @@ -495,7 +495,7 @@ #define OP_WRITE 60 /* OP_WRITE moves one pseudo register to another. * MISC(0) holds the destination pseudo register, which must be an OP_DECL. - * RHS(0) holds the psuedo to move. + * RHS(0) holds the pseudo to move. */ #define OP_READ 61 @@ -926,13 +926,13 @@ #define MAX_MISC 3 #define MAX_TARG 1 -struct occurance { +struct occurrence { int count; const char *filename; const char *function; int line; int col; - struct occurance *parent; + struct occurrence *parent; }; struct bitfield { ulong_t size : 8; @@ -967,7 +967,7 @@ #define TRIPLE_FLAG_LOCAL (1 << 26) #define TRIPLE_FLAG_COPY TRIPLE_FLAG_VOLATILE - struct occurance *occurance; + struct occurrence *occurrence; union { ulong_t cval; struct bitfield bitfield; @@ -1081,7 +1081,7 @@ FILE *errout; FILE *dbgout; struct file_state *file; - struct occurance *last_occurance; + struct occurrence *last_occurrence; const char *function; int token_base; struct token token[6]; @@ -1765,9 +1765,9 @@ static void loc(FILE *fp, struct compile_state *state, struct triple *triple) { int col; - if (triple && triple->occurance) { - struct occurance *spot; - for(spot = triple->occurance; spot; spot = spot->parent) { + if (triple && triple->occurrence) { + struct occurrence *spot; + for(spot = triple->occurrence; spot; spot = spot->parent) { fprintf(fp, "%s:%d.%d: ", spot->filename, spot->line, spot->col); } @@ -1944,30 +1944,30 @@ } } -static void put_occurance(struct occurance *occurance) +static void put_occurrence(struct occurrence *occurrence) { - if (occurance) { - occurance->count -= 1; - if (occurance->count <= 0) { - if (occurance->parent) { - put_occurance(occurance->parent); + if (occurrence) { + occurrence->count -= 1; + if (occurrence->count <= 0) { + if (occurrence->parent) { + put_occurrence(occurrence->parent); } - xfree(occurance); + xfree(occurrence); } } } -static void get_occurance(struct occurance *occurance) +static void get_occurrence(struct occurrence *occurrence) { - if (occurance) { - occurance->count += 1; + if (occurrence) { + occurrence->count += 1; } } -static struct occurance *new_occurance(struct compile_state *state) +static struct occurrence *new_occurrence(struct compile_state *state) { - struct occurance *result, *last; + struct occurrence *result, *last; const char *filename; const char *function; int line, col; @@ -1984,7 +1984,7 @@ if (state->function) { function = state->function; } - last = state->last_occurance; + last = state->last_occurrence; if (last && (last->col == col) && (last->line == line) && @@ -1992,28 +1992,28 @@ ((last->filename == filename) || (strcmp(last->filename, filename) == 0))) { - get_occurance(last); + get_occurrence(last); return last; } if (last) { - state->last_occurance = 0; - put_occurance(last); + state->last_occurrence = 0; + put_occurrence(last); } - result = xmalloc(sizeof(*result), "occurance"); + result = xmalloc(sizeof(*result), "occurrence"); result->count = 2; result->filename = filename; result->function = function; result->line = line; result->col = col; result->parent = 0; - state->last_occurance = result; + state->last_occurrence = result; return result; } -static struct occurance *inline_occurance(struct compile_state *state, - struct occurance *base, struct occurance *top) +static struct occurrence *inline_occurrence(struct compile_state *state, + struct occurrence *base, struct occurrence *top) { - struct occurance *result, *last; + struct occurrence *result, *last; if (top->parent) { internal_error(state, 0, "inlining an already inlined function?"); } @@ -2025,36 +2025,36 @@ (base->filename[0] == '\0')) { base = 0; } - /* See if I can reuse the last occurance I had */ - last = state->last_occurance; + /* See if I can reuse the last occurrence I had */ + last = state->last_occurrence; if (last && (last->parent == base) && (last->col == top->col) && (last->line == top->line) && (last->function == top->function) && (last->filename == top->filename)) { - get_occurance(last); + get_occurrence(last); return last; } - /* I can't reuse the last occurance so free it */ + /* I can't reuse the last occurrence so free it */ if (last) { - state->last_occurance = 0; - put_occurance(last); + state->last_occurrence = 0; + put_occurrence(last); } - /* Generate a new occurance structure */ - get_occurance(base); - result = xmalloc(sizeof(*result), "occurance"); + /* Generate a new occurrence structure */ + get_occurrence(base); + result = xmalloc(sizeof(*result), "occurrence"); result->count = 2; result->filename = top->filename; result->function = top->function; result->line = top->line; result->col = top->col; result->parent = base; - state->last_occurance = result; + state->last_occurrence = result; return result; } -static struct occurance dummy_occurance = { +static struct occurrence dummy_occurrence = { .count = 2, .filename = __FILE__, .function = "", @@ -2079,7 +2079,7 @@ .type = &unknown_type, .id = -1, /* An invalid id */ .u = { .cval = 0, }, - .occurance = &dummy_occurance, + .occurrence = &dummy_occurrence, .param = { [0] = 0, [1] = 0, }, }; @@ -2088,13 +2088,13 @@ static struct triple *alloc_triple(struct compile_state *state, int op, struct type *type, int lhs_wanted, int rhs_wanted, - struct occurance *occurance) + struct occurrence *occurrence) { size_t size, extra_count, min_count; int lhs, rhs, misc, targ; struct triple *ret, dummy; dummy.op = op; - dummy.occurance = occurance; + dummy.occurrence = occurrence; valid_op(state, op); lhs = table_ops[op].lhs; rhs = table_ops[op].rhs; @@ -2146,7 +2146,7 @@ ret->type = type; ret->next = ret; ret->prev = ret; - ret->occurance = occurance; + ret->occurrence = occurrence; /* A simple sanity check */ if ((ret->op != op) || (ret->lhs != lhs) || @@ -2156,7 +2156,7 @@ (ret->type != type) || (ret->next != ret) || (ret->prev != ret) || - (ret->occurance != occurance)) { + (ret->occurrence != occurrence)) { internal_error(state, ret, "huh?"); } return ret; @@ -2169,9 +2169,9 @@ src_lhs = src->lhs; src_rhs = src->rhs; src_size = TRIPLE_SIZE(src); - get_occurance(src->occurance); + get_occurrence(src->occurrence); dup = alloc_triple(state, src->op, src->type, src_lhs, src_rhs, - src->occurance); + src->occurrence); memcpy(dup, src, sizeof(*src)); memcpy(dup->param, src->param, src_size * sizeof(src->param[0])); return dup; @@ -2190,19 +2190,19 @@ int op, struct type *type, int lhs, int rhs) { struct triple *ret; - struct occurance *occurance; - occurance = new_occurance(state); - ret = alloc_triple(state, op, type, lhs, rhs, occurance); + struct occurrence *occurrence; + occurrence = new_occurrence(state); + ret = alloc_triple(state, op, type, lhs, rhs, occurrence); return ret; } static struct triple *build_triple(struct compile_state *state, int op, struct type *type, struct triple *left, struct triple *right, - struct occurance *occurance) + struct occurrence *occurrence) { struct triple *ret; size_t count; - ret = alloc_triple(state, op, type, -1, -1, occurance); + ret = alloc_triple(state, op, type, -1, -1, occurrence); count = TRIPLE_SIZE(ret); if (count > 0) { ret->param[0] = left; @@ -2314,8 +2314,8 @@ base = MISC(base, 0); } block = block_of_triple(state, base); - get_occurance(base->occurance); - ret = build_triple(state, op, type, left, right, base->occurance); + get_occurrence(base->occurrence); + ret = build_triple(state, op, type, left, right, base->occurrence); generate_lhs_pieces(state, ret); if (triple_stores_block(state, ret)) { ret->u.block = block; @@ -2352,8 +2352,8 @@ } block = block_of_triple(state, base); - get_occurance(base->occurance); - ret = build_triple(state, op, type, left, right, base->occurance); + get_occurrence(base->occurrence); + ret = build_triple(state, op, type, left, right, base->occurrence); generate_lhs_pieces(state, ret); if (triple_stores_block(state, ret)) { ret->u.block = block; @@ -2385,7 +2385,7 @@ { struct type *piece_type; struct triple *piece; - get_occurance(ins->occurance); + get_occurrence(ins->occurrence); piece_type = reg_type(state, ins->type, index * REG_SIZEOF_REG); if ((piece_type->type & TYPE_MASK) == TYPE_BITFIELD) { @@ -2400,7 +2400,7 @@ fprintf(fp, "\n"); } #endif - piece = alloc_triple(state, OP_PIECE, piece_type, -1, -1, ins->occurance); + piece = alloc_triple(state, OP_PIECE, piece_type, -1, -1, ins->occurrence); piece->u.cval = index; LHS(ins, piece->u.cval) = piece; MISC(piece, 0) = ins; @@ -2447,7 +2447,7 @@ static void name_of(FILE *fp, struct type *type); static void display_triple(FILE *fp, struct triple *ins) { - struct occurance *ptr; + struct occurrence *ptr; const char *reg; char pre, post, vol; pre = post = vol = ' '; @@ -2519,7 +2519,7 @@ fprintf(fp, " ]"); #endif fprintf(fp, " @"); - for(ptr = ins->occurance; ptr; ptr = ptr->parent) { + for(ptr = ins->occurrence; ptr; ptr = ptr->parent) { fprintf(fp, " %s,%s:%d.%d", ptr->function, ptr->filename, @@ -2548,7 +2548,7 @@ orig_count * sizeof(orig->param[0])) != 0) || (memcmp(&orig->u, &new->u, sizeof(orig->u)) != 0)) { - struct occurance *ptr; + struct occurrence *ptr; int i, min_count, indent; fprintf(fp, "(%p %p)", new, orig); if (orig->op == new->op) { @@ -2602,7 +2602,7 @@ #endif fprintf(fp, " @"); - for(ptr = orig->occurance; ptr; ptr = ptr->parent) { + for(ptr = orig->occurrence; ptr; ptr = ptr->parent) { fprintf(fp, " %s,%s:%d.%d", ptr->function, ptr->filename, @@ -2980,7 +2980,7 @@ if (ptr->use) { internal_error(state, ptr, "ptr->use != 0"); } - put_occurance(ptr->occurance); + put_occurrence(ptr->occurrence); memset(ptr, -1, size); xfree(ptr); } @@ -5534,7 +5534,7 @@ break; } case TOK_EOL: - /* Ignore # without a follwing ident */ + /* Ignore # without a following ident */ break; default: { @@ -8145,7 +8145,7 @@ } } -static void propogate_use(struct compile_state *state, +static void propagate_use(struct compile_state *state, struct triple *orig, struct triple *new) { struct triple_set *user, *next; @@ -8158,7 +8158,7 @@ replace_use(state, orig, new, user->member); } if (orig->use) { - internal_error(state, orig, "used after propogate_use"); + internal_error(state, orig, "used after propagate_use"); } } @@ -8786,7 +8786,7 @@ tuple = tmp; } - propogate_use(state, ins, tuple); + propagate_use(state, ins, tuple); release_triple(state, ins); return next; @@ -8805,18 +8805,18 @@ fprintf(fp, "\n"); #endif - get_occurance(ins->occurance); + get_occurrence(ins->occurrence); tuple = alloc_triple(state, OP_TUPLE, ins->type, -1, -1, - ins->occurance); + ins->occurrence); for(i = 0; i < tuple->lhs; i++) { struct type *piece_type; struct triple *unknown; piece_type = reg_type(state, ins->type, i * REG_SIZEOF_REG); - get_occurance(tuple->occurance); + get_occurrence(tuple->occurrence); unknown = alloc_triple(state, OP_UNKNOWNVAL, piece_type, 0, 0, - tuple->occurance); + tuple->occurrence); LHS(tuple, i) = unknown; } return decompose_with_tuple(state, ins, tuple); @@ -8834,9 +8834,9 @@ if (lval->op == OP_PIECE) { return ins->next; } - get_occurance(ins->occurance); + get_occurrence(ins->occurrence); tuple = alloc_triple(state, OP_TUPLE, lval->type, -1, -1, - ins->occurance); + ins->occurrence); if ((tuple->lhs != lval->lhs) && (!triple_is_def(state, lval) || (tuple->lhs != 1))) @@ -8858,9 +8858,9 @@ piece = RHS(bitref, 0); } - get_occurance(tuple->occurance); + get_occurrence(tuple->occurrence); read = alloc_triple(state, OP_READ, piece->type, -1, -1, - tuple->occurance); + tuple->occurrence); RHS(read, 0) = piece; if (bitref) { @@ -8871,9 +8871,9 @@ } else { op = OP_UEXTRACT; } - get_occurance(tuple->occurance); + get_occurrence(tuple->occurrence); extract = alloc_triple(state, op, bitref->type, -1, -1, - tuple->occurance); + tuple->occurrence); RHS(extract, 0) = read; extract->u.bitfield.size = bitref->u.bitfield.size; extract->u.bitfield.offset = bitref->u.bitfield.offset; @@ -8894,9 +8894,9 @@ lval = MISC(ins, 0); val = RHS(ins, 0); - get_occurance(ins->occurance); + get_occurrence(ins->occurrence); tuple = alloc_triple(state, OP_TUPLE, ins->type, -1, -1, - ins->occurance); + ins->occurrence); if ((tuple->lhs != lval->lhs) && (!triple_is_def(state, lval) || tuple->lhs != 1)) @@ -8928,15 +8928,15 @@ piece = RHS(bitref, 0); /* Read the destination register */ - get_occurance(tuple->occurance); + get_occurrence(tuple->occurrence); read = alloc_triple(state, OP_READ, piece->type, -1, -1, - tuple->occurance); + tuple->occurrence); RHS(read, 0) = piece; /* Deposit the new bitfield value */ - get_occurance(tuple->occurance); + get_occurrence(tuple->occurrence); deposit = alloc_triple(state, OP_DEPOSIT, piece->type, -1, -1, - tuple->occurance); + tuple->occurrence); RHS(deposit, 0) = read; RHS(deposit, 1) = pval; deposit->u.bitfield.size = bitref->u.bitfield.size; @@ -8946,9 +8946,9 @@ pval = deposit; } - get_occurance(tuple->occurance); + get_occurrence(tuple->occurrence); write = alloc_triple(state, OP_WRITE, piece->type, -1, -1, - tuple->occurance); + tuple->occurrence); MISC(write, 0) = piece; RHS(write, 0) = pval; LHS(tuple, i) = write; @@ -8957,7 +8957,7 @@ } struct decompose_load_info { - struct occurance *occurance; + struct occurrence *occurrence; struct triple *lval; struct triple *tuple; }; @@ -8970,8 +8970,8 @@ if (reg_offset > info->tuple->lhs) { internal_error(state, info->tuple, "lhs to small?"); } - get_occurance(info->occurance); - load = alloc_triple(state, OP_LOAD, type, -1, -1, info->occurance); + get_occurrence(info->occurrence); + load = alloc_triple(state, OP_LOAD, type, -1, -1, info->occurrence); RHS(load, 0) = mk_addr_expr(state, info->lval, mem_offset); LHS(info->tuple, reg_offset/REG_SIZEOF_REG) = load; } @@ -8985,11 +8985,11 @@ if (!is_compound_type(ins->type)) { return ins->next; } - get_occurance(ins->occurance); + get_occurrence(ins->occurrence); tuple = alloc_triple(state, OP_TUPLE, ins->type, -1, -1, - ins->occurance); + ins->occurrence); - info.occurance = ins->occurance; + info.occurrence = ins->occurrence; info.lval = RHS(ins, 0); info.tuple = tuple; walk_type_fields(state, ins->type, 0, 0, decompose_load_cb, &info); @@ -8999,7 +8999,7 @@ struct decompose_store_info { - struct occurance *occurance; + struct occurrence *occurrence; struct triple *lval; struct triple *val; struct triple *tuple; @@ -9013,8 +9013,8 @@ if (reg_offset > info->tuple->lhs) { internal_error(state, info->tuple, "lhs to small?"); } - get_occurance(info->occurance); - store = alloc_triple(state, OP_STORE, type, -1, -1, info->occurance); + get_occurrence(info->occurrence); + store = alloc_triple(state, OP_STORE, type, -1, -1, info->occurrence); RHS(store, 0) = mk_addr_expr(state, info->lval, mem_offset); RHS(store, 1) = LHS(info->val, reg_offset); LHS(info->tuple, reg_offset/REG_SIZEOF_REG) = store; @@ -9029,11 +9029,11 @@ if (!is_compound_type(ins->type)) { return ins->next; } - get_occurance(ins->occurance); + get_occurrence(ins->occurrence); tuple = alloc_triple(state, OP_TUPLE, ins->type, -1, -1, - ins->occurance); + ins->occurrence); - info.occurance = ins->occurance; + info.occurrence = ins->occurrence; info.lval = RHS(ins, 0); info.val = RHS(ins, 1); info.tuple = tuple; @@ -9063,9 +9063,9 @@ } #endif - get_occurance(ins->occurance); + get_occurrence(ins->occurrence); tuple = alloc_triple(state, OP_TUPLE, type, -1, -1, - ins->occurance); + ins->occurrence); if (((ins->type->type & TYPE_MASK) == TYPE_BITFIELD) && (tuple->lhs != 1)) @@ -9092,9 +9092,9 @@ /* Remember the offset of the bitfield */ if ((type->type & TYPE_MASK) == TYPE_BITFIELD) { - get_occurance(ins->occurance); + get_occurrence(ins->occurrence); piece = build_triple(state, OP_BITREF, type, piece, 0, - ins->occurance); + ins->occurrence); piece->u.bitfield.size = size_of(state, type); piece->u.bitfield.offset = reg_offset % REG_SIZEOF_REG; } @@ -9128,9 +9128,9 @@ } #endif - get_occurance(ins->occurance); + get_occurrence(ins->occurrence); tuple = alloc_triple(state, OP_TUPLE, type, -1, -1, - ins->occurance); + ins->occurrence); for(i = 0; i < tuple->lhs; i++, idx++) { struct triple *piece; @@ -11907,8 +11907,8 @@ ident = eat(state, TOK_IDENT)->ident; if (ident->sym_label && ident->sym_label->def) { ins = ident->sym_label->def; - put_occurance(ins->occurance); - ins->occurance = new_occurance(state); + put_occurrence(ins->occurrence); + ins->occurrence = new_occurrence(state); } else { ins = label(state); @@ -12029,8 +12029,8 @@ dest = label(state); /* Blame the branch on the default statement */ - put_occurance(dbranch->occurance); - dbranch->occurance = new_occurance(state); + put_occurrence(dbranch->occurrence); + dbranch->occurrence = new_occurrence(state); /* Thread the pieces together */ TARG(dbranch, 0) = dest; @@ -13329,7 +13329,7 @@ } i++; if (((param->type & TYPE_MASK) != TYPE_VOID) && !param->field_ident) { - error(state, 0, "No identifier for paramter %d\n", i); + error(state, 0, "No identifier for parameter %d\n", i); } /* Get a list of statements for this function. */ @@ -13694,7 +13694,7 @@ } struct triple *copy_func(struct compile_state *state, struct triple *ofunc, - struct occurance *base_occurance) + struct occurrence *base_occurrence) { struct triple *nfunc; struct triple *nfirst, *ofirst; @@ -13715,16 +13715,16 @@ ofirst = old = RHS(ofunc, 0); do { struct triple *new; - struct occurance *occurance; + struct occurrence *occurrence; int old_lhs, old_rhs; old_lhs = old->lhs; old_rhs = old->rhs; - occurance = inline_occurance(state, base_occurance, old->occurance); + occurrence = inline_occurrence(state, base_occurrence, old->occurrence); if (ofunc->u.cval && (old->op == OP_FCALL)) { MISC(old, 0)->u.cval += 1; } new = alloc_triple(state, old->op, old->type, old_lhs, old_rhs, - occurance); + occurrence); if (!triple_stores_block(state, new)) { memcpy(&new->u, &old->u, sizeof(new->u)); } @@ -13803,7 +13803,7 @@ if (ofunc->op != OP_LIST) { internal_error(state, 0, "improper function"); } - nfunc = copy_func(state, ofunc, fcall->occurance); + nfunc = copy_func(state, ofunc, fcall->occurrence); /* Prepend the parameter reading into the new function list */ ptype = nfunc->type->right; pvals = fcall->rhs; @@ -13842,7 +13842,7 @@ /* Remove the read of the return address */ ins = RHS(nfunc, 0)->prev->prev; if ((ins->op != OP_READ) || (RHS(ins, 0) != fretaddr(state, nfunc))) { - internal_error(state, ins, "Not return addres read?"); + internal_error(state, ins, "Not return address read?"); } release_triple(state, ins); /* Remove the return instruction */ @@ -13884,7 +13884,7 @@ /* Now the result reading code */ if (result) { result = flatten(state, fcall, result); - propogate_use(state, fcall, result); + propagate_use(state, fcall, result); } /* Release the original fcall instruction */ @@ -13971,7 +13971,7 @@ } /* Point everyone at the new variable */ - propogate_use(state, var, new_var); + propagate_use(state, var, new_var); /* Release the original variable */ for(i = 0; i < var->lhs; i++) { @@ -14156,7 +14156,7 @@ ins = ins->next; } while(ins != first); - /* Allocate some memory to temorary hold the id info */ + /* Allocate some memory to temporary hold the id info */ info = xcmalloc(sizeof(*info) * (count +1), "info"); /* Mark the local function */ @@ -14434,7 +14434,7 @@ read_expr(state, deref_index(state, fresult(state, func), 1))); - propogate_use(state, fcall, result); + propagate_use(state, fcall, result); } /* Release the original fcall instruction */ @@ -15501,7 +15501,7 @@ return vertex; } vertex += 1; - /* Renumber the blocks in a convinient fashion */ + /* Renumber the blocks in a convenient fashion */ block->vertex = vertex; sd[vertex].block = block; sd[vertex].sdom = &sd[vertex]; @@ -15524,7 +15524,7 @@ return vertex; } vertex += 1; - /* Renumber the blocks in a convinient fashion */ + /* Renumber the blocks in a convenient fashion */ block->vertex = vertex; sd[vertex].block = block; sd[vertex].sdom = &sd[vertex]; @@ -15743,7 +15743,7 @@ */ /* Theorem 3: * Let w != r and let u be a vertex for which sdom(u) is - * minimum amoung vertices u satisfying sdom(w) -> u -> w. + * minimum among vertices u satisfying sdom(w) -> u -> w. * Then sdom(u) <= sdom(w) and idom(u) = idom(w). */ /* Lemma 5: Let vertices v,w satisfy v -> w. @@ -15765,7 +15765,7 @@ */ /* Corollary 1: * Let w != r and let u be a vertex for which sdom(u) is - * minimum amoung vertices u satisfying sdom(w) -> u -> w. + * minimum among vertices u satisfying sdom(w) -> u -> w. * Then: * { sdom(w) if sdom(w) = sdom(u), * idom(w) = { @@ -15905,7 +15905,7 @@ { struct block_set *user; struct triple *ins; - struct occurance *ptr, *ptr2; + struct occurrence *ptr, *ptr2; const char *filename1, *filename2; int equal_filenames; int i; @@ -15915,11 +15915,11 @@ fprintf(fp, "%3d: %p (%p - %p) @", block->vertex, block, block->first, block->last); ins = block->first; - while(ins != block->last && (ins->occurance->line == 0)) { + while(ins != block->last && (ins->occurrence->line == 0)) { ins = ins->next; } - ptr = ins->occurance; - ptr2 = block->last->occurance; + ptr = ins->occurrence; + ptr2 = block->last->occurrence; filename1 = ptr->filename? ptr->filename : ""; filename2 = ptr2->filename? ptr2->filename : ""; equal_filenames = (strcmp(filename1, filename2) == 0); @@ -16166,10 +16166,10 @@ /* Count how many edges flow into this block */ in_edges = front->users; /* Insert a phi function for this variable */ - get_occurance(var->occurance); + get_occurrence(var->occurrence); phi = alloc_triple( state, OP_PHI, var->type, -1, in_edges, - var->occurance); + var->occurrence); phi->u.block = front; MISC(phi, 0) = var; use_triple(var, phi); @@ -16285,7 +16285,7 @@ if (set->member == oldval) { *ptr = set->next; xfree(set); - /* Only free one occurance from the stack */ + /* Only free one occurrence from the stack */ return; } else { @@ -16389,7 +16389,7 @@ if ((val->op == OP_WRITE) || (val->op == OP_READ)) { internal_error(state, val, "bad value in read"); } - propogate_use(state, ptr, val); + propagate_use(state, ptr, val); release_triple(state, ptr); continue; } @@ -16420,7 +16420,7 @@ RHS(ptr, 0) = tval; use_triple(tval, ptr); } - propogate_use(state, ptr, tval); + propagate_use(state, ptr, tval); unuse_triple(var, ptr); /* Push OP_WRITE ptr->right onto a stack of variable uses */ push_triple(stacks, var, tval); @@ -16622,10 +16622,10 @@ for(j = 0; j < zrhs; j++) { if(!slot[j]) { struct triple *unknown; - get_occurance(phi->occurance); + get_occurrence(phi->occurrence); unknown = flatten(state, state->global_pool, alloc_triple(state, OP_UNKNOWNVAL, - phi->type, 0, 0, phi->occurance)); + phi->type, 0, 0, phi->occurrence)); slot[j] = unknown; use_triple(unknown, phi); transform_to_arch_instruction(state, unknown); @@ -16765,7 +16765,7 @@ var = var->next; /* point at the var */ /* Replaces use of phi with var */ - propogate_use(state, phi, var); + propagate_use(state, phi, var); /* Count the readers */ readers = 0; @@ -17268,9 +17268,9 @@ continue; } - get_occurance(val->occurance); + get_occurrence(val->occurrence); move = build_triple(state, OP_COPY, val->type, val, 0, - val->occurance); + val->occurrence); move->u.block = eblock; move->id |= TRIPLE_FLAG_PRE_SPLIT; use_triple(val, move); @@ -17400,7 +17400,7 @@ return vertex; } vertex += 1; - /* Renumber the blocks in a convinient fashion */ + /* Renumber the blocks in a convenient fashion */ block->vertex = vertex; blocks[vertex].block = block; blocks[vertex].vertex = vertex; @@ -18750,7 +18750,7 @@ lr1->color = color; lr1->classes = classes; - /* Keep the graph in sync by transfering the edges from lr2 to lr1 */ + /* Keep the graph in sync by transferring the edges from lr2 to lr1 */ transfer_live_edges(rstate, lr1, lr2); return lr1; @@ -18835,7 +18835,7 @@ rstate->lrd[j].lr = &rstate->lr[0]; } - /* Initalize the live_range_def */ + /* Initialize the live_range_def */ rstate->lrd[j].next = &rstate->lrd[j]; rstate->lrd[j].prev = &rstate->lrd[j]; rstate->lrd[j].def = ins; @@ -18847,7 +18847,7 @@ } while(ins != first); rstate->ranges = i; - /* Make a second pass to handle achitecture specific register + /* Make a second pass to handle architecture specific register * constraints. */ ins = first; @@ -19541,7 +19541,7 @@ * * So far I don't have a test case for this, the resolving * of mandatory constraints has solved all of my - * know issues. So I have choosen not to write any + * know issues. So I have chosen not to write any * code until I cat get a better feel for cases where * it would be useful to have. * @@ -20749,7 +20749,7 @@ lnode->val = lnode->def; } /* Only allow lattice high when all of my inputs - * are also lattice high. Occassionally I can + * are also lattice high. Occasionally I can * have constants with a lattice low input, so * I do not need to check that case. */ @@ -20779,7 +20779,7 @@ !triple_is_cbranch(state, lnode->def)) || (lnode->def->op == OP_PIECE))) { #if DEBUG_ROMCC_WARNINGS -#warning "FIXME constant propogate through expressions with multiple left hand sides" +#warning "FIXME constant propagate through expressions with multiple left hand sides" #endif if (changed) { internal_warning(state, lnode->def, "non def changes value?"); @@ -21471,17 +21471,17 @@ (unknown_triple.template_id != 0) || (unknown_triple.id != -1) || (unknown_triple.type != &unknown_type) || - (unknown_triple.occurance != &dummy_occurance) || + (unknown_triple.occurrence != &dummy_occurrence) || (unknown_triple.param[0] != 0) || (unknown_triple.param[1] != 0)) { internal_error(state, &unknown_triple, "unknown_triple corrupted!"); } - if ( (dummy_occurance.count != 2) || - (strcmp(dummy_occurance.filename, __FILE__) != 0) || - (strcmp(dummy_occurance.function, "") != 0) || - (dummy_occurance.col != 0) || - (dummy_occurance.parent != 0)) { - internal_error(state, &unknown_triple, "dummy_occurance corrupted!"); + if ( (dummy_occurrence.count != 2) || + (strcmp(dummy_occurrence.filename, __FILE__) != 0) || + (strcmp(dummy_occurrence.function, "") != 0) || + (dummy_occurrence.col != 0) || + (dummy_occurrence.parent != 0)) { + internal_error(state, &unknown_triple, "dummy_occurrence corrupted!"); } if ( (unknown_type.type != TYPE_UNKNOWN)) { internal_error(state, &unknown_triple, "unknown_type corrupted!"); @@ -21604,7 +21604,7 @@ /* Do strength reduction and simple constant optimizations */ simplify_all(state); verify_consistency(state); - /* Propogate constants throughout the code */ + /* Propagate constants throughout the code */ scc_transform(state); verify_consistency(state); #if DEBUG_ROMCC_WARNINGS @@ -23181,7 +23181,7 @@ use_triple(LHS(div, 1), div); /* Replate uses of ins with the appropriate piece of the div */ - propogate_use(state, ins, LHS(div, index)); + propagate_use(state, ins, LHS(div, index)); release_triple(state, ins); /* Return the address of the next instruction */ @@ -23258,7 +23258,7 @@ use_triple(val_mask, new); /* Move all of the users over to the new expression */ - propogate_use(state, ins, new); + propagate_use(state, ins, new); /* Delete the original triple */ release_triple(state, ins); @@ -23306,7 +23306,7 @@ use_triple(mask, val_mask); /* Move all of the users over to the new expression */ - propogate_use(state, ins, val_mask); + propagate_use(state, ins, val_mask); /* Release the original instruction */ release_triple(state, ins); @@ -24796,12 +24796,12 @@ { struct triple *first, *ins; int print_location; - struct occurance *last_occurance; + struct occurrence *last_occurrence; FILE *fp; int max_inline_depth; max_inline_depth = 0; print_location = 1; - last_occurance = 0; + last_occurrence = 0; fp = state->output; /* Masks for common sizes */ fprintf(fp, ".section \"" DATA_SECTION "\"\n"); @@ -24815,20 +24815,20 @@ ins = first; do { if (print_location && - last_occurance != ins->occurance) { - if (!ins->occurance->parent) { + last_occurrence != ins->occurrence) { + if (!ins->occurrence->parent) { fprintf(fp, "\t/* %s,%s:%d.%d */\n", - ins->occurance->function?ins->occurance->function:"(null)", - ins->occurance->filename?ins->occurance->filename:"(null)", - ins->occurance->line, - ins->occurance->col); + ins->occurrence->function?ins->occurrence->function:"(null)", + ins->occurrence->filename?ins->occurrence->filename:"(null)", + ins->occurrence->line, + ins->occurrence->col); } else { - struct occurance *ptr; + struct occurrence *ptr; int inline_depth; fprintf(fp, "\t/*\n"); inline_depth = 0; - for(ptr = ins->occurance; ptr; ptr = ptr->parent) { + for(ptr = ins->occurrence; ptr; ptr = ptr->parent) { inline_depth++; fprintf(fp, "\t * %s,%s:%d.%d\n", ptr->function, @@ -24841,11 +24841,11 @@ max_inline_depth = inline_depth; } } - if (last_occurance) { - put_occurance(last_occurance); + if (last_occurrence) { + put_occurrence(last_occurrence); } - get_occurance(ins->occurance); - last_occurance = ins->occurance; + get_occurrence(ins->occurrence); + last_occurrence = ins->occurrence; } print_instruction(state, ins, fp); diff --git a/util/romcc/tests/linux_test2.c b/util/romcc/tests/linux_test2.c index 577e0c3..c4fbf0a 100644 --- a/util/romcc/tests/linux_test2.c +++ b/util/romcc/tests/linux_test2.c @@ -155,8 +155,8 @@ * 0 = No coherent HT configuration space restrictions * 1 = Limit coherent HT configuration space based on node count * [16:16] Local Interrupt Conversion Enable. - * 0 = ExtInt/NMI interrups unaffected. - * 1 = ExtInt/NMI broadcat interrupts converted to LINT0/1 + * 0 = ExtInt/NMI interrupts unaffected. + * 1 = ExtInt/NMI broadcast interrupts converted to LINT0/1 * [17:17] APIC Extended Broadcast Enable. * 0 = APIC broadcast is 0F * 1 = APIC broadcast is FF @@ -484,7 +484,7 @@ * 0 = CPU writes may be posted * 1 = CPU writes must be non-posted * [31: 8] Memory-Mapped I/O Limit Address i (39-16) - * This field defines the upp adddress bits of a 40-bit address that + * This field defines the upp address bits of a 40-bit address that * defines the end of a memory-mapped I/O region n */ PCI_ADDR(0, 0x18, 1, 0x84), 0x00000048, 0x00e1ff00, diff --git a/util/romcc/tests/raminit_test.c b/util/romcc/tests/raminit_test.c index b1baf7e..564786b 100644 --- a/util/romcc/tests/raminit_test.c +++ b/util/romcc/tests/raminit_test.c @@ -754,7 +754,7 @@ { /* * Effects: Uses serial presence detect to set the - * DRAMC register, which records if ram is registerd or not, + * DRAMC register, which records if ram is registered or not, * and controls the refresh rate. * The refresh rate is not set here, as memory refresh * cannot be enbaled until after memory is initialized. @@ -997,7 +997,7 @@ } pcibios_write_config_byte(I440GX_BUS, I440GX_DEVFN, 0x53, reg); /* Now see if reg is 0xff. If it is we are done. If not, - * we need to set 0x18 into regster 0x50.l + * we need to set 0x18 into register 0x50.l * we will do this in two steps, first or in 0x80 to 0x50.b, * then or in 0x1 to 0x51.b */ diff --git a/util/romcc/tests/raminit_test1.c b/util/romcc/tests/raminit_test1.c index b1baf7e..564786b 100644 --- a/util/romcc/tests/raminit_test1.c +++ b/util/romcc/tests/raminit_test1.c @@ -754,7 +754,7 @@ { /* * Effects: Uses serial presence detect to set the - * DRAMC register, which records if ram is registerd or not, + * DRAMC register, which records if ram is registered or not, * and controls the refresh rate. * The refresh rate is not set here, as memory refresh * cannot be enbaled until after memory is initialized. @@ -997,7 +997,7 @@ } pcibios_write_config_byte(I440GX_BUS, I440GX_DEVFN, 0x53, reg); /* Now see if reg is 0xff. If it is we are done. If not, - * we need to set 0x18 into regster 0x50.l + * we need to set 0x18 into register 0x50.l * we will do this in two steps, first or in 0x80 to 0x50.b, * then or in 0x1 to 0x51.b */ diff --git a/util/romcc/tests/raminit_test2.c b/util/romcc/tests/raminit_test2.c index c5b366f..af6eaae 100644 --- a/util/romcc/tests/raminit_test2.c +++ b/util/romcc/tests/raminit_test2.c @@ -754,7 +754,7 @@ { /* * Effects: Uses serial presence detect to set the - * DRAMC register, which records if ram is registerd or not, + * DRAMC register, which records if ram is registered or not, * and controls the refresh rate. * The refresh rate is not set here, as memory refresh * cannot be enbaled until after memory is initialized. @@ -997,7 +997,7 @@ } pcibios_write_config_byte(I440GX_BUS, I440GX_DEVFN, 0x53, reg); /* Now see if reg is 0xff. If it is we are done. If not, - * we need to set 0x18 into regster 0x50.l + * we need to set 0x18 into register 0x50.l * we will do this in two steps, first or in 0x80 to 0x50.b, * then or in 0x1 to 0x51.b */ diff --git a/util/romcc/tests/simple_test30.c b/util/romcc/tests/simple_test30.c index ede2091..6130ca7 100644 --- a/util/romcc/tests/simple_test30.c +++ b/util/romcc/tests/simple_test30.c @@ -569,8 +569,8 @@ * 0 = No coherent HT configuration space restrictions * 1 = Limit coherent HT configuration space based on node count * [16:16] Local Interrupt Conversion Enable. - * 0 = ExtInt/NMI interrups unaffected. - * 1 = ExtInt/NMI broadcat interrupts converted to LINT0/1 + * 0 = ExtInt/NMI interrupts unaffected. + * 1 = ExtInt/NMI broadcast interrupts converted to LINT0/1 * [17:17] APIC Extended Broadcast Enable. * 0 = APIC broadcast is 0F * 1 = APIC broadcast is FF @@ -898,7 +898,7 @@ * 0 = CPU writes may be posted * 1 = CPU writes must be non-posted * [31: 8] Memory-Mapped I/O Limit Address i (39-16) - * This field defines the upp adddress bits of a 40-bit address that + * This field defines the upp address bits of a 40-bit address that * defines the end of a memory-mapped I/O region n */ PCI_ADDR(0, 0x18, 1, 0x84), 0x00000048, 0x00e1ff00, diff --git a/util/scripts/dts-to-fmd.sh b/util/scripts/dts-to-fmd.sh index 5068a99..00e718be 100755 --- a/util/scripts/dts-to-fmd.sh +++ b/util/scripts/dts-to-fmd.sh @@ -103,7 +103,7 @@ fi # special handling: COREBOOT region at 0, inject a 128K bootblock - # The size may need changes to accomodate the chipsets, + # The size may need changes to accommodate the chipsets, # but should work for now. if [ "${REGION_NAME}" = "COREBOOT" -a \ $(( ${REGION_START} )) -eq 0 ]; then diff --git a/util/superiotool/ite.c b/util/superiotool/ite.c index 1eccb64..6fb4877 100644 --- a/util/superiotool/ite.c +++ b/util/superiotool/ite.c @@ -118,7 +118,7 @@ {NOLDN, "I/O Port Base Address for Descriptor 1 (IOBAD1)", {0x62,0x63,EOT}, {NANA,NANA,EOT}}, - {NOLDN, "Interupt Request Number and Wake-Up on IRQ Enable (IRQNUMX)", + {NOLDN, "Interrupt Request Number and Wake-Up on IRQ Enable (IRQNUMX)", {0x70,EOT}, {NANA,EOT}}, {NOLDN, "Interrupt Request Type Select (IRQTP)", -- To view, visit https://review.coreboot.org/28208 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I6967a106ce1286d633ddeeb041f582e65f9ea78c Gerrit-Change-Number: 28208 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr>

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Change in coreboot[master]: atlas: enable keyboard backlight support
by Lijian Zhao (Code Review) 18 Aug '18

18 Aug '18

Lijian Zhao has posted comments on this change. ( https://review.coreboot.org/28205 ) Change subject: atlas: enable keyboard backlight support ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/28205 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I25713f341e8b5a4e50903ac109bfa717f20969d8 Gerrit-Change-Number: 28205 Gerrit-PatchSet: 1 Gerrit-Owner: Caveh Jalali <caveh(a)google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)google.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: caveh jalali <caveh(a)chromium.org> Gerrit-Comment-Date: Sat, 18 Aug 2018 05:44:22 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: atlas: enable keyboard backlight support
by Caveh Jalali (Code Review) 18 Aug '18

18 Aug '18

Caveh Jalali has posted comments on this change. ( https://review.coreboot.org/28205 ) Change subject: atlas: enable keyboard backlight support ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/28205 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I25713f341e8b5a4e50903ac109bfa717f20969d8 Gerrit-Change-Number: 28205 Gerrit-PatchSet: 1 Gerrit-Owner: Caveh Jalali <caveh(a)google.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)google.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: caveh jalali <caveh(a)chromium.org> Gerrit-Comment-Date: Sat, 18 Aug 2018 03:20:51 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: atlas: enable keyboard backlight support
by caveh jalali (Code Review) 18 Aug '18

18 Aug '18

caveh jalali has posted comments on this change. ( https://review.coreboot.org/28205 ) Change subject: atlas: enable keyboard backlight support ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/28205 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I25713f341e8b5a4e50903ac109bfa717f20969d8 Gerrit-Change-Number: 28205 Gerrit-PatchSet: 1 Gerrit-Owner: Caveh Jalali <caveh(a)google.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: caveh jalali <caveh(a)chromium.org> Gerrit-Comment-Date: Sat, 18 Aug 2018 03:18:05 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: [TEST] google/grunt: Override BayHub EMMC driving strength and set ba...
by Kevin Chiu (Code Review) 18 Aug '18

18 Aug '18

Kevin Chiu has abandoned this change. ( https://review.coreboot.org/28185 ) Change subject: [TEST] google/grunt: Override BayHub EMMC driving strength and set base CLK 200MHz ...................................................................... Abandoned -- To view, visit https://review.coreboot.org/28185 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: abandon Gerrit-Change-Id: Id3db7a5afc2f774f21ef59c12ed6a92a69c8c917 Gerrit-Change-Number: 28185 Gerrit-PatchSet: 1 Gerrit-Owner: Kevin Chiu <Kevin.Chiu(a)quantatw.com> Gerrit-Reviewer: Kevin Chiu <Kevin.Chiu(a)quantatw.com> Gerrit-Reviewer: Tim Chen <Tim-Chen(a)quantatw.com>

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Change in coreboot[master]: atlas: enable keyboard backlight support
by Caveh Jalali (Code Review) 18 Aug '18

18 Aug '18

Hello caveh jalali, I'd like you to do a code review. Please visit https://review.coreboot.org/28205 to review the following change. Change subject: atlas: enable keyboard backlight support ...................................................................... atlas: enable keyboard backlight support This adds support for controlling the keyboard backlight over ACPI. BUG=b:112619894 BRANCH=none TEST=verified keyboard backlight can be adjusted using keyboard shortcuts Change-Id: I25713f341e8b5a4e50903ac109bfa717f20969d8 Signed-off-by: Caveh Jalali <caveh(a)chromium.org> --- M src/mainboard/google/poppy/variants/atlas/include/variant/ec.h 1 file changed, 3 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/28205/1 diff --git a/src/mainboard/google/poppy/variants/atlas/include/variant/ec.h b/src/mainboard/google/poppy/variants/atlas/include/variant/ec.h index 22bcef5..484510b 100644 --- a/src/mainboard/google/poppy/variants/atlas/include/variant/ec.h +++ b/src/mainboard/google/poppy/variants/atlas/include/variant/ec.h @@ -78,4 +78,7 @@ #define SIO_EC_HOST_ENABLE /* EC Host Interface Resources */ #define SIO_EC_ENABLE_PS2K /* Enable PS/2 Keyboard */ +/* Enable EC backed Keyboard Backlight in ACPI */ +#define EC_ENABLE_KEYBOARD_BACKLIGHT + #endif /* __MAINBOARD_EC_H__ */ -- To view, visit https://review.coreboot.org/28205 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I25713f341e8b5a4e50903ac109bfa717f20969d8 Gerrit-Change-Number: 28205 Gerrit-PatchSet: 1 Gerrit-Owner: Caveh Jalali <caveh(a)google.com> Gerrit-Reviewer: caveh jalali <caveh(a)chromium.org>

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Change in coreboot[master]: vendorcode/amd/agesa/f15tn: add Richland RL-A1 to the equivalence table
by Mike Banon (Code Review) 17 Aug '18

17 Aug '18

Mike Banon has uploaded this change for review. ( https://review.coreboot.org/28204 Change subject: vendorcode/amd/agesa/f15tn: add Richland RL-A1 to the equivalence table ...................................................................... vendorcode/amd/agesa/f15tn: add Richland RL-A1 to the equivalence table This small change is required for the successful loading of microcode from F15TnMicrocodePatch0600110F_Enc.c for the Richland RL-A1 CPUs, such as A10-5750M found at coreboot-supported Lenovo G505S laptop Richland RL-A1 and Trinity TN-A1 CPUs are using the same microcode, so the Richland RL-A1 IDs should be added to this equivalence table Change-Id: I7a68f2fef74fb4c578c47645f727a9ed45526f69 Signed-off-by: Mike Banon <mikebdp2(a)gmail.com> --- M src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnEquivalenceTable.c 1 file changed, 2 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/28204/1 diff --git a/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnEquivalenceTable.c b/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnEquivalenceTable.c index b0b12b8..759c2fe 100644 --- a/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnEquivalenceTable.c +++ b/src/vendorcode/amd/agesa/f15tn/Proc/CPU/Family/0x15/TN/F15TnEquivalenceTable.c @@ -83,6 +83,7 @@ */ STATIC CONST UINT16 ROMDATA CpuF15TnMicrocodeEquivalenceTable[] = { + 0x6131, 0x6101, 0x6101, 0x6101, 0x6100, 0x6100 }; @@ -90,6 +91,7 @@ // Unencrypted equivalent STATIC CONST UINT16 ROMDATA CpuF15TnUnEncryptedMicrocodeEquivalenceTable[] = { + 0x6131, 0x6901, 0x6101, 0x6901, 0x6100, 0x6900 }; -- To view, visit https://review.coreboot.org/28204 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I7a68f2fef74fb4c578c47645f727a9ed45526f69 Gerrit-Change-Number: 28204 Gerrit-PatchSet: 1 Gerrit-Owner: Mike Banon <mikebdp2(a)gmail.com>

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Change in coreboot[master]: configs: Add various common non-default mainboards
by Martin Roth (Code Review) 17 Aug '18

17 Aug '18

Martin Roth has submitted this change and it was merged. ( https://review.coreboot.org/28118 ) Change subject: configs: Add various common non-default mainboards ...................................................................... configs: Add various common non-default mainboards Build tests: * Option table * Static option table * Verbose debugging code * Sandy Bridge optional Kconfigs * TPM debugging code * Lenovo Bluetooth on Wifi * Libgfxinit on Sandy Bridge Change-Id: Ib463f578c97a212d0729aa6f54b7b6fba33e0478 Signed-off-by: Patrick Rudolph <siro(a)das-labor.org> Reviewed-on: https://review.coreboot.org/28118 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Martin Roth <martinroth(a)google.com> --- A configs/config.lenovo_t400_all_debug_and_option_table A configs/config.lenovo_t420_static_option_table_no_mem_fuses A configs/config.lenovo_thinkpad_t430_all_debug_and_option_table A configs/config.lenovo_x201_all_debug_option_table_bt_on_wifi A configs/config.lenovo_x220_option_table_debug_tpm_extended_cbfs 5 files changed, 55 insertions(+), 0 deletions(-) Approvals: build bot (Jenkins): Verified Martin Roth: Looks good to me, approved diff --git a/configs/config.lenovo_t400_all_debug_and_option_table b/configs/config.lenovo_t400_all_debug_and_option_table new file mode 100644 index 0000000..0ceee16 --- /dev/null +++ b/configs/config.lenovo_t400_all_debug_and_option_table @@ -0,0 +1,14 @@ +CONFIG_USE_OPTION_TABLE=y +CONFIG_VENDOR_LENOVO=y +CONFIG_BOARD_LENOVO_T400=y +CONFIG_NO_POST=y +CONFIG_FATAL_ASSERTS=y +CONFIG_DEBUG_CBFS=y +CONFIG_DEBUG_RAM_SETUP=y +CONFIG_DEBUG_SMBUS=y +CONFIG_DEBUG_SMI=y +CONFIG_DEBUG_SMM_RELOCATION=y +CONFIG_DEBUG_MALLOC=y +CONFIG_DEBUG_ACPI=y +CONFIG_DEBUG_BOOT_STATE=y +CONFIG_DEBUG_ADA_CODE=y diff --git a/configs/config.lenovo_t420_static_option_table_no_mem_fuses b/configs/config.lenovo_t420_static_option_table_no_mem_fuses new file mode 100644 index 0000000..a268d88 --- /dev/null +++ b/configs/config.lenovo_t420_static_option_table_no_mem_fuses @@ -0,0 +1,7 @@ +CONFIG_USE_OPTION_TABLE=y +CONFIG_STATIC_OPTION_TABLE=y +CONFIG_VENDOR_LENOVO=y +CONFIG_BOARD_LENOVO_T420=y +CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES=y +CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS=y +# CONFIG_INTEL_CHIPSET_LOCKDOWN is not set diff --git a/configs/config.lenovo_thinkpad_t430_all_debug_and_option_table b/configs/config.lenovo_thinkpad_t430_all_debug_and_option_table new file mode 100644 index 0000000..2c38734 --- /dev/null +++ b/configs/config.lenovo_thinkpad_t430_all_debug_and_option_table @@ -0,0 +1,15 @@ +CONFIG_USE_OPTION_TABLE=y +CONFIG_VENDOR_LENOVO=y +# CONFIG_POST_IO is not set +# CONFIG_POST_DEVICE is not set +CONFIG_BOARD_LENOVO_THINKPAD_T430=y +CONFIG_BOOTBLOCK_NORMAL=y +CONFIG_MAINBOARD_USE_LIBGFXINIT=y +CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y +CONFIG_DEBUG_RAM_SETUP=y +CONFIG_DEBUG_SMBUS=y +CONFIG_DEBUG_SMI=y +CONFIG_DEBUG_SMM_RELOCATION=y +CONFIG_DEBUG_SPI_FLASH=y +CONFIG_DEBUG_BOOT_STATE=y +CONFIG_DEBUG_ADA_CODE=y diff --git a/configs/config.lenovo_x201_all_debug_option_table_bt_on_wifi b/configs/config.lenovo_x201_all_debug_option_table_bt_on_wifi new file mode 100644 index 0000000..697c26d --- /dev/null +++ b/configs/config.lenovo_x201_all_debug_option_table_bt_on_wifi @@ -0,0 +1,14 @@ +CONFIG_USE_OPTION_TABLE=y +CONFIG_VENDOR_LENOVO=y +CONFIG_BOARD_LENOVO_X201=y +CONFIG_H8_SUPPORT_BT_ON_WIFI=y +CONFIG_FATAL_ASSERTS=y +CONFIG_DEBUG_CBFS=y +CONFIG_DEBUG_SMBUS=y +CONFIG_DEBUG_SMI=y +CONFIG_DEBUG_SMM_RELOCATION=y +CONFIG_DEBUG_MALLOC=y +CONFIG_DEBUG_ACPI=y +CONFIG_DEBUG_SPI_FLASH=y +CONFIG_DEBUG_BOOT_STATE=y +CONFIG_DEBUG_ADA_CODE=y diff --git a/configs/config.lenovo_x220_option_table_debug_tpm_extended_cbfs b/configs/config.lenovo_x220_option_table_debug_tpm_extended_cbfs new file mode 100644 index 0000000..752e37f --- /dev/null +++ b/configs/config.lenovo_x220_option_table_debug_tpm_extended_cbfs @@ -0,0 +1,5 @@ +CONFIG_USE_OPTION_TABLE=y +CONFIG_VENDOR_LENOVO=y +CONFIG_CBFS_SIZE=0x200000 +CONFIG_BOARD_LENOVO_X220=y +CONFIG_DEBUG_TPM=y -- To view, visit https://review.coreboot.org/28118 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: merged Gerrit-Change-Id: Ib463f578c97a212d0729aa6f54b7b6fba33e0478 Gerrit-Change-Number: 28118 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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coreboot-gerrit August 2018