coreboot-gerrit July 2018

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Change in coreboot[master]: northbridge/nehalem: clean up header file
by Arthur Heymans (Code Review) 29 Jul '18

29 Jul '18

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/27713 ) Change subject: northbridge/nehalem: clean up header file ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/27713 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I1f758203afdcb1b18f3c0d786698f9fbf2246e0e Gerrit-Change-Number: 27713 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 29 Jul 2018 11:32:10 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: northbridge/nehalem: clean up header file
by Felix Held (Code Review) 29 Jul '18

29 Jul '18

Felix Held has uploaded this change for review. ( https://review.coreboot.org/27713 Change subject: northbridge/nehalem: clean up header file ...................................................................... northbridge/nehalem: clean up header file * remove duplicate macro definitions * add brackets to macros Change-Id: I1f758203afdcb1b18f3c0d786698f9fbf2246e0e Signed-off-by: Felix Held <felix-coreboot(a)felixheld.de> --- M src/northbridge/intel/nehalem/nehalem.h 1 file changed, 11 insertions(+), 38 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/13/27713/1 diff --git a/src/northbridge/intel/nehalem/nehalem.h b/src/northbridge/intel/nehalem/nehalem.h index 20c0bbc..afb3c7d 100644 --- a/src/northbridge/intel/nehalem/nehalem.h +++ b/src/northbridge/intel/nehalem/nehalem.h @@ -102,33 +102,6 @@ #define D1F0_VCCAP 0x104 #define D1F0_VC0RCTL 0x114 -/* - * MCHBAR - */ - -#define MCHBAR8(x) *((volatile u8 *)(DEFAULT_MCHBAR + x)) -#define MCHBAR16(x) *((volatile u16 *)(DEFAULT_MCHBAR + x)) -#define MCHBAR32(x) *((volatile u32 *)(DEFAULT_MCHBAR + x)) - -/* - * DMIBAR - */ - -#define DMIBAR8(x) *((volatile u8 *)(DEFAULT_DMIBAR + x)) -#define DMIBAR16(x) *((volatile u16 *)(DEFAULT_DMIBAR + x)) -#define DMIBAR32(x) *((volatile u32 *)(DEFAULT_DMIBAR + x)) - -#define DMIVC0RCTL 0x14 -#define DMIESD 0x44 - -/* - * EPBAR - */ - -#define EPBAR8(x) *((volatile u8 *)(DEFAULT_EPBAR + x)) -#define EPBAR16(x) *((volatile u16 *)(DEFAULT_EPBAR + x)) -#define EPBAR32(x) *((volatile u32 *)(DEFAULT_EPBAR + x)) - /* Chipset types */ #define NEHALEM_MOBILE 0 #define NEHALEM_DESKTOP 1 @@ -199,10 +172,10 @@ * MCHBAR */ -#define MCHBAR8(x) *((volatile u8 *)(DEFAULT_MCHBAR + x)) -#define MCHBAR16(x) *((volatile u16 *)(DEFAULT_MCHBAR + x)) -#define MCHBAR32(x) *((volatile u32 *)(DEFAULT_MCHBAR + x)) -#define MCHBAR32_OR(x, or) MCHBAR32(x) = (MCHBAR32(x) | (or)) +#define MCHBAR8(x) (*((volatile u8 *)(DEFAULT_MCHBAR + (x)))) +#define MCHBAR16(x) (*((volatile u16 *)(DEFAULT_MCHBAR + (x)))) +#define MCHBAR32(x) (*((volatile u32 *)(DEFAULT_MCHBAR + (x)))) +#define MCHBAR32_OR(x, or) (MCHBAR32(x) = (MCHBAR32(x) | (or))) #define BIOS_RESET_CPL 0x5da8 /* 8bit */ @@ -210,9 +183,9 @@ * EPBAR - Egress Port Root Complex Register Block */ -#define EPBAR8(x) *((volatile u8 *)(DEFAULT_EPBAR + x)) -#define EPBAR16(x) *((volatile u16 *)(DEFAULT_EPBAR + x)) -#define EPBAR32(x) *((volatile u32 *)(DEFAULT_EPBAR + x)) +#define EPBAR8(x) (*((volatile u8 *)(DEFAULT_EPBAR + (x)))) +#define EPBAR16(x) (*((volatile u16 *)(DEFAULT_EPBAR + (x)))) +#define EPBAR32(x) (*((volatile u32 *)(DEFAULT_EPBAR + (x)))) #define EPPVCCAP1 0x004 /* 32bit */ #define EPPVCCAP2 0x008 /* 32bit */ @@ -241,9 +214,9 @@ * DMIBAR */ -#define DMIBAR8(x) *((volatile u8 *)(DEFAULT_DMIBAR + x)) -#define DMIBAR16(x) *((volatile u16 *)(DEFAULT_DMIBAR + x)) -#define DMIBAR32(x) *((volatile u32 *)(DEFAULT_DMIBAR + x)) +#define DMIBAR8(x) (*((volatile u8 *)(DEFAULT_DMIBAR + (x)))) +#define DMIBAR16(x) (*((volatile u16 *)(DEFAULT_DMIBAR + (x)))) +#define DMIBAR32(x) (*((volatile u32 *)(DEFAULT_DMIBAR + (x)))) #define DMIVCECH 0x000 /* 32bit */ #define DMIPVCCAP1 0x004 /* 32bit */ @@ -252,7 +225,7 @@ #define DMIPVCCCTL 0x00c /* 16bit */ #define DMIVC0RCAP 0x010 /* 32bit */ -#define DMIVC0RCTL0 0x014 /* 32bit */ +#define DMIVC0RCTL 0x014 /* 32bit */ #define DMIVC0RSTS 0x01a /* 16bit */ #define DMIVC1RCAP 0x01c /* 32bit */ -- To view, visit https://review.coreboot.org/27713 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I1f758203afdcb1b18f3c0d786698f9fbf2246e0e Gerrit-Change-Number: 27713 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de>

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Change in coreboot[master]: nb/intel/sandybridge: Bump MRC_CACHE_VERSION
by Felix Held (Code Review) 29 Jul '18

29 Jul '18

Felix Held has posted comments on this change. ( https://review.coreboot.org/27712 ) Change subject: nb/intel/sandybridge: Bump MRC_CACHE_VERSION ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/27712 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Icd6f31bf0b30a42c66e18ab83d2434f9c3084211 Gerrit-Change-Number: 27712 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 29 Jul 2018 11:10:28 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: nb/intel/sandybridge: Bump MRC_CACHE_VERSION
by Felix Held (Code Review) 29 Jul '18

29 Jul '18

Felix Held has submitted this change and it was merged. ( https://review.coreboot.org/27712 ) Change subject: nb/intel/sandybridge: Bump MRC_CACHE_VERSION ...................................................................... nb/intel/sandybridge: Bump MRC_CACHE_VERSION Commit 74203de "intel/sandybridge: Don't hardcode platform type" changed the MRC layout. Bump the version to prevent a boot error, if the cache isn't cleared on flashing a new coreboot version. Change-Id: Icd6f31bf0b30a42c66e18ab83d2434f9c3084211 Signed-off-by: Patrick Rudolph <siro(a)das-labor.org> Reviewed-on: https://review.coreboot.org/27712 Reviewed-by: Arthur Heymans <arthur(a)aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/northbridge/intel/sandybridge/raminit.c 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Arthur Heymans: Looks good to me, approved diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c index 47474ee..31c7d5b 100644 --- a/src/northbridge/intel/sandybridge/raminit.c +++ b/src/northbridge/intel/sandybridge/raminit.c @@ -36,7 +36,7 @@ #include "raminit_common.h" #include "sandybridge.h" -#define MRC_CACHE_VERSION 0 +#define MRC_CACHE_VERSION 1 /* FIXME: no ECC support. */ /* FIXME: no support for 3-channel chipsets. */ -- To view, visit https://review.coreboot.org/27712 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: merged Gerrit-Change-Id: Icd6f31bf0b30a42c66e18ab83d2434f9c3084211 Gerrit-Change-Number: 27712 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: nb/intel/sandybridge: Bump MRC_CACHE_VERSION
by Arthur Heymans (Code Review) 29 Jul '18

29 Jul '18

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/27712 ) Change subject: nb/intel/sandybridge: Bump MRC_CACHE_VERSION ...................................................................... Patch Set 1: (1 comment) https://review.coreboot.org/#/c/27712/1/src/northbridge/intel/sandybridge/r… File src/northbridge/intel/sandybridge/raminit.c: https://review.coreboot.org/#/c/27712/1/src/northbridge/intel/sandybridge/r… PS1, Line 39: #define MRC_CACHE_VERSION 1 could you add a comment here or where the struct is defined to update this if the struct gets changed? -- To view, visit https://review.coreboot.org/27712 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Icd6f31bf0b30a42c66e18ab83d2434f9c3084211 Gerrit-Change-Number: 27712 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 29 Jul 2018 10:46:04 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

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Change in coreboot[master]: nb/intel/sandybridge: Bump MRC_CACHE_VERSION
by Arthur Heymans (Code Review) 29 Jul '18

29 Jul '18

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Change in coreboot[master]: nb/intel/sandybridge: Bump MRC_CACHE_VERSION
by Patrick Rudolph (Code Review) 29 Jul '18

29 Jul '18

Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/27712 Change subject: nb/intel/sandybridge: Bump MRC_CACHE_VERSION ...................................................................... nb/intel/sandybridge: Bump MRC_CACHE_VERSION Commit 74203de "intel/sandybridge: Don't hardcode platform type" changed the MRC layout. Bump the version to prevent a boot error, if the cache isn't cleared on flashing a new coreboot version. Change-Id: Icd6f31bf0b30a42c66e18ab83d2434f9c3084211 Signed-off-by: Patrick Rudolph <siro(a)das-labor.org> --- M src/northbridge/intel/sandybridge/raminit.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/27712/1 diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c index 47474ee..31c7d5b 100644 --- a/src/northbridge/intel/sandybridge/raminit.c +++ b/src/northbridge/intel/sandybridge/raminit.c @@ -36,7 +36,7 @@ #include "raminit_common.h" #include "sandybridge.h" -#define MRC_CACHE_VERSION 0 +#define MRC_CACHE_VERSION 1 /* FIXME: no ECC support. */ /* FIXME: no support for 3-channel chipsets. */ -- To view, visit https://review.coreboot.org/27712 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Icd6f31bf0b30a42c66e18ab83d2434f9c3084211 Gerrit-Change-Number: 27712 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org>

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Change in coreboot[master]: drvs/intel/gma/acpi: Add methods to use MBOX3
by Patrick Rudolph (Code Review) 29 Jul '18

29 Jul '18

Hello Alexander Couzens, Arthur Heymans, Matt DeVillier, build bot (Jenkins), Nico Huber, I'd like you to reexamine a change. Please visit https://review.coreboot.org/27711 to look at the new patch set (#4). Change subject: drvs/intel/gma/acpi: Add methods to use MBOX3 ...................................................................... drvs/intel/gma/acpi: Add methods to use MBOX3 * Add Mailbox 3 driver * Request brightness change through Mailbox 3 * Return Ones on error or if unsupported * Mark existing code as legacy (still required if no GMA driver is running) * Call legacy code if Mailbox 3 is unsupported, on error or if gma driver isn't running Tested on Lenovo T430: * Brightness control still works * Brightness is the same on S3 resume Change-Id: I51554c819148336b204d28972cbf775a10c3fb8a Signed-off-by: Patrick Rudolph <siro(a)das-labor.org> --- M src/drivers/intel/gma/acpi/common.asl M src/drivers/intel/gma/acpi/configure_brightness_levels.asl M src/drivers/intel/gma/acpi/non-pch.asl M src/drivers/intel/gma/acpi/pch.asl 4 files changed, 152 insertions(+), 20 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/27711/4 -- To view, visit https://review.coreboot.org/27711 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I51554c819148336b204d28972cbf775a10c3fb8a Gerrit-Change-Number: 27711 Gerrit-PatchSet: 4 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: drvs/intel/gma/acpi: Add methods to use MBOX3
by Patrick Rudolph (Code Review) 29 Jul '18

29 Jul '18

Hello Alexander Couzens, Arthur Heymans, Matt DeVillier, build bot (Jenkins), Nico Huber, I'd like you to reexamine a change. Please visit https://review.coreboot.org/27711 to look at the new patch set (#3). Change subject: drvs/intel/gma/acpi: Add methods to use MBOX3 ...................................................................... drvs/intel/gma/acpi: Add methods to use MBOX3 * Add Mailbox 3 driver * Request brightness change through Mailbox 3 * Return Ones on error or if unsupported * Mark existing code as legacy (still required if no GMA driver is running) * Call legacy code if Mailbox 3 is unsupported, on error or if gma driver isn't running Tested on Lenovo T430: * Brightness control still works * Brightness is the same on S3 resume Change-Id: I51554c819148336b204d28972cbf775a10c3fb8a Signed-off-by: Patrick Rudolph <siro(a)das-labor.org> --- M src/drivers/intel/gma/acpi/common.asl M src/drivers/intel/gma/acpi/configure_brightness_levels.asl M src/drivers/intel/gma/acpi/non-pch.asl M src/drivers/intel/gma/acpi/pch.asl 4 files changed, 151 insertions(+), 20 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/27711/3 -- To view, visit https://review.coreboot.org/27711 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I51554c819148336b204d28972cbf775a10c3fb8a Gerrit-Change-Number: 27711 Gerrit-PatchSet: 3 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: drvs/intel/gma/acpi: Add methods to use MBOX3
by Patrick Rudolph (Code Review) 29 Jul '18

29 Jul '18

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/27711 to look at the new patch set (#2). Change subject: drvs/intel/gma/acpi: Add methods to use MBOX3 ...................................................................... drvs/intel/gma/acpi: Add methods to use MBOX3 * Add Mailbox 3 driver * Request brightness change through Mailbox 3 * Return Ones on error or if unsupported * Mark existing code as legacy (still required if no GMA driver is running) * Call legacy code if Mailbox 3 is unsupported, on error or if gma driver isn't running Tested on Lenovo T430: * Brightness control still works * Brightness is the same on S3 resume Change-Id: I51554c819148336b204d28972cbf775a10c3fb8a Signed-off-by: Patrick Rudolph <siro(a)das-labor.org> --- M src/drivers/intel/gma/acpi/common.asl M src/drivers/intel/gma/acpi/configure_brightness_levels.asl M src/drivers/intel/gma/acpi/non-pch.asl M src/drivers/intel/gma/acpi/pch.asl 4 files changed, 152 insertions(+), 21 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/27711/2 -- To view, visit https://review.coreboot.org/27711 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I51554c819148336b204d28972cbf775a10c3fb8a Gerrit-Change-Number: 27711 Gerrit-PatchSet: 2 Gerrit-Owner: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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coreboot-gerrit July 2018