coreboot-gerrit June 2018

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Change in coreboot[master]: mb/google/poppy/variant/nautilus: Configure for 2nd nautilus SKU
by Furquan Shaikh (Code Review) 18 Jun '18

18 Jun '18

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/27147 ) Change subject: mb/google/poppy/variant/nautilus: Configure for 2nd nautilus SKU ...................................................................... Patch Set 1: > Patch Set 1: > > Question: Do we need to send CLs for new nautilus sku to coreboot.org first? > We need some other CLs which are not merged into poppy branch of chromium-review, will Googlers help cherry-picking all dependent CLs? > ex) We need http://review.coreboot.org/c/26724 for http://review.coreboot.org/c/27148, but it hasn't been merged into poppy branch. Yes, all CLs should be sent to coreboot.org first. Please feel free to cherry-pick any CLs that are required to poppy branch and add me as a reviewer. If you need me to do the cherry-picking, please let me know. -- To view, visit https://review.coreboot.org/27147 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I7242f23f47010664cc29ea86a126e63c9dd62ccd Gerrit-Change-Number: 27147 Gerrit-PatchSet: 1 Gerrit-Owner: Seunghwan Kim <sh_.kim(a)samsung.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Seunghwan Kim <sh_.kim(a)samsung.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 18 Jun 2018 05:16:41 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: cbfstool: Use endian.h and functions from commonlib
by Werner Zeh (Code Review) 18 Jun '18

18 Jun '18

Werner Zeh has submitted this change and it was merged. ( https://review.coreboot.org/27116 ) Change subject: cbfstool: Use endian.h and functions from commonlib ...................................................................... cbfstool: Use endian.h and functions from commonlib The endian conversion function be32toh() is defined in src/include/endian.h, however this file is not used for cbfstool compilation. Currently the one provided by the host is used and if the host does not provide this endian.h file, the build will fail. However, we do have endian conversion functions in commonlib/endian.h which is available for cbfstool compilation. Switch from be32toh() to read_be32() in order to avoid relying on a host provided include file. We use functions from commonlib/endian.h already in cbfstool. Change-Id: I106274cf9c69e1849f848920d96a61188f895b36 Signed-off-by: Werner Zeh <werner.zeh(a)siemens.com> Reviewed-on: https://review.coreboot.org/27116 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Nico Huber <nico.h(a)gmx.de> Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> --- M util/cbfstool/cbfs-mkpayload.c 1 file changed, 2 insertions(+), 1 deletion(-) Approvals: build bot (Jenkins): Verified Patrick Georgi: Looks good to me, approved Nico Huber: Looks good to me, approved diff --git a/util/cbfstool/cbfs-mkpayload.c b/util/cbfstool/cbfs-mkpayload.c index 6dc1634..e26c530 100644 --- a/util/cbfstool/cbfs-mkpayload.c +++ b/util/cbfstool/cbfs-mkpayload.c @@ -18,6 +18,7 @@ #include <stdio.h> #include <stdlib.h> #include <string.h> +#include <commonlib/endian.h> #include "elfparsing.h" #include "common.h" @@ -426,7 +427,7 @@ DEBUG("start: parse_fit_to_payload\n"); fdt_h = buffer_get(input); - if (be32toh(fdt_h->magic) != FDT_HEADER_MAGIC) { + if (read_be32(&fdt_h->magic) != FDT_HEADER_MAGIC) { INFO("Not a FIT payload.\n"); return -1; } -- To view, visit https://review.coreboot.org/27116 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: merged Gerrit-Change-Id: I106274cf9c69e1849f848920d96a61188f895b36 Gerrit-Change-Number: 27116 Gerrit-PatchSet: 2 Gerrit-Owner: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: mb/google/poppy/variant/nautilus: Configure for 2nd nautilus SKU
by Seunghwan Kim (Code Review) 17 Jun '18

17 Jun '18

Seunghwan Kim has posted comments on this change. ( https://review.coreboot.org/27147 ) Change subject: mb/google/poppy/variant/nautilus: Configure for 2nd nautilus SKU ...................................................................... Patch Set 1: Question: Do we need to send CLs for new nautilus sku to coreboot.org first? We need some other CLs which are not merged into poppy branch of chromium-review, will Googlers help cherry-picking all dependent CLs? ex) We need http://review.coreboot.org/c/26724 for http://review.coreboot.org/c/27148, but it hasn't been merged into poppy branch. -- To view, visit https://review.coreboot.org/27147 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I7242f23f47010664cc29ea86a126e63c9dd62ccd Gerrit-Change-Number: 27147 Gerrit-PatchSet: 1 Gerrit-Owner: Seunghwan Kim <sh_.kim(a)samsung.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Seunghwan Kim <sh_.kim(a)samsung.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 18 Jun 2018 01:31:34 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: mb/google/poppy/variant/nautilus: Configure for 2nd nautilus SKU
by build bot (Jenkins) (Code Review) 17 Jun '18

17 Jun '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/27147 ) Change subject: mb/google/poppy/variant/nautilus: Configure for 2nd nautilus SKU ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/29129/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/75035/ : SUCCESS -- To view, visit https://review.coreboot.org/27147 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I7242f23f47010664cc29ea86a126e63c9dd62ccd Gerrit-Change-Number: 27147 Gerrit-PatchSet: 1 Gerrit-Owner: Seunghwan Kim <sh_.kim(a)samsung.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 18 Jun 2018 01:15:10 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: mb/google/poppy/variant/nautilus: Add SAR sensor device into devicetr...
by build bot (Jenkins) (Code Review) 17 Jun '18

17 Jun '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/27149 ) Change subject: mb/google/poppy/variant/nautilus: Add SAR sensor device into devicetree.cb ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/29131/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/75037/ : SUCCESS -- To view, visit https://review.coreboot.org/27149 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ib4969e4b82d18b1b1a599de8226c2d7d4bda7915 Gerrit-Change-Number: 27149 Gerrit-PatchSet: 1 Gerrit-Owner: Seunghwan Kim <sh_.kim(a)samsung.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 18 Jun 2018 01:12:30 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: mb/google/poppy/variant/nautilus: Clear GPP_D0 when entering S5
by build bot (Jenkins) (Code Review) 17 Jun '18

17 Jun '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/27148 ) Change subject: mb/google/poppy/variant/nautilus: Clear GPP_D0 when entering S5 ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/29130/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/75036/ : SUCCESS -- To view, visit https://review.coreboot.org/27148 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I054e707b2bc2e63d6f99cd2fd8a57be20615f111 Gerrit-Change-Number: 27148 Gerrit-PatchSet: 1 Gerrit-Owner: Seunghwan Kim <sh_.kim(a)samsung.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Mon, 18 Jun 2018 01:08:22 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: mb/google/poppy/variant/nautilus: Add SAR sensor device into devicetr...
by Seunghwan Kim (Code Review) 17 Jun '18

17 Jun '18

Seunghwan Kim has uploaded this change for review. ( https://review.coreboot.org/27149 Change subject: mb/google/poppy/variant/nautilus: Add SAR sensor device into devicetree.cb ...................................................................... mb/google/poppy/variant/nautilus: Add SAR sensor device into devicetree.cb This change defines SAR sensor device into devicetree.cb. Since only LTE sku has SAR sensor, we will use GPP_B20 as a device_present_gpio. BUG=None BRANCH=poppy TEST=Verified SAR sensor device is loaded by driver in Chrome OS Change-Id: Ib4969e4b82d18b1b1a599de8226c2d7d4bda7915 Signed-off-by: Seunghwan Kim <sh_.kim(a)samsung.com> --- M src/mainboard/google/poppy/variants/nautilus/devicetree.cb 1 file changed, 10 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/27149/1 diff --git a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb index 79bb5fb..707d174 100644 --- a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb @@ -328,7 +328,16 @@ device i2c 50 on end end end # I2C #1 - device pci 15.2 on end # I2C #2 + device pci 15.2 on + chip drivers/i2c/generic + register "hid" = ""SX9321"" + register "name" = ""SEMTECK SX9321"" + register "desc" = ""SAR Proximity Sensor"" + register "irq" = "ACPI_IRQ_LEVEL_LOW(GPP_A18_IRQ)" + register "device_present_gpio" = "GPP_B20" + device i2c 28 on end + end + end # I2C #2 device pci 15.3 on chip drivers/i2c/hid register "generic.hid" = ""ACPI0C50"" -- To view, visit https://review.coreboot.org/27149 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ib4969e4b82d18b1b1a599de8226c2d7d4bda7915 Gerrit-Change-Number: 27149 Gerrit-PatchSet: 1 Gerrit-Owner: Seunghwan Kim <sh_.kim(a)samsung.com>

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Change in coreboot[master]: mb/google/poppy/variant/nautilus: Clear GPP_D0 when entering S5
by Seunghwan Kim (Code Review) 17 Jun '18

17 Jun '18

Seunghwan Kim has uploaded this change for review. ( https://review.coreboot.org/27148 Change subject: mb/google/poppy/variant/nautilus: Clear GPP_D0 when entering S5 ...................................................................... mb/google/poppy/variant/nautilus: Clear GPP_D0 when entering S5 Nautilus 2nd SKU has a leakage voltage at GPP_D0 in S5 state. We need to set this to LOW when entering S5 for clear the leakage. BUG=None BRANCH=poppy TEST=Verified the leakage is gone after update coreboot Change-Id: I054e707b2bc2e63d6f99cd2fd8a57be20615f111 Signed-off-by: Seunghwan Kim <sh_.kim(a)samsung.com> --- M src/mainboard/google/poppy/variants/nautilus/Makefile.inc A src/mainboard/google/poppy/variants/nautilus/smihandler.c 2 files changed, 30 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/27148/1 diff --git a/src/mainboard/google/poppy/variants/nautilus/Makefile.inc b/src/mainboard/google/poppy/variants/nautilus/Makefile.inc index 2167282..dba5ca6 100644 --- a/src/mainboard/google/poppy/variants/nautilus/Makefile.inc +++ b/src/mainboard/google/poppy/variants/nautilus/Makefile.inc @@ -10,3 +10,5 @@ ramstage-y += gpio.c ramstage-y += nhlt.c ramstage-y += mainboard.c + +smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c diff --git a/src/mainboard/google/poppy/variants/nautilus/smihandler.c b/src/mainboard/google/poppy/variants/nautilus/smihandler.c new file mode 100644 index 0000000..0a05064 --- /dev/null +++ b/src/mainboard/google/poppy/variants/nautilus/smihandler.c @@ -0,0 +1,28 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2018 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <arch/acpi.h> +#include <baseboard/variants.h> +#include "gpio.h" + +#define LTE3_PWROFF_L GPP_D0 + +void variant_smi_sleep(u8 slp_typ) +{ + if (slp_typ == ACPI_S5) { + /* Turn off LTE module */ + gpio_set(LTE3_PWROFF_L, 0); + } +} -- To view, visit https://review.coreboot.org/27148 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I054e707b2bc2e63d6f99cd2fd8a57be20615f111 Gerrit-Change-Number: 27148 Gerrit-PatchSet: 1 Gerrit-Owner: Seunghwan Kim <sh_.kim(a)samsung.com>

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Change in coreboot[master]: mb/google/poppy/variant/nautilus: Configure for 2nd nautilus SKU
by Seunghwan Kim (Code Review) 17 Jun '18

17 Jun '18

Seunghwan Kim has uploaded this change for review. ( https://review.coreboot.org/27147 Change subject: mb/google/poppy/variant/nautilus: Configure for 2nd nautilus SKU ...................................................................... mb/google/poppy/variant/nautilus: Configure for 2nd nautilus SKU For supporting new SKU, we need to override GPIO table and device configuration. The board ID of 2nd SKU of nautilus is started from 9, so we would determine SKU with it. BUG=b:80052672 BRANCH=poppy TEST=emerge-nautilus coreboot Change-Id: I7242f23f47010664cc29ea86a126e63c9dd62ccd Signed-off-by: Seunghwan Kim <sh_.kim(a)samsung.com> --- M src/mainboard/google/poppy/variants/nautilus/Makefile.inc M src/mainboard/google/poppy/variants/nautilus/gpio.c A src/mainboard/google/poppy/variants/nautilus/include/variant/sku.h A src/mainboard/google/poppy/variants/nautilus/mainboard.c 4 files changed, 121 insertions(+), 10 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/47/27147/1 diff --git a/src/mainboard/google/poppy/variants/nautilus/Makefile.inc b/src/mainboard/google/poppy/variants/nautilus/Makefile.inc index a4f4165..2167282 100644 --- a/src/mainboard/google/poppy/variants/nautilus/Makefile.inc +++ b/src/mainboard/google/poppy/variants/nautilus/Makefile.inc @@ -9,3 +9,4 @@ ramstage-y += gpio.c ramstage-y += nhlt.c +ramstage-y += mainboard.c diff --git a/src/mainboard/google/poppy/variants/nautilus/gpio.c b/src/mainboard/google/poppy/variants/nautilus/gpio.c index b4db7ee..b496651 100644 --- a/src/mainboard/google/poppy/variants/nautilus/gpio.c +++ b/src/mainboard/google/poppy/variants/nautilus/gpio.c @@ -16,6 +16,7 @@ #include <baseboard/gpio.h> #include <baseboard/variants.h> #include <commonlib/helpers.h> +#include <variant/sku.h> /* Pad configuration in ramstage */ /* Leave eSPI pins untouched from default settings */ @@ -49,8 +50,6 @@ PAD_CFG_NF(GPP_A16, NONE, DEEP, NF1), /* A17 : SD_PWR_EN# ==> CPU1_SDCARD_PWREN_L */ PAD_CFG_NF(GPP_A17, NONE, DEEP, NF1), - /* A18 : ISH_GP0 ==> NC */ - PAD_CFG_NC(GPP_A18), /* A19 : ISH_GP1 ==> NC */ PAD_CFG_NC(GPP_A19), /* A20 : ISH_GP2 ==> NC */ @@ -102,8 +101,8 @@ PAD_CFG_NC(GPP_B18), /* B19 : GSPI1_CS# ==> CHP3_PEN_EJECT - for notification */ PAD_CFG_GPI_GPIO_DRIVER(GPP_B19, NONE, DEEP), - /* B20 : GSPI1_CLK ==> NC */ - PAD_CFG_NC(GPP_B20), + /* B20 : GSPI1_CLK ==> LTE3_STRAP# - for SAR sensor presence */ + PAD_CFG_GPI(GPP_B20, 20K_PD, DEEP), /* B21 : GSPI1_MISO ==> CHP3_PEN_EJECT - for wake event */ PAD_CFG_GPI_ACPI_SCI(GPP_B21, NONE, DEEP, NONE), /* B22 : GSPI1_MOSI ==> NC */ @@ -160,8 +159,6 @@ /* C23 : UART2_CTS# ==> CHP3_PCH_WP*/ PAD_CFG_GPI(GPP_C23, 20K_PU, DEEP), - /* D0 : SPI1_CS# ==> NC */ - PAD_CFG_NC(GPP_D0), /* D1 : SPI1_CLK ==> NC */ PAD_CFG_NC(GPP_D1), /* D2 : SPI1_MISO ==> NC */ @@ -192,8 +189,6 @@ PAD_CFG_NC(GPP_D14), /* D15 : ISH_UART0_RTS# ==> NC */ PAD_CFG_NC(GPP_D15), - /* D16 : ISH_UART0_CTS# ==> NC */ - PAD_CFG_NC(GPP_D16), /* D17 : DMIC_CLK1 */ PAD_CFG_NF(GPP_D17, NONE, DEEP, NF1), /* D18 : DMIC_DATA1 */ @@ -202,8 +197,6 @@ PAD_CFG_NF(GPP_D19, NONE, DEEP, NF1), /* D20 : DMIC_DATA0 */ PAD_CFG_NF(GPP_D20, NONE, DEEP, NF1), - /* D21 : SPI1_IO2 ==> NC */ - PAD_CFG_NC(GPP_D21), /* D22 : SPI1_IO3 ==> CHP1_BOOT_BEEP_OVERRIDE */ PAD_CFG_GPO(GPP_D22, 1, DEEP), /* D23 : I2S_MCLK ==> CHP1_I2S_MCLK */ @@ -382,3 +375,42 @@ *num = ARRAY_SIZE(early_gpio_table); return early_gpio_table; } + +static const struct pad_config nautilus_default_sku_gpio_table[] = { + /* A18 : ISH_GP0 ==> NC */ + PAD_CFG_NC(GPP_A18), + /* D0 : SPI1_CS# ==> NC */ + PAD_CFG_NC(GPP_D0), + /* D16 : ISH_UART0_CTS# ==> NC */ + PAD_CFG_NC(GPP_D16), + /* D21 : SPI1_IO2 ==> NC */ + PAD_CFG_NC(GPP_D21), +}; + +static const struct pad_config lte_sku_gpio_table[] = { + /* A18 : ISH_GP0 ==> LTE1_P_SENSOR_INT_L */ + PAD_CFG_GPI_APIC(GPP_A18, NONE, DEEP), + /* D0 : SPI1_CS# ==> LTE_PWROFF# */ + PAD_CFG_GPO(GPP_D0, 1, DEEP), + /* D16 : ISH_UART0_CTS# ==> LTE3_W_DISABLE# */ + PAD_CFG_GPO(GPP_D16, 1, DEEP), + /* D21 : SPI1_IO2 ==> LTE3_BODY_SAR */ + PAD_CFG_GPO(GPP_D21, 0, DEEP), +}; + +const struct pad_config *variant_sku_gpio_table(size_t *num) +{ + uint32_t sku_id = variant_board_sku(); + const struct pad_config *board_gpio_tables; + switch (sku_id) { + case SKU_1_NAUTILUS_LTE: + *num = ARRAY_SIZE(lte_sku_gpio_table); + board_gpio_tables = lte_sku_gpio_table; + break; + default: + *num = ARRAY_SIZE(nautilus_default_sku_gpio_table); + board_gpio_tables = nautilus_default_sku_gpio_table; + break; + } + return board_gpio_tables; +} diff --git a/src/mainboard/google/poppy/variants/nautilus/include/variant/sku.h b/src/mainboard/google/poppy/variants/nautilus/include/variant/sku.h new file mode 100644 index 0000000..c101451 --- /dev/null +++ b/src/mainboard/google/poppy/variants/nautilus/include/variant/sku.h @@ -0,0 +1,23 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2018 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __MAINBOARD_SKU_H__ +#define __MAINBOARD_SKU_H__ + +#define SKU_UNKNOWN 0xFFFFFFFF +#define SKU_0_NAUTILUS 0x0000 +#define SKU_1_NAUTILUS_LTE 0x0001 + +#endif /* __MAINBOARD_SKU_H__ */ diff --git a/src/mainboard/google/poppy/variants/nautilus/mainboard.c b/src/mainboard/google/poppy/variants/nautilus/mainboard.c new file mode 100644 index 0000000..12d16db --- /dev/null +++ b/src/mainboard/google/poppy/variants/nautilus/mainboard.c @@ -0,0 +1,55 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2018 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <boardid.h> +#include <baseboard/variants.h> +#include <chip.h> +#include <device/device.h> +#include <variant/sku.h> + +uint32_t variant_board_sku(void) +{ + static uint32_t sku_id = SKU_UNKNOWN; + + if (sku_id != SKU_UNKNOWN) + return sku_id; + + if (board_id() < 9) + sku_id = SKU_0_NAUTILUS; + else + sku_id = SKU_1_NAUTILUS_LTE; + + return sku_id; +} + +/* Override dev tree settings per board */ +void variant_devtree_update(void) +{ + uint32_t sku_id = variant_board_sku(); + struct device *root = SA_DEV_ROOT; + config_t *cfg = root->chip_info; + + switch (sku_id) { + case SKU_1_NAUTILUS_LTE: + /* Configure LTE module - USB3_PORT_CONFIG(OC_SKIP) */ + cfg->usb3_ports[3].enable = 1; + cfg->usb3_ports[3].ocpin = OC_SKIP; + cfg->usb3_ports[3].tx_de_emp = 0x29; + cfg->usb3_ports[3].tx_downscale_amp = 0x00; + break; + default: + break; + } +} -- To view, visit https://review.coreboot.org/27147 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I7242f23f47010664cc29ea86a126e63c9dd62ccd Gerrit-Change-Number: 27147 Gerrit-PatchSet: 1 Gerrit-Owner: Seunghwan Kim <sh_.kim(a)samsung.com>

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Change in libgfxinit[master]: gfx_test: Refactor to allow Restrictions (No_Elaboration_Code)
by Nico Huber (Code Review) 17 Jun '18

17 Jun '18

Nico Huber has uploaded this change for review. ( https://review.coreboot.org/27146 Change subject: gfx_test: Refactor to allow Restrictions (No_Elaboration_Code) ...................................................................... gfx_test: Refactor to allow Restrictions (No_Elaboration_Code) Move the `Ada.Numerics.Discrete_Random.Generator` into the Main() procedure. Change-Id: I63c72501fd7d49574042fc5a459d6751a776a1f1 Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M gfxtest/hw-gfx-gma-gfx_test.adb 1 file changed, 31 insertions(+), 25 deletions(-) git pull ssh://review.coreboot.org:29418/libgfxinit refs/changes/46/27146/1 diff --git a/gfxtest/hw-gfx-gma-gfx_test.adb b/gfxtest/hw-gfx-gma-gfx_test.adb index 736b93d..fc1868f 100644 --- a/gfxtest/hw-gfx-gma-gfx_test.adb +++ b/gfxtest/hw-gfx-gma-gfx_test.adb @@ -20,8 +20,8 @@ Seed : constant := 12345; package Rand_P is new Ada.Numerics.Discrete_Random (Natural); - Gen : Rand_P.Generator; - function Rand return Int32 is (Int32 (Rand_P.Random (Gen))); + function Rand (Gen : Rand_P.Generator) + return Int32 is (Int32 (Rand_P.Random (Gen))); Start_X : constant := 0; Start_Y : constant := 0; @@ -341,7 +341,7 @@ Pipes : GMA.Pipe_Configs; - procedure Prepare_Configs (Rotation : Rotation_Type) + procedure Prepare_Configs (Rotation : Rotation_Type; Gen : Rand_P.Generator) is use type HW.GFX.GMA.Port_Type; @@ -366,7 +366,7 @@ end if; end if; Prepare_Cursors (Cursors (Pipe), Offset); - Pipes (Pipe).Cursor := Cursors (Pipe) (Cursor_Size'Val (Rand mod 3)); + Pipes (Pipe).Cursor := Cursors (Pipe) (Cursor_Size'Val (Rand (Gen) mod 3)); end loop; GMA.Dump_Configs (Pipes); @@ -427,18 +427,14 @@ Color : Pipe_Index; Size : Cursor_Size; end record; - function Cursor_Rand return Int32 is (Rand mod 51 - 25); - Cursor_Infos : array (Pipe_Index) of Cursor_Info := - (others => - (Color => Pipe_Index'Val (Rand mod 3), - Size => Cursor_Size'Val (Rand mod 3), - X_Velo => 3 * Cursor_Rand, - Y_Velo => 3 * Cursor_Rand, - others => Cursor_Rand)); + function Cursor_Rand (Gen : Rand_P.Generator) + return Int32 is (Rand (Gen) mod 51 - 25); + Cursor_Infos : array (Pipe_Index) of Cursor_Info; procedure Move_Cursors (Pipes : in out GMA.Pipe_Configs; - Time_MS : in Natural) + Time_MS : in Natural; + Gen : in Rand_P.Generator) is procedure Select_New_Cursor (P : in Pipe_Index; @@ -448,12 +444,12 @@ Old_C : constant Cursor_Type := C; begin -- change either size or color - if Rand mod 2 = 0 then + if Rand (Gen) mod 2 = 0 then CI.Color := Pipe_Index'Val - ((Pipe_Index'Pos (CI.Color) + 1 + Rand mod 2) mod 3); + ((Pipe_Index'Pos (CI.Color) + 1 + Rand (Gen) mod 2) mod 3); else CI.Size := Cursor_Size'Val - ((Cursor_Size'Pos (CI.Size) + 1 + Rand mod 2) mod 3); + ((Cursor_Size'Pos (CI.Size) + 1 + Rand (Gen) mod 2) mod 3); end if; C := Cursors (CI.Color) (CI.Size); C.Center_X := Old_C.Center_X; @@ -482,8 +478,8 @@ Update : Boolean := False; begin if Cnt mod 16 = 0 then - CI.X_Acc := Cursor_Rand; - CI.Y_Acc := Cursor_Rand; + CI.X_Acc := Cursor_Rand (Gen); + CI.Y_Acc := Cursor_Rand (Gen); end if; CI.X_Velo := CI.X_Velo + CI.X_Acc; CI.Y_Velo := CI.Y_Velo + CI.Y_Acc; @@ -537,6 +533,8 @@ Dev_Init, Initialized : Boolean; + Gen : Rand_P.Generator; + function iopl (level : Interfaces.C.int) return Interfaces.C.int; pragma Import (C, iopl, "iopl"); begin @@ -584,7 +582,7 @@ if Initialized then Backup_GTT; - Prepare_Configs (Rotation); + Prepare_Configs (Rotation, Gen); GMA.Update_Outputs (Pipes); @@ -600,6 +598,14 @@ end loop; end loop; + Cursor_Infos := + (others => + (Color => Pipe_Index'Val (Rand (Gen) mod 3), + Size => Cursor_Size'Val (Rand (Gen) mod 3), + X_Velo => 3 * Cursor_Rand (Gen), + Y_Velo => 3 * Cursor_Rand (Gen), + others => Cursor_Rand (Gen))); + if Delay_MS < Primary_Delay_MS + Secondary_Delay_MS then Script_Cursors (Pipes, Delay_MS); else -- getting bored? @@ -609,10 +615,10 @@ New_Pipes : GMA.Pipe_Configs := Pipes; function Rand_Div (Num : Position_Type) return Position_Type is - (case Rand mod 4 is - when 3 => Rand mod Num / 3, - when 2 => Rand mod Num / 2, - when 1 => Rand mod Num, + (case Rand (Gen) mod 4 is + when 3 => Rand (Gen) mod Num / 3, + when 2 => Rand (Gen) mod Num / 2, + when 1 => Rand (Gen) mod Num, when others => 0); begin Rand_P.Reset (Gen, Seed); @@ -645,10 +651,10 @@ end loop; GMA.Dump_Configs (New_Pipes); GMA.Update_Outputs (New_Pipes); - Move_Cursors (New_Pipes, Secondary_Delay_MS); + Move_Cursors (New_Pipes, Secondary_Delay_MS, Gen); Delay_MS := Delay_MS - Secondary_Delay_MS; end loop; - Move_Cursors (New_Pipes, Delay_MS); + Move_Cursors (New_Pipes, Delay_MS, Gen); end; end if; -- To view, visit https://review.coreboot.org/27146 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: libgfxinit Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I63c72501fd7d49574042fc5a459d6751a776a1f1 Gerrit-Change-Number: 27146 Gerrit-PatchSet: 1 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de>

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coreboot-gerrit June 2018