coreboot-gerrit June 2018

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Change in coreboot[master]: soc/intel/skylake: Improve Kconfig
by Arthur Heymans (Code Review) 17 Jun '18

17 Jun '18

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/27141 Change subject: soc/intel/skylake: Improve Kconfig ...................................................................... soc/intel/skylake: Improve Kconfig Kabylake always uses FSP2.0 so this should not be an option for mainboards. SKIP_FSP_CAR is only meaningful for FSP1.1. FSP_CAR is only meaningful for FSP2.0. Change-Id: I3868b7688322cc7c0099058fc64106468aa82c32 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/mainboard/google/eve/Kconfig M src/mainboard/google/fizz/Kconfig M src/mainboard/google/poppy/Kconfig M src/soc/intel/skylake/Kconfig 4 files changed, 6 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/27141/1 diff --git a/src/mainboard/google/eve/Kconfig b/src/mainboard/google/eve/Kconfig index 9205651..0c740da 100644 --- a/src/mainboard/google/eve/Kconfig +++ b/src/mainboard/google/eve/Kconfig @@ -18,7 +18,6 @@ select MAINBOARD_HAS_CHROMEOS select MAINBOARD_HAS_I2C_TPM_CR50 select MAINBOARD_HAS_TPM2 - select MAINBOARD_USES_FSP2_0 select SOC_INTEL_KABYLAKE config VBOOT diff --git a/src/mainboard/google/fizz/Kconfig b/src/mainboard/google/fizz/Kconfig index 7b3ba45..a26aa30 100644 --- a/src/mainboard/google/fizz/Kconfig +++ b/src/mainboard/google/fizz/Kconfig @@ -13,7 +13,6 @@ select HAVE_ACPI_RESUME select HAVE_ACPI_TABLES select MAINBOARD_HAS_CHROMEOS - select MAINBOARD_USES_FSP2_0 select NO_FADT_8042 select SOC_INTEL_KABYLAKE select MAINBOARD_HAS_SPI_TPM_CR50 diff --git a/src/mainboard/google/poppy/Kconfig b/src/mainboard/google/poppy/Kconfig index 2d9c187..66d2212 100644 --- a/src/mainboard/google/poppy/Kconfig +++ b/src/mainboard/google/poppy/Kconfig @@ -11,7 +11,6 @@ select HAVE_ACPI_RESUME select HAVE_ACPI_TABLES select MAINBOARD_HAS_CHROMEOS - select MAINBOARD_USES_FSP2_0 select SOC_INTEL_KABYLAKE select MAINBOARD_HAS_TPM2 diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig index 3e0158b..7f84023 100644 --- a/src/soc/intel/skylake/Kconfig +++ b/src/soc/intel/skylake/Kconfig @@ -78,6 +78,7 @@ config MAINBOARD_USES_FSP2_0 bool default n + default y if SOC_INTEL_KABYLAKE config USE_FSP2_0_DRIVER def_bool y @@ -269,6 +270,8 @@ help Include DSP firmware settings for DA7219 headset codec. +if USE_FSP2_0_DRIVER + choice prompt "Cache-as-ram implementation" default USE_SKYLAKE_CAR_NEM_ENHANCED @@ -295,9 +298,12 @@ endchoice +endif + config SKIP_FSP_CAR bool "Skip cache as RAM setup in FSP" default y + depends on USE_FSP1_1_DRIVER help Skip Cache as RAM setup in FSP. -- To view, visit https://review.coreboot.org/27141 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I3868b7688322cc7c0099058fc64106468aa82c32 Gerrit-Change-Number: 27141 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>

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Change in coreboot[master]: soc/intel/baytrail: Fix Kconfig for mrc.bin inclusion
by build bot (Jenkins) (Code Review) 17 Jun '18

17 Jun '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/27140 ) Change subject: soc/intel/baytrail: Fix Kconfig for mrc.bin inclusion ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/29125/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/75031/ : SUCCESS -- To view, visit https://review.coreboot.org/27140 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I2e151a66abc6dab710abdbb92c0c28884d88912e Gerrit-Change-Number: 27140 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 17 Jun 2018 19:44:34 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: soc/intel/baytrail: Fix Kconfig for mrc.bin inclusion
by Arthur Heymans (Code Review) 17 Jun '18

17 Jun '18

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/27140 Change subject: soc/intel/baytrail: Fix Kconfig for mrc.bin inclusion ...................................................................... soc/intel/baytrail: Fix Kconfig for mrc.bin inclusion Is used the sandybridge systemagent binary and mentioned that in the help text which is simply wrong and won't work. This copies the nb/intel/haswell/Kconfig to not include an mrc.bin by default. Change-Id: I2e151a66abc6dab710abdbb92c0c28884d88912e Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/soc/intel/baytrail/Kconfig 1 file changed, 8 insertions(+), 12 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/27140/1 diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig index 1f7e21e..b4dc823 100644 --- a/src/soc/intel/baytrail/Kconfig +++ b/src/soc/intel/baytrail/Kconfig @@ -67,22 +67,20 @@ default 0x100000 config HAVE_MRC - bool "Add a Memory Reference Code binary" - default y + bool "Add a System Agent binary" help - Select this option to add a blob containing - memory reference code. + Select this option to add a System Agent binary to + the resulting coreboot image. + Note: Without this binary coreboot will not work -if HAVE_MRC - config MRC_FILE - string "Intel memory refeference code path and filename" - default "3rdparty/blobs/northbridge/intel/sandybridge/systemagent-r6.bin" + string "Intel System Agent path and filename" + depends on HAVE_MRC + default "mrc.bin" help The path and filename of the file to use as System Agent - binary. Note that this points to the sandybridge binary file - which is will not work, but it serves its purpose to do builds. + binary. config MRC_BIN_ADDRESS hex @@ -92,8 +90,6 @@ bool "Enable MRC RMT training + debug prints" default n -endif # HAVE_MRC - # Cache As RAM region layout: # # +-------------+ DCACHE_RAM_BASE + DCACHE_RAM_SIZE + DCACHE_RAM_MRC_VAR_SIZE -- To view, visit https://review.coreboot.org/27140 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I2e151a66abc6dab710abdbb92c0c28884d88912e Gerrit-Change-Number: 27140 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>

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Change in libgfxinit[master]: gma: Implement automatic CPU detection
by Nico Huber (Code Review) 17 Jun '18

17 Jun '18

Nico Huber has uploaded a new patch set (#2). ( https://review.coreboot.org/27138 ) Change subject: gma: Implement automatic CPU detection ...................................................................... gma: Implement automatic CPU detection In dynamic CPU configurations, Config.Detect_CPU() sets the CPU variables according to the given PCI device id. In static confi- gurations it does nothing. We update the default configs to make use of this feature where applicable. This should still give us full build-test coverage while cutting the amount of tests in half. Change-Id: I8ce31c867f97c8d6ef99ca096cb45f7719e78a19 Signed-off-by: Nico Huber <nico.h(a)gmx.de> --- M common/Makefile.inc A common/dyncpu/hw-gfx-gma-config.adb M common/hw-gfx-gma-config.ads.template M common/hw-gfx-gma.adb D configs/broadwell D configs/broadwell_ult M configs/broxton M configs/g45 M configs/haswell D configs/haswell_ult M configs/ironlake R configs/ironlake_edp D configs/ivybridge_lvds D configs/sandybridge M configs/skylake D configs/skylake_ult 16 files changed, 62 insertions(+), 63 deletions(-) git pull ssh://review.coreboot.org:29418/libgfxinit refs/changes/38/27138/2 -- To view, visit https://review.coreboot.org/27138 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: libgfxinit Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I8ce31c867f97c8d6ef99ca096cb45f7719e78a19 Gerrit-Change-Number: 27138 Gerrit-PatchSet: 2 Gerrit-Owner: Nico Huber <nico.h(a)gmx.de>

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Change in coreboot[master]: src/cpu/intel: Add model_f6x
by build bot (Jenkins) (Code Review) 17 Jun '18

17 Jun '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25565 ) Change subject: src/cpu/intel: Add model_f6x ...................................................................... Patch Set 7: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/29122/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/75028/ : SUCCESS -- To view, visit https://review.coreboot.org/25565 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I6003ec0f4d4245ce5fc9c1f38e555bfcfa1c22b5 Gerrit-Change-Number: 25565 Gerrit-PatchSet: 7 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Sun, 17 Jun 2018 16:46:25 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: cpu/intel/speedstep/acpi.c: Add Netburst CPUs
by build bot (Jenkins) (Code Review) 17 Jun '18

17 Jun '18

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Change in coreboot[master]: src/cpu/intel/model_f4x: Update cpu_table
by build bot (Jenkins) (Code Review) 17 Jun '18

17 Jun '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/17409 ) Change subject: src/cpu/intel/model_f4x: Update cpu_table ...................................................................... Patch Set 3: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/29123/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/75029/ : SUCCESS -- To view, visit https://review.coreboot.org/17409 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I285ad33804592e3df510d61dd24f14f944e05142 Gerrit-Change-Number: 17409 Gerrit-PatchSet: 3 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 17 Jun 2018 16:40:27 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: cpu/intel/speedstep/acpi.c: Add Netburst CPUs
by build bot (Jenkins) (Code Review) 17 Jun '18

17 Jun '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/22604 ) Change subject: cpu/intel/speedstep/acpi.c: Add Netburst CPUs ...................................................................... Patch Set 11: (13 comments) https://review.coreboot.org/#/c/22604/11/src/cpu/intel/speedstep/acpi.c File src/cpu/intel/speedstep/acpi.c: https://review.coreboot.org/#/c/22604/11/src/cpu/intel/speedstep/acpi.c@68 PS11, Line 68: if ( c.x86_model ==2) spaces required around that '==' (ctx:WxV) https://review.coreboot.org/#/c/22604/11/src/cpu/intel/speedstep/acpi.c@68 PS11, Line 68: if ( c.x86_model ==2) space prohibited after that open parenthesis '(' https://review.coreboot.org/#/c/22604/11/src/cpu/intel/speedstep/acpi.c@92 PS11, Line 92: else else is not generally useful after a break or return https://review.coreboot.org/#/c/22604/11/src/cpu/intel/speedstep/speedstep.c File src/cpu/intel/speedstep/speedstep.c: https://review.coreboot.org/#/c/22604/11/src/cpu/intel/speedstep/speedstep.… PS11, Line 45: if (((rdmsr(MSR_EXTENDED_CONFIG).lo >> 27) & 3) == 3) {/*supported and line over 80 characters https://review.coreboot.org/#/c/22604/11/src/cpu/intel/speedstep/speedstep.… PS11, Line 46: enabled bits */ line over 80 characters https://review.coreboot.org/#/c/22604/11/src/cpu/intel/speedstep/speedstep.… PS11, Line 48: params->slfm = SPEEDSTEP_STATE_FROM_MSR(msr.lo, state_mask); line over 80 characters https://review.coreboot.org/#/c/22604/11/src/cpu/intel/speedstep/speedstep.… PS11, Line 52: } code indent should use tabs where possible https://review.coreboot.org/#/c/22604/11/src/cpu/intel/speedstep/speedstep.… PS11, Line 52: } please, no spaces at the start of a line https://review.coreboot.org/#/c/22604/11/src/cpu/intel/speedstep/speedstep.… PS11, Line 73: if (!(((cpuid_eax(1) >> 8) & 0xf) == 0xf)) { suspect code indent for conditional statements (8, 8) https://review.coreboot.org/#/c/22604/11/src/cpu/intel/speedstep/speedstep.… PS11, Line 77: !(rdmsr(IA32_MISC_ENABLES).hi & (1 << (38 - 32)))) { line over 80 characters https://review.coreboot.org/#/c/22604/11/src/cpu/intel/speedstep/speedstep.… PS11, Line 79: params->turbo = SPEEDSTEP_STATE_FROM_MSR(msr.hi, state_mask); line over 80 characters https://review.coreboot.org/#/c/22604/11/src/cpu/intel/speedstep/speedstep.… PS11, Line 82: } code indent should use tabs where possible https://review.coreboot.org/#/c/22604/11/src/cpu/intel/speedstep/speedstep.… PS11, Line 82: } please, no spaces at the start of a line -- To view, visit https://review.coreboot.org/22604 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I06e162d3260dedeb3b16583460633507fbcbd52a Gerrit-Change-Number: 22604 Gerrit-PatchSet: 11 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 17 Jun 2018 16:39:51 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

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Change in coreboot[master]: src/cpu/intel: Add model_f6x
by build bot (Jenkins) (Code Review) 17 Jun '18

17 Jun '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25565 ) Change subject: src/cpu/intel: Add model_f6x ...................................................................... Patch Set 6: Verified-1 Build Failed https://qa.coreboot.org/job/coreboot-gerrit/75027/ : ABORTED https://qa.coreboot.org/job/coreboot-checkpatch/29121/ : SUCCESS -- To view, visit https://review.coreboot.org/25565 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I6003ec0f4d4245ce5fc9c1f38e555bfcfa1c22b5 Gerrit-Change-Number: 25565 Gerrit-PatchSet: 6 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Sun, 17 Jun 2018 16:37:41 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: src/cpu/intel/model_f4x: Update cpu_table
by build bot (Jenkins) (Code Review) 17 Jun '18

17 Jun '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/17409 ) Change subject: src/cpu/intel/model_f4x: Update cpu_table ...................................................................... Patch Set 2: Verified-1 Build Failed https://qa.coreboot.org/job/coreboot-gerrit/75026/ : FAILURE -- To view, visit https://review.coreboot.org/17409 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I285ad33804592e3df510d61dd24f14f944e05142 Gerrit-Change-Number: 17409 Gerrit-PatchSet: 2 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 17 Jun 2018 16:33:45 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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coreboot-gerrit June 2018