coreboot-gerrit March 2018

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Change in coreboot[master]: mb/google/octopus: Configure GPIO_199 as native
by Hannah Williams (Code Review) 20 Mar '18

20 Mar '18

Hannah Williams has uploaded this change for review. ( https://review.coreboot.org/25294 Change subject: mb/google/octopus: Configure GPIO_199 as native ...................................................................... mb/google/octopus: Configure GPIO_199 as native for EMMC0_CLK_FB Change-Id: I09d5ed8ddf547d190824e2fba01050312077af7c Signed-off-by: Hannah Williams <hannah.williams(a)intel.com> --- M src/mainboard/google/octopus/variants/baseboard/gpio.c 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/94/25294/1 diff --git a/src/mainboard/google/octopus/variants/baseboard/gpio.c b/src/mainboard/google/octopus/variants/baseboard/gpio.c index 1570223..e7fcd7d 100644 --- a/src/mainboard/google/octopus/variants/baseboard/gpio.c +++ b/src/mainboard/google/octopus/variants/baseboard/gpio.c @@ -242,6 +242,7 @@ PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_194, UP_20K, DEEP, NF1), /* CNV_RGI_RSP */ PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_195, NONE, DEEP, NF1), /* CNV_RF_RESET_B */ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_198, DN_20K, DEEP, NF1, HIZCRx0, ENPU), /* EMMC0_CLK */ + PAD_CFG_NF(GPIO_199, DN_20K, DEEP, NF1),/*EMMC0_CLK_FB*/ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_200, UP_20K, DEEP, NF1, HIZCRx1, ENPU), /* EMMC0_D0 */ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_201, UP_20K, DEEP, NF1, HIZCRx1, ENPU), /* EMMC0_D1 */ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_202, UP_20K, DEEP, NF1, HIZCRx1, ENPU), /* EMMC0_D2 */ -- To view, visit https://review.coreboot.org/25294 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I09d5ed8ddf547d190824e2fba01050312077af7c Gerrit-Change-Number: 25294 Gerrit-PatchSet: 1 Gerrit-Owner: Hannah Williams <hannah.williams(a)intel.com>

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Change in coreboot[master]: mainboard/hp: Add Elitebook Folio 9470m
by build bot (Jenkins) (Code Review) 20 Mar '18

20 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25218 ) Change subject: mainboard/hp: Add Elitebook Folio 9470m ...................................................................... Patch Set 4: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/23184/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/68801/ : SUCCESS -- To view, visit https://review.coreboot.org/25218 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I52e549ec18e8aa661a506a16dbc7f83417c0da78 Gerrit-Change-Number: 25218 Gerrit-PatchSet: 4 Gerrit-Owner: Bill XIE <persmule(a)gmail.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 20 Mar 2018 06:36:36 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: intel/fsp: Update Cannonlake FSP header
by Caveh Jalali (Code Review) 20 Mar '18

20 Mar '18

Caveh Jalali has posted comments on this change. ( https://review.coreboot.org/25289 ) Change subject: intel/fsp: Update Cannonlake FSP header ...................................................................... Patch Set 1: Code-Review+2 verified on P0 board. -- To view, visit https://review.coreboot.org/25289 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ie794960f0253b2a6dbd55ffda973756d15e35c01 Gerrit-Change-Number: 25289 Gerrit-PatchSet: 1 Gerrit-Owner: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 20 Mar 2018 05:34:39 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: soc/intel/common/block/gspi: move SPI to GSPI mapping to common
by build bot (Jenkins) (Code Review) 20 Mar '18

20 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25087 ) Change subject: soc/intel/common/block/gspi: move SPI to GSPI mapping to common ...................................................................... Patch Set 3: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/68800/ : SUCCESS -- To view, visit https://review.coreboot.org/25087 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I175ca6eab369276c693c78acc4d8ac9cd49ad152 Gerrit-Change-Number: 25087 Gerrit-PatchSet: 3 Gerrit-Owner: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 20 Mar 2018 04:20:47 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: mb/google/kahlee: Add register address mapping for FCH MISC
by build bot (Jenkins) (Code Review) 20 Mar '18

20 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25263 ) Change subject: mb/google/kahlee: Add register address mapping for FCH MISC ...................................................................... Patch Set 3: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/23183/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/68799/ : SUCCESS -- To view, visit https://review.coreboot.org/25263 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ia553e55ffb358415067000d2d2d2744322d1c4db Gerrit-Change-Number: 25263 Gerrit-PatchSet: 3 Gerrit-Owner: Akshu Agrawal <akshu.agrawal(a)amd.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Akshu Agrawal <akshu.agrawal(a)amd.com> Gerrit-Reviewer: Daniel Kurtz <djkurtz(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Tue, 20 Mar 2018 03:46:20 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: mainboard/intel/cannonlake_rvp: Enable S0ix
by build bot (Jenkins) (Code Review) 20 Mar '18

20 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25293 ) Change subject: mainboard/intel/cannonlake_rvp: Enable S0ix ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/23182/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/68798/ : SUCCESS -- To view, visit https://review.coreboot.org/25293 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I38662dc7203366bdee5f1c7aaa18979867a79ba1 Gerrit-Change-Number: 25293 Gerrit-PatchSet: 1 Gerrit-Owner: Vaibhav Shankar <vaibhav.shankar(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 20 Mar 2018 02:14:23 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: soc/intel/cannonlake: Enable low power S0 Idle capability
by build bot (Jenkins) (Code Review) 20 Mar '18

20 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25292 ) Change subject: soc/intel/cannonlake: Enable low power S0 Idle capability ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/23181/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/68797/ : SUCCESS -- To view, visit https://review.coreboot.org/25292 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I6214ebb61f25ef8b704e60c8474808493c92e6f6 Gerrit-Change-Number: 25292 Gerrit-PatchSet: 1 Gerrit-Owner: Vaibhav Shankar <vaibhav.shankar(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 20 Mar 2018 02:13:41 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: mainboard/intel/cannonlake_rvp: Enable S0ix
by Vaibhav Shankar (Code Review) 20 Mar '18

20 Mar '18

Vaibhav Shankar has uploaded this change for review. ( https://review.coreboot.org/25293 Change subject: mainboard/intel/cannonlake_rvp: Enable S0ix ...................................................................... mainboard/intel/cannonlake_rvp: Enable S0ix This patch enables S0ix from the devicetree. Change-Id: I38662dc7203366bdee5f1c7aaa18979867a79ba1 Signed-off-by: Vaibhav Shankar <vaibhav.shankar(a)intel.com> --- M src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb M src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb 2 files changed, 6 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/25293/1 diff --git a/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb b/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb index 3e60ed9..18aa65d 100644 --- a/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb +++ b/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb @@ -70,6 +70,9 @@ # GPIO for SD card detect register "sdcard_cd_gpio" = "GPP_G5" + # Enable S0ix + register "s0ix_enable" = "1" + # Audio register "i2c[3]" = "{ .speed = I2C_SPEED_STANDARD, diff --git a/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb b/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb index 8502048..6dd1893 100644 --- a/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb +++ b/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb @@ -68,6 +68,9 @@ # GPIO for SD card detect register "sdcard_cd_gpio" = "GPP_G5" + # Enable S0ix + register "s0ix_enable" = "1" + device domain 0 on device pci 00.0 on end # Host Bridge device pci 02.0 on end # Integrated Graphics Device -- To view, visit https://review.coreboot.org/25293 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I38662dc7203366bdee5f1c7aaa18979867a79ba1 Gerrit-Change-Number: 25293 Gerrit-PatchSet: 1 Gerrit-Owner: Vaibhav Shankar <vaibhav.shankar(a)intel.com>

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Change in coreboot[master]: soc/intel/cannonlake: Enable low power S0 Idle capability
by Vaibhav Shankar (Code Review) 20 Mar '18

20 Mar '18

Vaibhav Shankar has uploaded this change for review. ( https://review.coreboot.org/25292 Change subject: soc/intel/cannonlake: Enable low power S0 Idle capability ...................................................................... soc/intel/cannonlake: Enable low power S0 Idle capability This patch sets the ACPI FADT flag ACPI_FADT_LOW_POWER_S0 if S0ix is enabled for the platform. TEST= Boot to OS and check the ACPI_FADT_LOW_PWR_IDLE_S0 flag is set in FACP table - FADT.Flags[21] bit. Change-Id: I6214ebb61f25ef8b704e60c8474808493c92e6f6 Signed-off-by: Vaibhav Shankar <vaibhav.shankar(a)intel.com> --- M src/soc/intel/cannonlake/acpi.c 1 file changed, 3 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/25292/1 diff --git a/src/soc/intel/cannonlake/acpi.c b/src/soc/intel/cannonlake/acpi.c index 9dcaa33..0134b86 100644 --- a/src/soc/intel/cannonlake/acpi.c +++ b/src/soc/intel/cannonlake/acpi.c @@ -187,6 +187,9 @@ fadt->x_pm_tmr_blk.resv = 0; fadt->x_pm_tmr_blk.addrl = pmbase + PM1_TMR; fadt->x_pm_tmr_blk.addrh = 0x0; + + if(config->s0ix_enable) + fadt->flags |= ACPI_FADT_LOW_PWR_IDLE_S0; } uint32_t soc_read_sci_irq_select(void) { -- To view, visit https://review.coreboot.org/25292 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I6214ebb61f25ef8b704e60c8474808493c92e6f6 Gerrit-Change-Number: 25292 Gerrit-PatchSet: 1 Gerrit-Owner: Vaibhav Shankar <vaibhav.shankar(a)intel.com>

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Change in coreboot[master]: soc/intel/cannonlake_rvp: Enable low power S0 Idle capability
by build bot (Jenkins) (Code Review) 20 Mar '18

20 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25291 ) Change subject: soc/intel/cannonlake_rvp: Enable low power S0 Idle capability ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/23180/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/68796/ : SUCCESS -- To view, visit https://review.coreboot.org/25291 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I50245de95c9024b8a2fecba95772d25feba21446 Gerrit-Change-Number: 25291 Gerrit-PatchSet: 1 Gerrit-Owner: Vaibhav Shankar <vaibhav.shankar(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-Comment-Date: Tue, 20 Mar 2018 01:46:05 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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coreboot-gerrit March 2018