coreboot-gerrit March 2018

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Change in coreboot[master]: soc/intel/cannonlake_rvp: Enable low power S0 Idle capability
by Furquan Shaikh (Code Review) 20 Mar '18

20 Mar '18

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/25291 ) Change subject: soc/intel/cannonlake_rvp: Enable low power S0 Idle capability ...................................................................... Patch Set 1: Please split the patch into two patches -- SoC specific and mainboard. -- To view, visit https://review.coreboot.org/25291 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I50245de95c9024b8a2fecba95772d25feba21446 Gerrit-Change-Number: 25291 Gerrit-PatchSet: 1 Gerrit-Owner: Vaibhav Shankar <vaibhav.shankar(a)intel.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-CC: Furquan Shaikh <furquan(a)google.com> Gerrit-Comment-Date: Tue, 20 Mar 2018 01:40:00 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: soc/intel/cannonlake_rvp: Enable low power S0 Idle capability
by Vaibhav Shankar (Code Review) 20 Mar '18

20 Mar '18

Vaibhav Shankar has uploaded this change for review. ( https://review.coreboot.org/25291 Change subject: soc/intel/cannonlake_rvp: Enable low power S0 Idle capability ...................................................................... soc/intel/cannonlake_rvp: Enable low power S0 Idle capability This patch sets the ACPI FADT flag ACPI_FADT_LOW_POWER_S0 if S0ix is enabled for the platform. TEST= Boot to OS and check the ACPI_FADT_LOW_PWR_IDLE_S0 flag is set in FACP table - FADT.Flags[21] bit. Change-Id: I50245de95c9024b8a2fecba95772d25feba21446 Signed-off-by: Vaibhav Shankar <vaibhav.shankar(a)intel.com> --- M src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb M src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb M src/soc/intel/cannonlake/acpi.c 3 files changed, 9 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/25291/1 diff --git a/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb b/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb index 3e60ed9..cb80deb 100644 --- a/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb +++ b/src/mainboard/intel/cannonlake_rvp/variants/cnl_u/devicetree.cb @@ -70,6 +70,9 @@ # GPIO for SD card detect register "sdcard_cd_gpio" = "GPP_G5" + #Enable S0ix + register "s0ix_enable" = "1" + # Audio register "i2c[3]" = "{ .speed = I2C_SPEED_STANDARD, diff --git a/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb b/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb index 8502048..24d25ec 100644 --- a/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb +++ b/src/mainboard/intel/cannonlake_rvp/variants/cnl_y/devicetree.cb @@ -68,6 +68,9 @@ # GPIO for SD card detect register "sdcard_cd_gpio" = "GPP_G5" + #Enable S0ix + register "s0ix_enable" = "1" + device domain 0 on device pci 00.0 on end # Host Bridge device pci 02.0 on end # Integrated Graphics Device diff --git a/src/soc/intel/cannonlake/acpi.c b/src/soc/intel/cannonlake/acpi.c index 9dcaa33..0134b86 100644 --- a/src/soc/intel/cannonlake/acpi.c +++ b/src/soc/intel/cannonlake/acpi.c @@ -187,6 +187,9 @@ fadt->x_pm_tmr_blk.resv = 0; fadt->x_pm_tmr_blk.addrl = pmbase + PM1_TMR; fadt->x_pm_tmr_blk.addrh = 0x0; + + if(config->s0ix_enable) + fadt->flags |= ACPI_FADT_LOW_PWR_IDLE_S0; } uint32_t soc_read_sci_irq_select(void) { -- To view, visit https://review.coreboot.org/25291 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I50245de95c9024b8a2fecba95772d25feba21446 Gerrit-Change-Number: 25291 Gerrit-PatchSet: 1 Gerrit-Owner: Vaibhav Shankar <vaibhav.shankar(a)intel.com>

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Change in coreboot[master]: mb/google/kahlee: Add register address mapping for FCH MISC
by build bot (Jenkins) (Code Review) 20 Mar '18

20 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25263 ) Change subject: mb/google/kahlee: Add register address mapping for FCH MISC ...................................................................... Patch Set 2: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/23179/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/68795/ : SUCCESS -- To view, visit https://review.coreboot.org/25263 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ia553e55ffb358415067000d2d2d2744322d1c4db Gerrit-Change-Number: 25263 Gerrit-PatchSet: 2 Gerrit-Owner: Akshu Agrawal <akshu.agrawal(a)amd.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Akshu Agrawal <akshu.agrawal(a)amd.com> Gerrit-Reviewer: Daniel Kurtz <djkurtz(a)google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Comment-Date: Tue, 20 Mar 2018 01:12:29 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: [WIP]soc/intel/cannonlake: Clear EMMC timeout for USB boot
by build bot (Jenkins) (Code Review) 20 Mar '18

20 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25290 ) Change subject: [WIP]soc/intel/cannonlake: Clear EMMC timeout for USB boot ...................................................................... Patch Set 2: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/23178/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/68794/ : SUCCESS -- To view, visit https://review.coreboot.org/25290 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I4eef23f637f781b709696951c5bd825530cc1d11 Gerrit-Change-Number: 25290 Gerrit-PatchSet: 2 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 20 Mar 2018 00:40:14 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: mb/google/octopus: Add CLKREQ and de-emphasis settings for PCIe Wi-FI
by build bot (Jenkins) (Code Review) 20 Mar '18

20 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25288 ) Change subject: mb/google/octopus: Add CLKREQ and de-emphasis settings for PCIe Wi-FI ...................................................................... Patch Set 3: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/23177/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/68793/ : SUCCESS -- To view, visit https://review.coreboot.org/25288 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ic73ad38ad9a12bec614e530f7f35619246b9f57f Gerrit-Change-Number: 25288 Gerrit-PatchSet: 3 Gerrit-Owner: Shamile Khan <shamile.khan(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Roy Mingi Park <roy.mingi.park(a)intel.com> Gerrit-Reviewer: Venkateswarlu V Vinjamuri <venkateswarlu.v.vinjamuri(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 20 Mar 2018 00:35:28 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: intel/fsp: Update Cannonlake FSP header
by build bot (Jenkins) (Code Review) 20 Mar '18

20 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25289 ) Change subject: intel/fsp: Update Cannonlake FSP header ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/23176/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/68791/ : SUCCESS -- To view, visit https://review.coreboot.org/25289 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ie794960f0253b2a6dbd55ffda973756d15e35c01 Gerrit-Change-Number: 25289 Gerrit-PatchSet: 1 Gerrit-Owner: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Caveh Jalali <caveh(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 20 Mar 2018 00:33:03 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: [WIP]soc/intel/cannonlake: Clear EMMC timeout for USB boot
by build bot (Jenkins) (Code Review) 20 Mar '18

20 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25290 ) Change subject: [WIP]soc/intel/cannonlake: Clear EMMC timeout for USB boot ...................................................................... Patch Set 1: Verified-1 Build Failed https://qa.coreboot.org/job/coreboot-gerrit/68792/ : FAILURE -- To view, visit https://review.coreboot.org/25290 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I4eef23f637f781b709696951c5bd825530cc1d11 Gerrit-Change-Number: 25290 Gerrit-PatchSet: 1 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 20 Mar 2018 00:27:01 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: [WIP]soc/intel/cannonlake: Clear EMMC timeout for USB boot
by Bora Guvendik (Code Review) 20 Mar '18

20 Mar '18

Bora Guvendik has uploaded a new patch set (#2). ( https://review.coreboot.org/25290 ) Change subject: [WIP]soc/intel/cannonlake: Clear EMMC timeout for USB boot ...................................................................... [WIP]soc/intel/cannonlake: Clear EMMC timeout for USB boot Clear EMMC timeout register to avoid EMMC issue according to cannonlake bios writer guide. _PS0 is not called by OS during USB boot but OS still initializes emmc. Add _INI to cover USB boot case. BUG=b.71586766 TEST=Install OS into EMMC Change-Id: I4eef23f637f781b709696951c5bd825530cc1d11 Signed-off-by: Bora Guvendik <bora.guvendik(a)intel.com> --- M src/soc/intel/cannonlake/acpi/scs.asl 1 file changed, 13 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/25290/2 -- To view, visit https://review.coreboot.org/25290 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I4eef23f637f781b709696951c5bd825530cc1d11 Gerrit-Change-Number: 25290 Gerrit-PatchSet: 2 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com>

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Change in coreboot[master]: mb/google/octopus: Add CLKREQ and de-emphasis settings for PCIe Wi-FI
by build bot (Jenkins) (Code Review) 20 Mar '18

20 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25288 ) Change subject: mb/google/octopus: Add CLKREQ and de-emphasis settings for PCIe Wi-FI ...................................................................... Patch Set 2: Verified-1 Build Failed https://qa.coreboot.org/job/coreboot-checkpatch/23175/ : ABORTED https://qa.coreboot.org/job/coreboot-gerrit/68790/ : ABORTED -- To view, visit https://review.coreboot.org/25288 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ic73ad38ad9a12bec614e530f7f35619246b9f57f Gerrit-Change-Number: 25288 Gerrit-PatchSet: 2 Gerrit-Owner: Shamile Khan <shamile.khan(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 20 Mar 2018 00:26:04 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: mb/google/octopus: Add CLKREQ and de-emphasis settings for PCIe Wi-FI
by Shamile Khan (Code Review) 20 Mar '18

20 Mar '18

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/25288 to look at the new patch set (#3). Change subject: mb/google/octopus: Add CLKREQ and de-emphasis settings for PCIe Wi-FI ...................................................................... mb/google/octopus: Add CLKREQ and de-emphasis settings for PCIe Wi-FI BUG=b:73292699 BRANCH=None TEST=Build coreboot for Octopus board. Signed-off-by: Shamile Khan <shamile.khan(a)intel.com> Change-Id: Ic73ad38ad9a12bec614e530f7f35619246b9f57f Signed-off-by: Shamile Khan <shamile.khan(a)intel.com> --- M src/mainboard/google/octopus/variants/baseboard/devicetree.cb 1 file changed, 18 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/25288/3 -- To view, visit https://review.coreboot.org/25288 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: Ic73ad38ad9a12bec614e530f7f35619246b9f57f Gerrit-Change-Number: 25288 Gerrit-PatchSet: 3 Gerrit-Owner: Shamile Khan <shamile.khan(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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coreboot-gerrit March 2018