coreboot-gerrit March 2018

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Change in coreboot[master]: mb/google/kahlee/variants/baseboard/gpio.c:move all non-critical gpios
by build bot (Jenkins) (Code Review) 28 Mar '18

28 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25395 ) Change subject: mb/google/kahlee/variants/baseboard/gpio.c:move all non-critical gpios ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/69148/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/23502/ : SUCCESS -- To view, visit https://review.coreboot.org/25395 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Icbc9370050d619800026035caaac3e89536a460a Gerrit-Change-Number: 25395 Gerrit-PatchSet: 1 Gerrit-Owner: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Martin Roth <martinroth(a)google.com> Gerrit-Comment-Date: Wed, 28 Mar 2018 01:23:34 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: spi: Add helper functions for bit-banging
by build bot (Jenkins) (Code Review) 28 Mar '18

28 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25394 ) Change subject: spi: Add helper functions for bit-banging ...................................................................... Patch Set 2: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/69147/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/23501/ : SUCCESS -- To view, visit https://review.coreboot.org/25394 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ie3551f51cc9a9f8bf3a47fd5cea6d9c064da8a62 Gerrit-Change-Number: 25394 Gerrit-PatchSet: 2 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 28 Mar 2018 01:17:33 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: rockchip: Add gpio_set() function
by build bot (Jenkins) (Code Review) 28 Mar '18

28 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25393 ) Change subject: rockchip: Add gpio_set() function ...................................................................... Patch Set 1: Verified-1 Build Unstable https://qa.coreboot.org/job/coreboot-gerrit/69146/ : UNSTABLE https://qa.coreboot.org/job/coreboot-checkpatch/23499/ : SUCCESS -- To view, visit https://review.coreboot.org/25393 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I201288139a2870e71f55a7af0d79d4a460b30a0c Gerrit-Change-Number: 25393 Gerrit-PatchSet: 1 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 28 Mar 2018 01:11:16 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: mb/google/kahlee/variants/baseboard/gpio.c:move all non-critical gpios
by Martin Roth (Code Review) 28 Mar '18

28 Mar '18

Martin Roth has posted comments on this change. ( https://review.coreboot.org/25395 ) Change subject: mb/google/kahlee/variants/baseboard/gpio.c:move all non-critical gpios ...................................................................... Patch Set 1: (14 comments) https://review.coreboot.org/#/c/25395/1/src/mainboard/google/kahlee/variant… File src/mainboard/google/kahlee/variants/baseboard/gpio.c: https://review.coreboot.org/#/c/25395/1/src/mainboard/google/kahlee/variant… PS1, Line 255: : I think we want this set up early. https://review.coreboot.org/#/c/25395/1/src/mainboard/google/kahlee/variant… PS1, Line 258: : This one's like the wifi - we probably want it set up early. https://review.coreboot.org/#/c/25395/1/src/mainboard/google/kahlee/variant… PS1, Line 267: : Why move the LPC/EC setup to late? We're using the EC early, so shouldn't we make sure it's set up early? 74, 87, 88 https://review.coreboot.org/#/c/25395/1/src/mainboard/google/kahlee/variant… PS1, Line 285: : I'd think we'd want this set up early too, to match with GPIO4. It probably defaults to clkreq, so it would only be a problem if it were set to some other function in the OS. https://review.coreboot.org/#/c/25395/1/src/mainboard/google/kahlee/variant… PS1, Line 306: : Is this CS0 or CS1? the comment doesn't match the code. I know this is unrelated to your change. https://review.coreboot.org/#/c/25395/1/src/mainboard/google/kahlee/variant… PS1, Line 324: : Don't move the config straps. We need those to read memory. 131, 132, 129, 142 https://review.coreboot.org/#/c/25395/1/src/mainboard/google/kahlee/variant… PS1, Line 31: * Even though one would assume WLAN can be programmed later, : * doing so will cause WIFI to fail. That's a bad assumption. The PCIe enables need to be set up early so that AGESA can detect them. This has already been debugged. https://review.coreboot.org/#/c/25395/1/src/mainboard/google/kahlee/variant… PS1, Line 42: /* GPIO_11 - TOUCHSCREEN_INT_3V3_ODL, SCI */ : PAD_GPI(GPIO_11, PULL_UP), All of the touchscreen interrupts should be able to be moved 11, 19, 20, 85. https://review.coreboot.org/#/c/25395/1/src/mainboard/google/kahlee/variant… PS1, Line 45: /* GPIO_14 - APU_HP_INT_ODL, SCI */ : PAD_GPI(GPIO_14, PULL_UP), Headphone can be moved to late. https://review.coreboot.org/#/c/25395/1/src/mainboard/google/kahlee/variant… PS1, Line 69: /* GPIO_95 - SD_CLK */ : /* GPIO_96 - SD_CMD */ : /* GPIO_97 - SD_D0 */ : /* GPIO_98 - SD_D1 */ : /* GPIO_99 - SD_D2 */ : /* GPIO_100 - SD_D3 */ : /* GPIO_117 - PCH_SPI_CLK_R */ : /* GPIO_120 - PCH_SPI_MISO */ : /* GPIO_121 - PCH_SPI_MOSI */ Go ahead and delete the comments please. https://review.coreboot.org/#/c/25395/1/src/mainboard/google/kahlee/variant… PS1, Line 88: /* GPIO_140 - I2S_BCLK_R (init to func0, used for I2S) */ : PAD_NF(GPIO_140, UART1_CTS_L, PULL_NONE), : : /* GPIO_141 - I2S2_DATA_MIC2 (init to func0, used for I2S) */ : PAD_NF(GPIO_141, UART1_RXD, PULL_NONE), These can be moved. https://review.coreboot.org/#/c/25395/1/src/mainboard/google/kahlee/variant… PS1, Line 134: /* GPIO_84 - HUB_RST (Active High) */ : PAD_GPO(GPIO_84, LOW), The USB hub reset line can be moved to late. https://review.coreboot.org/#/c/25395/1/src/mainboard/google/kahlee/variant… PS1, Line 140: /* GPIO_91 - DMIC_CLK1_EN */ : PAD_GPO(GPIO_91, HIGH), The Microphone init can safely be moved to late. https://review.coreboot.org/#/c/25395/1/src/mainboard/google/kahlee/variant… PS1, Line 165: /* GPIO_141 - I2S2_DATA_MIC2 (init to func0, used for I2S) */ : PAD_NF(GPIO_141, UART1_RXD, PULL_NONE), This microphone init can be move to late too. -- To view, visit https://review.coreboot.org/25395 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Icbc9370050d619800026035caaac3e89536a460a Gerrit-Change-Number: 25395 Gerrit-PatchSet: 1 Gerrit-Owner: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-CC: Martin Roth <martinroth(a)google.com> Gerrit-Comment-Date: Wed, 28 Mar 2018 01:02:44 +0000 Gerrit-HasComments: Yes Gerrit-HasLabels: No

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Change in coreboot[master]: mb/google/kahlee/variants/baseboard/gpio.c:move all non-critical gpios
by Richard Spiegel (Code Review) 28 Mar '18

28 Mar '18

Richard Spiegel has uploaded this change for review. ( https://review.coreboot.org/25395 Change subject: mb/google/kahlee/variants/baseboard/gpio.c:move all non-critical gpios ...................................................................... mb/google/kahlee/variants/baseboard/gpio.c:move all non-critical gpios When GPIO tables were created, there was no study on which pins had to be programmed ASAP and which could be programmed later. Execute such study and move all non-critical gpios from reset to late. BUG=b:76097508 TEST=Build and boot grunt to OS, test OS for lost functionality. Change-Id: Icbc9370050d619800026035caaac3e89536a460a Signed-off-by: Richard Spiegel <richard.spiegel(a)silverbackltd.com> --- M src/mainboard/google/kahlee/variants/baseboard/gpio.c 1 file changed, 218 insertions(+), 214 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/95/25395/1 diff --git a/src/mainboard/google/kahlee/variants/baseboard/gpio.c b/src/mainboard/google/kahlee/variants/baseboard/gpio.c index 6b81b3e..29bc10f 100644 --- a/src/mainboard/google/kahlee/variants/baseboard/gpio.c +++ b/src/mainboard/google/kahlee/variants/baseboard/gpio.c @@ -26,30 +26,16 @@ * ramstage. */ const static struct soc_amd_stoneyridge_gpio gpio_set_stage_reset_old[] = { - /* GPIO_0 - EC_PCH_PWR_BTN_ODL */ - PAD_NF(GPIO_0, PWR_BTN_L, PULL_UP), - - /* GPIO_1 - SYS_RST_ODL */ - PAD_NF(GPIO_1, SYS_RESET_L, PULL_UP), - - /* GPIO_3 - MEM_VOLT_SEL */ - PAD_GPI(GPIO_3, PULL_UP), - - /* GPIO_4 - EN_PP3300_WLAN */ + /* + * GPIO_4 - EN_PP3300_WLA + * Even though one would assume WLAN can be programmed later, + * doing so will cause WIFI to fail. + */ PAD_GPO(GPIO_4, HIGH), - /* GPIO_5 - PCH_TRACKPAD_INT_3V3_ODL, SCI */ - PAD_GPI(GPIO_5, PULL_UP), - /* GPIO_6 - APU_RST_L / EC_SMI_ODL, SMI */ PAD_GPI(GPIO_6, PULL_UP), - /* GPIO_7 - APU_PWROK_OD (currently not used) */ - PAD_GPI(GPIO_7, PULL_UP), - - /* GPIO_8 - DDR_ALERT_3V3_L (currently not used) */ - PAD_GPI(GPIO_8, PULL_UP), - /* GPIO_9 - H1_PCH_INT_ODL, SCI */ PAD_GPI(GPIO_9, PULL_UP), @@ -68,94 +54,28 @@ /* GPIO_20 - APU_I2C_SDA3 (Touchscreen) */ PAD_NF(GPIO_20, I2C3_SDA, PULL_UP), - /* GPIO_21 - APU_PEN_INT_ODL, SCI */ - PAD_GPI(GPIO_21, PULL_UP), - /* GPIO_22 - EC_SCI_ODL, SCI */ PAD_GPI(GPIO_22, PULL_UP), - /* GPIO_23 - ACOK_OD */ - /* GPIO_24 - USB_A1_OC_ODL */ - PAD_NF(GPIO_24, USB_OC3_L, PULL_UP), - - /* GPIO_25 - SD_CD */ - PAD_NF(GPIO_25, SD0_CD, PULL_UP), - - /* GPIO_26 - APU_PCIE_RST_L */ - PAD_NF(GPIO_26, PCIE_RST_L, PULL_NONE), - - /* GPIO_40 - EMMC_BRIDGE_RST_L - Currently unused */ - PAD_GPI(GPIO_40, PULL_UP), - - /* GPIO_42 - S5_MUX_CTRL */ - PAD_NF(GPIO_42, S5_MUX_CTRL, PULL_NONE), - /* GPIO_70 - WLAN_PE_RST_L */ PAD_GPO(GPIO_70, HIGH), - /* GPIO_74 - LPC_CLK0_EC_R */ - PAD_NF(GPIO_74, LPCCLK0, PULL_DOWN), - /* GPIO_84 - HUB_RST (Active High) */ PAD_GPO(GPIO_84, LOW), /* GPIO_85 - TOUCHSCREEN_RST (Active High) */ PAD_GPO(GPIO_85, LOW), - /* GPIO_87 - LPC_SERIRQ */ - PAD_NF(GPIO_87, SERIRQ, PULL_NONE), - - /* GPIO_88 - LPC_CLKRUN_L */ - PAD_NF(GPIO_88, LPC_CLKRUN_L, PULL_NONE), - - /* GPIO_92 - WLAN_PCIE_CLKREQ_3V3_ODL */ - PAD_NF(GPIO_92, CLK_REQ0_L, PULL_UP), - - /* GPIO_93 - EMMC_RST_L */ - PAD_GPO(GPIO_93, HIGH), - /* GPIO_95 - SD_CLK */ /* GPIO_96 - SD_CMD */ /* GPIO_97 - SD_D0 */ /* GPIO_98 - SD_D1 */ /* GPIO_99 - SD_D2 */ /* GPIO_100 - SD_D3 */ - - /* GPIO_101 - SD_WP_L */ - PAD_NF(GPIO_101, SD0_WP, PULL_DOWN), - - /* GPIO_116 - PCIE_EMMC_CLKREQ_L */ - PAD_NF(GPIO_116, CLK_REQ2_L, PULL_NONE), - /* GPIO_117 - PCH_SPI_CLK_R */ - - /* GPIO_118 - PCH_SPI_CS0_L */ - PAD_NF(GPIO_118, SPI_CS1_L, PULL_NONE), - - /* GPIO_119 - SPK_PA_EN */ - PAD_GPO(GPIO_119, HIGH), - /* GPIO_120 - PCH_SPI_MISO */ /* GPIO_121 - PCH_SPI_MOSI */ - /* GPIO_122 - APU_BIOS_FLASH_WP_L */ - PAD_GPI(GPIO_122, PULL_NONE), - - /* GPIO_126 - DMIC_CLK2_EN */ - PAD_GPO(GPIO_126, HIGH), - - /* GPIO_129 - APU_KBRST_L */ - PAD_NF(GPIO_129, KBRST_L, PULL_UP), - - /* GPIO_131 - CONFIG_STRAP3 */ - PAD_GPI(GPIO_131, PULL_NONE), - - /* GPIO_132 - CONFIG_STRAP4 */ - PAD_GPI(GPIO_132, PULL_NONE), - - /* GPIO_133 - APU_EDP_BKLTEN_L (backlight - Active LOW) */ - PAD_GPO(GPIO_133, LOW), - /* GPIO_136 - UART_PCH_RX_DEBUG_TX */ PAD_NF(GPIO_136, UART0_RXD, PULL_NONE), @@ -165,62 +85,24 @@ /* GPIO_138 - UART_PCH_TX_DEBUG_RX */ PAD_NF(GPIO_138, UART0_TXD, PULL_NONE), - /* GPIO_139 - CONFIG_STRAP1 */ - PAD_GPI(GPIO_139, PULL_NONE), - /* GPIO_140 - I2S_BCLK_R (init to func0, used for I2S) */ PAD_NF(GPIO_140, UART1_CTS_L, PULL_NONE), /* GPIO_141 - I2S2_DATA_MIC2 (init to func0, used for I2S) */ PAD_NF(GPIO_141, UART1_RXD, PULL_NONE), - - /* GPIO_142 - CONFIG_STRAP2 */ - PAD_GPI(GPIO_142, PULL_NONE), - - /* GPIO_143 - I2S2_DATA (init to func0, used for I2S) */ - PAD_NF(GPIO_143, UART1_TXD, PULL_NONE), - - /* GPIO_144 - I2S_LR_R (init to func0, used for I2S) */ - PAD_NF(GPIO_144, UART1_INTR, PULL_NONE), - - /* GPIO_145 - PCH_I2C_AUDIO_SCL */ - PAD_NF(GPIO_145, I2C0_SCL, PULL_NONE), - - /* GPIO_146 - PCH_I2C_AUDIO_SDA */ - PAD_NF(GPIO_146, I2C0_SDA, PULL_NONE), - - /* GPIO_147 - PCH_I2C_H1_TPM_SCL */ - PAD_NF(GPIO_147, I2C1_SCL, PULL_NONE), - - /* GPIO_148 - PCH_I2C_H1_TPM_SDA */ - PAD_NF(GPIO_148, I2C1_SDA, PULL_NONE), }; const static struct soc_amd_stoneyridge_gpio gpio_set_stage_reset[] = { - /* GPIO_0 - EC_PCH_PWR_BTN_ODL */ - PAD_NF(GPIO_0, PWR_BTN_L, PULL_UP), - - /* GPIO_1 - SYS_RST_ODL */ - PAD_NF(GPIO_1, SYS_RESET_L, PULL_UP), - - /* GPIO_3 - MEM_VOLT_SEL */ - PAD_GPI(GPIO_3, PULL_UP), - - /* GPIO_4 - EN_PP3300_WLAN */ + /* + * GPIO_4 - EN_PP3300_WLA + * Even though one would assume WLAN can be programmed later, + * doing so will cause WIFI to fail. + */ PAD_GPO(GPIO_4, HIGH), - /* GPIO_5 - PCH_TRACKPAD_INT_3V3_ODL, SCI */ - PAD_GPI(GPIO_5, PULL_UP), - /* GPIO_6 - APU_RST_L / EC_SMI_ODL, SMI */ PAD_GPI(GPIO_6, PULL_UP), - /* GPIO_7 - APU_PWROK_OD (currently not used) */ - PAD_GPI(GPIO_7, PULL_UP), - - /* GPIO_8 - DDR_ALERT_3V3_L (currently not used) */ - PAD_GPI(GPIO_8, PULL_UP), - /* GPIO_9 - H1_PCH_INT_ODL, SCI */ PAD_GPI(GPIO_9, PULL_UP), @@ -239,9 +121,6 @@ /* GPIO_20 - APU_I2C_SDA3 (Touchscreen) */ PAD_NF(GPIO_20, I2C3_SDA, PULL_UP), - /* GPIO_21 - APU_PEN_INT_ODL, SCI */ - PAD_GPI(GPIO_21, PULL_UP), - /* GPIO_22 - EC_SCI_ODL, SCI */ PAD_GPI(GPIO_22, PULL_UP), @@ -249,87 +128,28 @@ /* GPIO_24 - EC_PCH_WAKE_L */ PAD_GPI(GPIO_24, PULL_UP), - /* GPIO_25 - SD_CD */ - PAD_NF(GPIO_25, SD0_CD, PULL_UP), - - /* GPIO_26 - APU_PCIE_RST_L */ - PAD_NF(GPIO_26, PCIE_RST_L, PULL_NONE), - - /* GPIO_40 - EMMC_BRIDGE_RST */ - PAD_GPI(GPIO_40, PULL_DOWN), - - /* GPIO_42 - S5_MUX_CTRL */ - PAD_NF(GPIO_42, S5_MUX_CTRL, PULL_NONE), - /* GPIO_70 - WLAN_PE_RST_L */ PAD_GPO(GPIO_70, HIGH), - /* GPIO_74 - LPC_CLK0_EC_R */ - PAD_NF(GPIO_74, LPCCLK0, PULL_DOWN), - /* GPIO_84 - HUB_RST (Active High) */ PAD_GPO(GPIO_84, LOW), /* GPIO_85 - TOUCHSCREEN_RST (Active High) */ PAD_GPO(GPIO_85, LOW), - /* GPIO_87 - LPC_SERIRQ */ - PAD_NF(GPIO_87, SERIRQ, PULL_NONE), - - /* GPIO_88 - LPC_CLKRUN_L */ - PAD_NF(GPIO_88, LPC_CLKRUN_L, PULL_NONE), - /* GPIO_91 - DMIC_CLK1_EN */ PAD_GPO(GPIO_91, HIGH), - /* GPIO_92 - WLAN_PCIE_CLKREQ_3V3_ODL */ - PAD_NF(GPIO_92, CLK_REQ0_L, PULL_UP), - - /* GPIO_93 - EMMC_RST */ - PAD_GPO(GPIO_93, LOW), - /* GPIO_95 - SD_CLK */ /* GPIO_96 - SD_CMD */ /* GPIO_97 - SD_D0 */ /* GPIO_98 - SD_D1 */ /* GPIO_99 - SD_D2 */ /* GPIO_100 - SD_D3 */ - - /* GPIO_101 - SD_WP_L */ - PAD_NF(GPIO_101, SD0_WP, PULL_DOWN), - - /* GPIO_116 - PCIE_EMMC_CLKREQ_L */ - PAD_NF(GPIO_116, CLK_REQ2_L, PULL_NONE), - /* GPIO_117 - PCH_SPI_CLK_R */ - - /* GPIO_118 - PCH_SPI_CS0_L */ - PAD_NF(GPIO_118, SPI_CS1_L, PULL_NONE), - - /* GPIO_119 - SPK_PA_EN */ - PAD_GPO(GPIO_119, HIGH), - /* GPIO_120 - PCH_SPI_MISO */ /* GPIO_121 - PCH_SPI_MOSI */ - /* GPIO_122 - APU_BIOS_FLASH_WP_L */ - PAD_GPI(GPIO_122, PULL_NONE), - - /* GPIO_126 - DMIC_CLK2_EN */ - PAD_GPO(GPIO_126, HIGH), - - /* GPIO_129 - APU_KBRST_L */ - PAD_NF(GPIO_129, KBRST_L, PULL_UP), - - /* GPIO_131 - CONFIG_STRAP3 */ - PAD_GPI(GPIO_131, PULL_NONE), - - /* GPIO_132 - CONFIG_STRAP4 */ - PAD_GPI(GPIO_132, PULL_NONE), - - /* GPIO_133 - APU_EDP_BKLTEN_L (backlight - Active LOW) */ - PAD_GPO(GPIO_133, LOW), - /* GPIO_136 - UART_PCH_RX_DEBUG_TX */ PAD_NF(GPIO_136, UART0_RXD, PULL_NONE), @@ -339,41 +159,35 @@ /* GPIO_138 - UART_PCH_TX_DEBUG_RX */ PAD_NF(GPIO_138, UART0_TXD, PULL_NONE), - /* GPIO_139 - CONFIG_STRAP1 */ - PAD_GPI(GPIO_139, PULL_NONE), - /* GPIO_140 - I2S_BCLK_R (init to func0, used for I2S) */ PAD_NF(GPIO_140, UART1_CTS_L, PULL_NONE), /* GPIO_141 - I2S2_DATA_MIC2 (init to func0, used for I2S) */ PAD_NF(GPIO_141, UART1_RXD, PULL_NONE), - - /* GPIO_142 - CONFIG_STRAP2 */ - PAD_GPI(GPIO_142, PULL_NONE), - - /* GPIO_143 - I2S2_DATA (init to func0, used for I2S) */ - PAD_NF(GPIO_143, UART1_TXD, PULL_NONE), - - /* GPIO_144 - I2S_LR_R (init to func0, used for I2S) */ - PAD_NF(GPIO_144, UART1_INTR, PULL_NONE), - - /* GPIO_145 - PCH_I2C_AUDIO_SCL */ - PAD_NF(GPIO_145, I2C0_SCL, PULL_NONE), - - /* GPIO_146 - PCH_I2C_AUDIO_SDA */ - PAD_NF(GPIO_146, I2C0_SDA, PULL_NONE), - - /* GPIO_147 - PCH_I2C_H1_TPM_SCL */ - PAD_NF(GPIO_147, I2C1_SCL, PULL_NONE), - - /* GPIO_148 - PCH_I2C_H1_TPM_SDA */ - PAD_NF(GPIO_148, I2C1_SDA, PULL_NONE), }; const static struct soc_amd_stoneyridge_gpio gpio_set_stage_ram_old[] = { + /* GPIO_0 - EC_PCH_PWR_BTN_ODL */ + PAD_NF(GPIO_0, PWR_BTN_L, PULL_UP), + + /* GPIO_1 - SYS_RST_ODL */ + PAD_NF(GPIO_1, SYS_RESET_L, PULL_UP), + /* GPIO_2 - WLAN_PCIE_WAKE_3V3_ODL */ PAD_NF(GPIO_2, WAKE_L, PULL_UP), + /* GPIO_3 - MEM_VOLT_SEL */ + PAD_GPI(GPIO_3, PULL_UP), + + /* GPIO_5 - PCH_TRACKPAD_INT_3V3_ODL, SCI */ + PAD_GPI(GPIO_5, PULL_UP), + + /* GPIO_7 - APU_PWROK_OD (currently not used) */ + PAD_GPI(GPIO_7, PULL_UP), + + /* GPIO_8 - DDR_ALERT_3V3_L (currently not used) */ + PAD_GPI(GPIO_8, PULL_UP), + /* GPIO_10 - SLP_S0_L (currently not used) */ PAD_NF(GPIO_10, S0A3_GPIO, PULL_UP), @@ -392,9 +206,31 @@ /* GPIO_18 - USB_A0_OC_ODL */ PAD_NF(GPIO_18, USB_OC2_L, PULL_UP), + /* GPIO_21 - APU_PEN_INT_ODL, SCI */ + PAD_GPI(GPIO_21, PULL_UP), + + /* GPIO_23 - ACOK_OD */ + /* GPIO_24 - USB_A1_OC_ODL */ + PAD_NF(GPIO_24, USB_OC3_L, PULL_UP), + + /* GPIO_25 - SD_CD */ + PAD_NF(GPIO_25, SD0_CD, PULL_UP), + + /* GPIO_26 - APU_PCIE_RST_L */ + PAD_NF(GPIO_26, PCIE_RST_L, PULL_NONE), + + /* GPIO_40 - EMMC_BRIDGE_RST_L - Currently unused */ + PAD_GPI(GPIO_40, PULL_UP), + + /* GPIO_42 - S5_MUX_CTRL */ + PAD_NF(GPIO_42, S5_MUX_CTRL, PULL_NONE), + /* GPIO_67 - PEN_RESET */ PAD_GPO(GPIO_67, LOW), + /* GPIO_74 - LPC_CLK0_EC_R */ + PAD_NF(GPIO_74, LPCCLK0, PULL_DOWN), + /* GPIO_75 - Unused (strap) (R139/R130) */ PAD_GPI(GPIO_75, PULL_UP), @@ -404,12 +240,27 @@ /* GPIO_86 - Unused (TP109) */ PAD_GPI(GPIO_86, PULL_UP), + /* GPIO_87 - LPC_SERIRQ */ + PAD_NF(GPIO_87, SERIRQ, PULL_NONE), + + /* GPIO_88 - LPC_CLKRUN_L */ + PAD_NF(GPIO_88, LPC_CLKRUN_L, PULL_NONE), + /* GPIO_90 - EN_PP3300_CAMERA */ PAD_GPO(GPIO_90, HIGH), /* GPIO_91 - EN_PP3300_TRACKPAD */ PAD_GPO(GPIO_91, HIGH), + /* GPIO_92 - WLAN_PCIE_CLKREQ_3V3_ODL */ + PAD_NF(GPIO_92, CLK_REQ0_L, PULL_UP), + + /* GPIO_93 - EMMC_RST_L */ + PAD_GPO(GPIO_93, HIGH), + + /* GPIO_101 - SD_WP_L */ + PAD_NF(GPIO_101, SD0_WP, PULL_DOWN), + /* GPIO_102 - EN_SD_SOCKET_PWR */ PAD_NF(GPIO_102, SD0_PWR_CTRL, PULL_DOWN), @@ -422,17 +273,86 @@ /* GPIO_115 - Unused (TP127) */ PAD_GPI(GPIO_115, PULL_UP), + /* GPIO_116 - PCIE_EMMC_CLKREQ_L */ + PAD_NF(GPIO_116, CLK_REQ2_L, PULL_NONE), + + /* GPIO_118 - PCH_SPI_CS0_L */ + PAD_NF(GPIO_118, SPI_CS1_L, PULL_NONE), + + /* GPIO_119 - SPK_PA_EN */ + PAD_GPO(GPIO_119, HIGH), + + /* GPIO_122 - APU_BIOS_FLASH_WP_L */ + PAD_GPI(GPIO_122, PULL_NONE), + + /* GPIO_126 - DMIC_CLK2_EN */ + PAD_GPO(GPIO_126, HIGH), + + /* GPIO_129 - APU_KBRST_L */ + PAD_NF(GPIO_129, KBRST_L, PULL_UP), + /* GPIO_130 - Unused (TP55) */ PAD_GPI(GPIO_130, PULL_UP), + /* GPIO_131 - CONFIG_STRAP3 */ + PAD_GPI(GPIO_131, PULL_NONE), + + /* GPIO_132 - CONFIG_STRAP4 */ + PAD_GPI(GPIO_132, PULL_NONE), + + /* GPIO_133 - APU_EDP_BKLTEN_L (backlight - Active LOW) */ + PAD_GPO(GPIO_133, LOW), + /* GPIO_135 - Unused (TP128) */ PAD_GPI(GPIO_135, PULL_UP), + + /* GPIO_139 - CONFIG_STRAP1 */ + PAD_GPI(GPIO_139, PULL_NONE), + + /* GPIO_145 - PCH_I2C_AUDIO_SCL */ + PAD_NF(GPIO_145, I2C0_SCL, PULL_NONE), + + /* GPIO_146 - PCH_I2C_AUDIO_SDA */ + PAD_NF(GPIO_146, I2C0_SDA, PULL_NONE), + + /* GPIO_147 - PCH_I2C_H1_TPM_SCL */ + PAD_NF(GPIO_147, I2C1_SCL, PULL_NONE), + + /* GPIO_148 - PCH_I2C_H1_TPM_SDA */ + PAD_NF(GPIO_148, I2C1_SDA, PULL_NONE), + + /* GPIO_142 - CONFIG_STRAP2 */ + PAD_GPI(GPIO_142, PULL_NONE), + + /* GPIO_143 - I2S2_DATA (init to func0, used for I2S) */ + PAD_NF(GPIO_143, UART1_TXD, PULL_NONE), + + /* GPIO_144 - I2S_LR_R (init to func0, used for I2S) */ + PAD_NF(GPIO_144, UART1_INTR, PULL_NONE), }; const static struct soc_amd_stoneyridge_gpio gpio_set_stage_ram[] = { + /* GPIO_0 - EC_PCH_PWR_BTN_ODL */ + PAD_NF(GPIO_0, PWR_BTN_L, PULL_UP), + + /* GPIO_1 - SYS_RST_ODL */ + PAD_NF(GPIO_1, SYS_RESET_L, PULL_UP), + /* GPIO_2 - WLAN_PCIE_WAKE_3V3_ODL */ PAD_NF(GPIO_2, WAKE_L, PULL_UP), + /* GPIO_3 - MEM_VOLT_SEL */ + PAD_GPI(GPIO_3, PULL_UP), + + /* GPIO_5 - PCH_TRACKPAD_INT_3V3_ODL, SCI */ + PAD_GPI(GPIO_5, PULL_UP), + + /* GPIO_7 - APU_PWROK_OD (currently not used) */ + PAD_GPI(GPIO_7, PULL_UP), + + /* GPIO_8 - DDR_ALERT_3V3_L (currently not used) */ + PAD_GPI(GPIO_8, PULL_UP), + /* GPIO_10 - SLP_S0_L (currently not used) */ PAD_NF(GPIO_10, S0A3_GPIO, PULL_UP), @@ -451,9 +371,27 @@ /* GPIO_18 - USB_A0_OC_ODL */ PAD_NF(GPIO_18, USB_OC2_L, PULL_UP), + /* GPIO_21 - APU_PEN_INT_ODL, SCI */ + PAD_GPI(GPIO_21, PULL_UP), + + /* GPIO_25 - SD_CD */ + PAD_NF(GPIO_25, SD0_CD, PULL_UP), + + /* GPIO_26 - APU_PCIE_RST_L */ + PAD_NF(GPIO_26, PCIE_RST_L, PULL_NONE), + + /* GPIO_40 - EMMC_BRIDGE_RST */ + PAD_GPI(GPIO_40, PULL_DOWN), + + /* GPIO_42 - S5_MUX_CTRL */ + PAD_NF(GPIO_42, S5_MUX_CTRL, PULL_NONE), + /* GPIO_67 - PEN_RESET */ PAD_GPO(GPIO_67, LOW), + /* GPIO_74 - LPC_CLK0_EC_R */ + PAD_NF(GPIO_74, LPCCLK0, PULL_DOWN), + /* GPIO_75 - Unused (strap) (R139/R130) */ PAD_GPI(GPIO_75, PULL_UP), @@ -463,9 +401,24 @@ /* GPIO_86 - Unused (TP109) */ PAD_GPI(GPIO_86, PULL_UP), + /* GPIO_87 - LPC_SERIRQ */ + PAD_NF(GPIO_87, SERIRQ, PULL_NONE), + + /* GPIO_88 - LPC_CLKRUN_L */ + PAD_NF(GPIO_88, LPC_CLKRUN_L, PULL_NONE), + /* GPIO_90 - EN_PP3300_CAMERA */ PAD_GPO(GPIO_90, HIGH), + /* GPIO_92 - WLAN_PCIE_CLKREQ_3V3_ODL */ + PAD_NF(GPIO_92, CLK_REQ0_L, PULL_UP), + + /* GPIO_93 - EMMC_RST */ + PAD_GPO(GPIO_93, LOW), + + /* GPIO_101 - SD_WP_L */ + PAD_NF(GPIO_101, SD0_WP, PULL_DOWN), + /* GPIO_102 - EN_SD_SOCKET_PWR */ PAD_NF(GPIO_102, SD0_PWR_CTRL, PULL_DOWN), @@ -478,11 +431,62 @@ /* GPIO_115 - Unused (TP127) */ PAD_GPI(GPIO_115, PULL_UP), + /* GPIO_116 - PCIE_EMMC_CLKREQ_L */ + PAD_NF(GPIO_116, CLK_REQ2_L, PULL_NONE), + + /* GPIO_118 - PCH_SPI_CS0_L */ + PAD_NF(GPIO_118, SPI_CS1_L, PULL_NONE), + + /* GPIO_119 - SPK_PA_EN */ + PAD_GPO(GPIO_119, HIGH), + + /* GPIO_122 - APU_BIOS_FLASH_WP_L */ + PAD_GPI(GPIO_122, PULL_NONE), + + /* GPIO_126 - DMIC_CLK2_EN */ + PAD_GPO(GPIO_126, HIGH), + + /* GPIO_129 - APU_KBRST_L */ + PAD_NF(GPIO_129, KBRST_L, PULL_UP), + /* GPIO_130 - Unused (TP55) */ PAD_GPI(GPIO_130, PULL_UP), + /* GPIO_131 - CONFIG_STRAP3 */ + PAD_GPI(GPIO_131, PULL_NONE), + + /* GPIO_132 - CONFIG_STRAP4 */ + PAD_GPI(GPIO_132, PULL_NONE), + + /* GPIO_133 - APU_EDP_BKLTEN_L (backlight - Active LOW) */ + PAD_GPO(GPIO_133, LOW), + /* GPIO_135 - Unused (TP128) */ PAD_GPI(GPIO_135, PULL_UP), + + /* GPIO_139 - CONFIG_STRAP1 */ + PAD_GPI(GPIO_139, PULL_NONE), + + /* GPIO_142 - CONFIG_STRAP2 */ + PAD_GPI(GPIO_142, PULL_NONE), + + /* GPIO_143 - I2S2_DATA (init to func0, used for I2S) */ + PAD_NF(GPIO_143, UART1_TXD, PULL_NONE), + + /* GPIO_144 - I2S_LR_R (init to func0, used for I2S) */ + PAD_NF(GPIO_144, UART1_INTR, PULL_NONE), + + /* GPIO_145 - PCH_I2C_AUDIO_SCL */ + PAD_NF(GPIO_145, I2C0_SCL, PULL_NONE), + + /* GPIO_146 - PCH_I2C_AUDIO_SDA */ + PAD_NF(GPIO_146, I2C0_SDA, PULL_NONE), + + /* GPIO_147 - PCH_I2C_H1_TPM_SCL */ + PAD_NF(GPIO_147, I2C1_SCL, PULL_NONE), + + /* GPIO_148 - PCH_I2C_H1_TPM_SDA */ + PAD_NF(GPIO_148, I2C1_SDA, PULL_NONE), }; const __attribute__((weak)) -- To view, visit https://review.coreboot.org/25395 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Icbc9370050d619800026035caaac3e89536a460a Gerrit-Change-Number: 25395 Gerrit-PatchSet: 1 Gerrit-Owner: Richard Spiegel <richard.spiegel(a)silverbackltd.com>

1 0

Change in coreboot[master]: spi: Add helper functions for bit-banging
by build bot (Jenkins) (Code Review) 28 Mar '18

28 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25394 ) Change subject: spi: Add helper functions for bit-banging ...................................................................... Patch Set 1: Verified+1 Build Failed https://qa.coreboot.org/job/coreboot-checkpatch/23500/ : SUCCESS -- To view, visit https://review.coreboot.org/25394 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ie3551f51cc9a9f8bf3a47fd5cea6d9c064da8a62 Gerrit-Change-Number: 25394 Gerrit-PatchSet: 1 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 27 Mar 2018 23:59:00 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

1 0

Change in coreboot[master]: mainboard/google/zoombini: Enable HAVE_ACPI_RESUME
by Lijian Zhao (Code Review) 28 Mar '18

28 Mar '18

Lijian Zhao has posted comments on this change. ( https://review.coreboot.org/25390 ) Change subject: mainboard/google/zoombini: Enable HAVE_ACPI_RESUME ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/25390 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I9de84dfd450936b3bc08e016bec6cf5ae88eab3d Gerrit-Change-Number: 25390 Gerrit-PatchSet: 1 Gerrit-Owner: Vaibhav Shankar <vaibhav.shankar(a)intel.com> Gerrit-Reviewer: Aseda Aboagye <aaboagye(a)google.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 27 Mar 2018 23:37:01 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: mainboard/google/zoombini: Enable HAVE_ACPI_RESUME
by Furquan Shaikh (Code Review) 28 Mar '18

28 Mar '18

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/25390 ) Change subject: mainboard/google/zoombini: Enable HAVE_ACPI_RESUME ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/25390 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I9de84dfd450936b3bc08e016bec6cf5ae88eab3d Gerrit-Change-Number: 25390 Gerrit-PatchSet: 1 Gerrit-Owner: Vaibhav Shankar <vaibhav.shankar(a)intel.com> Gerrit-Reviewer: Aseda Aboagye <aaboagye(a)google.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 27 Mar 2018 22:57:49 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: mainboard/google/zoombini: Enable HAVE_ACPI_RESUME
by Aseda Aboagye (Code Review) 28 Mar '18

28 Mar '18

Aseda Aboagye has posted comments on this change. ( https://review.coreboot.org/25390 ) Change subject: mainboard/google/zoombini: Enable HAVE_ACPI_RESUME ...................................................................... Patch Set 1: Code-Review+1 -- To view, visit https://review.coreboot.org/25390 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I9de84dfd450936b3bc08e016bec6cf5ae88eab3d Gerrit-Change-Number: 25390 Gerrit-PatchSet: 1 Gerrit-Owner: Vaibhav Shankar <vaibhav.shankar(a)intel.com> Gerrit-Reviewer: Aseda Aboagye <aaboagye(a)google.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 27 Mar 2018 22:57:11 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: mainboard/google/zoombini: Enable HAVE_ACPI_RESUME
by build bot (Jenkins) (Code Review) 28 Mar '18

28 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25390 ) Change subject: mainboard/google/zoombini: Enable HAVE_ACPI_RESUME ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/69127/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/23480/ : SUCCESS -- To view, visit https://review.coreboot.org/25390 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I9de84dfd450936b3bc08e016bec6cf5ae88eab3d Gerrit-Change-Number: 25390 Gerrit-PatchSet: 1 Gerrit-Owner: Vaibhav Shankar <vaibhav.shankar(a)intel.com> Gerrit-Reviewer: Aseda Aboagye <aaboagye(a)google.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 27 Mar 2018 22:50:27 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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