coreboot-gerrit March 2018

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Change in coreboot[master]: soc/amd: Fix generating SMBIOS Type 17
by build bot (Jenkins) (Code Review) 28 Mar '18

28 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25304 ) Change subject: soc/amd: Fix generating SMBIOS Type 17 ...................................................................... Patch Set 14: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/69163/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/23515/ : SUCCESS -- To view, visit https://review.coreboot.org/25304 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I076bc3f965f81a9374c8976da48c7fdce014dc0c Gerrit-Change-Number: 25304 Gerrit-PatchSet: 14 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Comment-Date: Wed, 28 Mar 2018 16:23:01 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: src/lib/dimm_info_util.c: Add methods to convert from SMBIOS to SPD
by Raul Rangel (Code Review) 28 Mar '18

28 Mar '18

Raul Rangel has uploaded this change for review. ( https://review.coreboot.org/25412 Change subject: src/lib/dimm_info_util.c: Add methods to convert from SMBIOS to SPD ...................................................................... src/lib/dimm_info_util.c: Add methods to convert from SMBIOS to SPD AMD AGESA returns DIMM info in SMBIOS format. dimm_info expects the data in SPD format. These methods will be used to update amd_late_init.c so it sets the correct values. BUG=b:65403853 TEST=Tested on grunt Change-Id: Id9fa98e9aad83dfd0a86f45e18b3c312665dce9b Signed-off-by: Raul E Rangel <rrangel(a)chromium.org> --- A src/include/dimm_info_util.h M src/include/spd.h M src/lib/Makefile.inc A src/lib/dimm_info_util.c 4 files changed, 148 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/12/25412/1 diff --git a/src/include/dimm_info_util.h b/src/include/dimm_info_util.h new file mode 100644 index 0000000..71630ac --- /dev/null +++ b/src/include/dimm_info_util.h @@ -0,0 +1,46 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2018 Google Inc. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License version + * 2 as published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef _DIMM_INFO_UTIL_H_ +#define _DIMM_INFO_UTIL_H_ + +#include <smbios.h> +#include <stdint.h> + +/** + * Convert the SMBIOS bit widths into an SPD encoded width. + * + * Use this when setting dimm_info.bus_width if the raw SPD values are not + * available. + */ +uint8_t smbios_bus_width_to_spd_width(uint16_t total_width, + uint16_t data_width); + +/** + * Convert the SMBIOS size values into the total number of MiB. + * + * Use this when setting dimm_info.dimm_size. + */ +uint32_t smbios_memory_size_to_mib(uint16_t memory_size, + uint32_t extended_size); +/** + * Convert the SMBIOS form factor to the SPD module type. + * + * Use this when setting dimm_info.mod_type. + */ +uint8_t +smbios_form_factor_to_spd_mod_type(smbios_memory_form_factor form_factor); + +#endif diff --git a/src/include/spd.h b/src/include/spd.h index 9ada5c3..e9c23f2 100644 --- a/src/include/spd.h +++ b/src/include/spd.h @@ -289,7 +289,7 @@ #define RC62 62 #define RC63 63 -/* Byte 20: DIMM type information */ +/* Byte 3: Module type information */ #define SPD_UNDEFINED 0x00 #define SPD_RDIMM 0x01 #define SPD_UDIMM 0x02 @@ -300,4 +300,6 @@ #define SPD_MINI_RDIMM 0x10 #define SPD_MINI_UDIMM 0x20 +#define SPD_ECC_8BIT (1<<3) + #endif diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index 3ae77a6..fcc3d7c 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -110,6 +110,7 @@ ramstage-y += memcmp.c ramstage-y += malloc.c smm-$(CONFIG_SMM_TSEG) += malloc.c +ramstage-y += dimm_info_util.c ramstage-y += delay.c ramstage-y += fallback_boot.c ramstage-y += compute_ip_checksum.c diff --git a/src/lib/dimm_info_util.c b/src/lib/dimm_info_util.c new file mode 100644 index 0000000..3e0d87f --- /dev/null +++ b/src/lib/dimm_info_util.c @@ -0,0 +1,98 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2018 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <dimm_info_util.h> +#include <smbios.h> +#include <spd.h> +#include <console/console.h> + +uint8_t smbios_bus_width_to_spd_width(uint16_t total_width, uint16_t data_width) +{ + uint8_t out; + + /* Lookup table as defined in the JEDEC Standard. */ + switch (data_width) { + case 64: + out = MEMORY_BUS_WIDTH_64; + break; + case 32: + out = MEMORY_BUS_WIDTH_32; + break; + case 16: + out = MEMORY_BUS_WIDTH_16; + break; + case 8: + out = MEMORY_BUS_WIDTH_8; + break; + default: + printk(BIOS_NOTICE, "Unknown memory size %hu", data_width); + /* + * The SMBIOS spec says we should set 0xFFFF on an unknown + * value, but we don't have a way of passing that signal via SPD + * encoded values. + */ + out = MEMORY_BUS_WIDTH_8; + break; + } + + uint16_t extension_bits = total_width - data_width; + + switch (extension_bits) { + case 8: + out |= SPD_ECC_8BIT; + break; + case 0: + /* No extension bits */ + break; + default: + printk(BIOS_NOTICE, "Unknown number of extension bits %hu", + extension_bits); + break; + } + + return out; +} + +uint32_t smbios_memory_size_to_mib(uint16_t memory_size, uint32_t extended_size) +{ + /* Memory size is unknown */ + if (memory_size == 0xFFFF) + return 0; + /* (32 GiB - 1 MiB) or greater is expressed in the extended size. */ + else if (memory_size == 0x7FFF) + return extended_size; + /* When the MSB is flipped, the value is specified in kilobytes */ + else if (memory_size & 0x8000) + return (memory_size ^ 0x8000) / KiB; + /* Value contains MiB */ + else + return memory_size; +} + +uint8_t +smbios_form_factor_to_spd_mod_type(smbios_memory_form_factor form_factor) +{ + /* This switch reverses the switch in smbios.c */ + switch (form_factor) { + case MEMORY_FORMFACTOR_DIMM: + return SPD_UDIMM; + case MEMORY_FORMFACTOR_RIMM: + return SPD_RDIMM; + case MEMORY_FORMFACTOR_SODIMM: + return SPD_SODIMM; + default: + return SPD_UNDEFINED; + } +} -- To view, visit https://review.coreboot.org/25412 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Id9fa98e9aad83dfd0a86f45e18b3c312665dce9b Gerrit-Change-Number: 25412 Gerrit-PatchSet: 1 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org>

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Change in coreboot[master]: src/include/hexutil.h: Add converters for working with hex strings
by Raul Rangel (Code Review) 28 Mar '18

28 Mar '18

Raul Rangel has uploaded this change for review. ( https://review.coreboot.org/25411 Change subject: src/include/hexutil.h: Add converters for working with hex strings ...................................................................... src/include/hexutil.h: Add converters for working with hex strings These utilities will be used as part of fixing SMBIOS generation for soc/amd. I have a bunch of unit tests for these functions outside of this commit. Is there somewhere I can commit them? BUG=b:65403853 TEST=tested on grunt Change-Id: Ifcabf09be4dc053f8b6e132b4014380cdb5c521b Signed-off-by: Raul E Rangel <rrangel(a)chromium.org> --- A src/include/hexutil.h M src/lib/Makefile.inc A src/lib/hexutil.c 3 files changed, 137 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/25411/1 diff --git a/src/include/hexutil.h b/src/include/hexutil.h new file mode 100644 index 0000000..847d39c --- /dev/null +++ b/src/include/hexutil.h @@ -0,0 +1,55 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2018 Google LLC. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef HEXUTIL_H +#define HEXUTIL_H + +#include <stddef.h> +#include <stdint.h> + +/** + * Decodes a hex character [0-9A-Za-z] into a byte. + * + * Invalid characters are mapped to 0. + * */ +uint8_t decode_hex_character(char hex); + +/** + * Decodes a hex string into a byte array. + * + * Examples: + * * "01AF" => {0x01, 0xAF} + * * "1AF" => {0x01, 0xAF} + * * "1AF" => {0x00, 0x00, 0x01, 0xAF} w/ 4 byte dest buffer. + * + * @param src_size size of the src buffer + * @param dest_size must be at least (strlen(src) + 1) / 2 in size. If the + * buffer is bigger than required the most significant bytes are cleared. + */ +void decode_hex_string(const char *src, size_t src_size, uint8_t *dest, + size_t dest_size); + +/** + * Encodes a byte array into a hex string. + * + * e.g., {0x01, 0x02} => "0102" + * + * @param dest_size must be at least (src_size * 2 + 1). If it is smaller, the + * least significant bytes will be truncated. + * @return number of characters written excluding the null terminator. + */ +size_t encode_as_hex_string(const uint8_t *src, size_t src_size, char *dest, + size_t dest_size); +#endif diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc index 960b5cb..3ae77a6 100644 --- a/src/lib/Makefile.inc +++ b/src/lib/Makefile.inc @@ -133,6 +133,7 @@ ramstage-$(CONFIG_GENERIC_GPIO_LIB) += gpio.c ramstage-$(CONFIG_GENERIC_UDELAY) += timer.c ramstage-y += b64_decode.c +ramstage-y += hexutil.c ramstage-$(CONFIG_ACPI_NHLT) += nhlt.c romstage-y += cbmem_common.c diff --git a/src/lib/hexutil.c b/src/lib/hexutil.c new file mode 100644 index 0000000..a41a94a --- /dev/null +++ b/src/lib/hexutil.c @@ -0,0 +1,81 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2018 Google LLC. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <hexutil.h> +#include <string.h> + +uint8_t decode_hex_character(char hex) +{ + if (isdigit(hex)) + return hex - '0'; + else if (isxdigit(hex) && isupper(hex)) + return hex - 'A' + 10; + else if (isxdigit(hex) && islower(hex)) + return hex - 'a' + 10; + else + return 0; +} + +void decode_hex_string(const char *src, size_t src_size, uint8_t *dest, + size_t dest_size) +{ + const size_t src_len = strnlen(src, src_size); + + for (size_t dest_idx = 0; dest_idx < dest_size; ++dest_idx) { + int src_idx = (src_len - 1) - dest_idx * 2; + + uint8_t byte = 0; + + if (src_idx >= 0) { + char low = src[src_idx]; + byte |= decode_hex_character(low); + } + + if (src_idx >= 1) { + char high = src[src_idx - 1]; + byte |= decode_hex_character(high) << 4; + } + + dest[(dest_size - 1) - dest_idx] = byte; + } +} + +size_t encode_as_hex_string(const uint8_t *src, size_t src_size, char *dest, + size_t dest_size) +{ + size_t cnt = 0; + + if (src_size == 0 && dest_size > 0) + dest[0] = '\0'; + + for (size_t src_idx = 0; src_idx < src_size; ++src_idx) { + size_t dest_offset = src_idx * 2; + + if (dest_offset + 3 <= dest_size) { + snprintf(dest + dest_offset, 3, "%02hhx", src[src_idx]); + cnt += 2; + } else if (dest_offset + 2 <= dest_size) { + snprintf(dest + dest_offset, 2, "%hhx", + src[src_idx] >> 4); + cnt += 1; + } else if (dest_offset < dest_size) { + dest[dest_offset] = '\0'; + + break; + } + } + + return cnt; +} -- To view, visit https://review.coreboot.org/25411 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ifcabf09be4dc053f8b6e132b4014380cdb5c521b Gerrit-Change-Number: 25411 Gerrit-PatchSet: 1 Gerrit-Owner: Raul Rangel <rrangel(a)chromium.org>

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Change in libgfxinit[master]: Add Pipe_Index to the Connectors.Post_On method
by Arthur Heymans (Code Review) 28 Mar '18

28 Mar '18

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/25410 Change subject: Add Pipe_Index to the Connectors.Post_On method ...................................................................... Add Pipe_Index to the Connectors.Post_On method On GMCH targets the Pipe index needs to be programmed in the output register. Change-Id: I6a614a9359c95adb59a1b6d0e34febe302fcfbf8 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M common/haswell_shared/hw-gfx-gma-connectors.adb M common/hw-gfx-gma-connectors.ads M common/hw-gfx-gma.adb M common/ironlake/hw-gfx-gma-connectors.adb 4 files changed, 8 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/libgfxinit refs/changes/10/25410/1 diff --git a/common/haswell_shared/hw-gfx-gma-connectors.adb b/common/haswell_shared/hw-gfx-gma-connectors.adb index 0aed750..6d5ec52 100644 --- a/common/haswell_shared/hw-gfx-gma-connectors.adb +++ b/common/haswell_shared/hw-gfx-gma-connectors.adb @@ -49,7 +49,8 @@ end Pre_On; procedure Post_On - (Port_Cfg : in Port_Config; + (Pipe : in Pipe_Index; + Port_Cfg : in Port_Config; PLL_Hint : in Word32; Success : out Boolean) is diff --git a/common/hw-gfx-gma-connectors.ads b/common/hw-gfx-gma-connectors.ads index 134b076..a1d0d1e 100644 --- a/common/hw-gfx-gma-connectors.ads +++ b/common/hw-gfx-gma-connectors.ads @@ -29,7 +29,8 @@ Success : out Boolean); procedure Post_On - (Port_Cfg : in Port_Config; + (Pipe : in Pipe_Index; + Port_Cfg : in Port_Config; PLL_Hint : in Word32; Success : out Boolean); pragma Warnings (GNATprove, On, "unused variable ""P*"""); diff --git a/common/hw-gfx-gma.adb b/common/hw-gfx-gma.adb index a4445ba..d6aa7cb 100644 --- a/common/hw-gfx-gma.adb +++ b/common/hw-gfx-gma.adb @@ -150,7 +150,8 @@ Framebuffer => Pipe_Cfg.Framebuffer); Connectors.Post_On - (Port_Cfg => Port_Cfg, + (Pipe => Pipe, + Port_Cfg => Port_Cfg, PLL_Hint => PLLs.Register_Value (Allocated_PLLs (Pipe)), Success => Success); diff --git a/common/ironlake/hw-gfx-gma-connectors.adb b/common/ironlake/hw-gfx-gma-connectors.adb index f18f64f..9bb0b68 100644 --- a/common/ironlake/hw-gfx-gma-connectors.adb +++ b/common/ironlake/hw-gfx-gma-connectors.adb @@ -60,7 +60,8 @@ end Pre_On; procedure Post_On - (Port_Cfg : in Port_Config; + (Pipe : in Pipe_Index; + Port_Cfg : in Port_Config; PLL_Hint : in Word32; Success : out Boolean) is -- To view, visit https://review.coreboot.org/25410 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: libgfxinit Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I6a614a9359c95adb59a1b6d0e34febe302fcfbf8 Gerrit-Change-Number: 25410 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>

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Change in libgfxinit[master]: Add flag to set up GMCH Panel Fitter
by Arthur Heymans (Code Review) 28 Mar '18

28 Mar '18

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/25409 Change subject: Add flag to set up GMCH Panel Fitter ...................................................................... Add flag to set up GMCH Panel Fitter Change-Id: I4949fbb5356bd244d3d6f3eec71847b6e683079a Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M common/hw-gfx-gma-config.ads.template M common/hw-gfx-gma-pipe_setup.adb M common/hw-gfx-gma-registers.ads 3 files changed, 15 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/libgfxinit refs/changes/09/25409/1 diff --git a/common/hw-gfx-gma-config.ads.template b/common/hw-gfx-gma-config.ads.template index 75e1481..ceac67b 100644 --- a/common/hw-gfx-gma-config.ads.template +++ b/common/hw-gfx-gma-config.ads.template @@ -58,6 +58,7 @@ VGA_Plane_Workaround : constant Boolean := CPU = Ivybridge; Has_GMCH_VGACNTRL : constant Boolean := false; Has_GMCH_DP_Transcoder : constant Boolean := false; + Has_GMCH_PFIT_CONTROL : constant Boolean := false; ----- Panel power: ----- Has_PP_Write_Protection : constant Boolean := CPU <= Ivybridge; diff --git a/common/hw-gfx-gma-pipe_setup.adb b/common/hw-gfx-gma-pipe_setup.adb index 8b02798..5328582 100644 --- a/common/hw-gfx-gma-pipe_setup.adb +++ b/common/hw-gfx-gma-pipe_setup.adb @@ -419,6 +419,16 @@ Value => Shift_Left (Word32 (Width), 16) or Word32 (Height)); end Setup_Ironlake_Panel_Fitter; + -- Simply set the pannel fitter to pipe A on which + -- the legacy VGA cycles are also displayed + procedure Setup_Gmch_Panel_Fitter + is + begin + Registers.Write + (Register => Registers.GMCH_PFIT_CONTROL, + Value => PF_CTRL_ENABLE); + end Setup_Gmch_Panel_Fitter; + procedure Setup_Scaling (Controller : in Controller_Type; Mode : in HW.GFX.Mode_Type; @@ -434,6 +444,8 @@ then if Config.Has_Plane_Control then Setup_Skylake_Pipe_Scaler (Controller, Mode, Framebuffer); + elsif Config.Has_GMCH_PFIT_CONTROL then + Setup_Gmch_Panel_Fitter; else Setup_Ironlake_Panel_Fitter (Controller, Mode, Framebuffer); end if; diff --git a/common/hw-gfx-gma-registers.ads b/common/hw-gfx-gma-registers.ads index 468d79d..480ee32 100644 --- a/common/hw-gfx-gma-registers.ads +++ b/common/hw-gfx-gma-registers.ads @@ -160,6 +160,7 @@ GMCH_PP_ON_DELAYS, GMCH_PP_OFF_DELAYS, GMCH_PP_DIVISOR, + GMCH_PFIT_CONTROL, PIPEB_DDI_FUNC_CTL, PIPEB_MSA_MISC, SRD_CTL_B, @@ -1293,6 +1294,7 @@ GMCH_PP_ON_DELAYS => 16#06_1208# / Register_Width, GMCH_PP_OFF_DELAYS => 16#06_120c# / Register_Width, GMCH_PP_DIVISOR => 16#06_1210# / Register_Width, + GMCH_PFIT_CONTROL => 16#06_1230# / Register_Width, PCH_PP_STATUS => 16#0c_7200# / Register_Width, PCH_PP_CONTROL => 16#0c_7204# / Register_Width, PCH_PP_ON_DELAYS => 16#0c_7208# / Register_Width, -- To view, visit https://review.coreboot.org/25409 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: libgfxinit Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I4949fbb5356bd244d3d6f3eec71847b6e683079a Gerrit-Change-Number: 25409 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>

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Change in libgfxinit[master]: Add flag to use GMCH PP registers
by Arthur Heymans (Code Review) 28 Mar '18

28 Mar '18

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/25408 Change subject: Add flag to use GMCH PP registers ...................................................................... Add flag to use GMCH PP registers Change-Id: Ia94af6340bdf329328f265fb9424224c1ab5f45f Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M common/hw-gfx-gma-config.ads.template M common/hw-gfx-gma-panel.adb M common/hw-gfx-gma-registers.ads 3 files changed, 46 insertions(+), 17 deletions(-) git pull ssh://review.coreboot.org:29418/libgfxinit refs/changes/08/25408/1 diff --git a/common/hw-gfx-gma-config.ads.template b/common/hw-gfx-gma-config.ads.template index 8a39359..75e1481 100644 --- a/common/hw-gfx-gma-config.ads.template +++ b/common/hw-gfx-gma-config.ads.template @@ -63,6 +63,7 @@ Has_PP_Write_Protection : constant Boolean := CPU <= Ivybridge; Has_PP_Port_Select : constant Boolean := CPU <= Ivybridge; Use_PP_VDD_Override : constant Boolean := CPU <= Ivybridge; + Has_PCH_Panel_Power : constant Boolean := CPU >= Ironlake; ----- PCH/FDI: --------- Has_PCH : constant Boolean := CPU /= Broxton; diff --git a/common/hw-gfx-gma-panel.adb b/common/hw-gfx-gma-panel.adb index 1b6a31d..60a74c9 100644 --- a/common/hw-gfx-gma-panel.adb +++ b/common/hw-gfx-gma-panel.adb @@ -86,6 +86,24 @@ PCH_PP_ON_DELAYS_PORT_SELECT_DP_D : constant := 16#00_0003# * 2 ** 30; PCH_PP_ON_DELAYS_PWR_UP_MASK : constant := 16#00_1fff# * 2 ** 16; PCH_PP_ON_DELAYS_PWR_UP_BL_ON_MASK : constant := 16#00_1fff# * 2 ** 0; + + PP_STATUS_REGs : constant array (Boolean) of Registers.Registers_Index + := (Registers.GMCH_PP_STATUS, Registers.PCH_PP_STATUS); + PP_CONTROL_REGs : constant array (Boolean) of Registers.Registers_Index + := (Registers.GMCH_PP_CONTROL, Registers.PCH_PP_CONTROL); + PP_ON_DELAYS_REGs : constant array (Boolean) of Registers.Registers_Index + := (Registers.GMCH_PP_ON_DELAYS, Registers.PCH_PP_ON_DELAYS); + PP_OFF_DELAYS_REGs : constant array (Boolean) of Registers.Registers_Index + := (Registers.GMCH_PP_OFF_DELAYS, Registers.PCH_PP_OFF_DELAYS); + PP_DIVISOR_REGs : constant array (Boolean) of Registers.Registers_Index + := (Registers.GMCH_PP_DIVISOR, Registers.PCH_PP_DIVISOR); + + PP_STATUS_REG : constant Registers.Registers_Index := PP_STATUS_REGs (Config.Has_PCH_Panel_Power); + PP_CONTROL_REG : constant Registers.Registers_Index := PP_CONTROL_REGs (Config.Has_PCH_Panel_Power); + PP_ON_DELAYS_REG : constant Registers.Registers_Index := PP_ON_DELAYS_REGs (Config.Has_PCH_Panel_Power); + PP_OFF_DELAYS_REG : constant Registers.Registers_Index := PP_OFF_DELAYS_REGs (Config.Has_PCH_Panel_Power); + PP_DIVISOR_REG : constant Registers.Registers_Index := PP_DIVISOR_REGs (Config.Has_PCH_Panel_Power); + function PCH_PP_ON_DELAYS_PWR_UP (US : Natural) return Word32 is begin return Shift_Left (Div_Round_Up32 (US, 100), 16); @@ -175,19 +193,19 @@ if Default_Delays then Override_Delays := True; else - Registers.Read (Registers.PCH_PP_ON_DELAYS, Power_Delay); + Registers.Read (PP_ON_DELAYS_REG, Power_Delay); Delays_US (Power_Up_Delay) := 100 * Natural (Shift_Right (Power_Delay and PCH_PP_ON_DELAYS_PWR_UP_MASK, 16)); Delays_US (Power_Up_To_BL_On) := 100 * Natural (Power_Delay and PCH_PP_ON_DELAYS_PWR_UP_BL_ON_MASK); - Registers.Read (Registers.PCH_PP_OFF_DELAYS, Power_Delay); + Registers.Read (PP_OFF_DELAYS_REG, Power_Delay); Delays_US (Power_Down_Delay) := 100 * Natural (Shift_Right (Power_Delay and PCH_PP_OFF_DELAYS_PWR_DOWN_MASK, 16)); Delays_US (BL_Off_To_Power_Down) := 100 * Natural (Power_Delay and PCH_PP_OFF_DELAYS_BL_OFF_PWR_DOWN_MASK); - Registers.Read (Registers.PCH_PP_DIVISOR, Power_Delay); + Registers.Read (PP_DIVISOR_REG, Power_Delay); if (Power_Delay and PCH_PP_DIVISOR_PWR_CYC_DELAY_MASK) > 1 then Delays_US (Power_Cycle_Delay) := 100_000 * (Natural (Power_Delay and PCH_PP_DIVISOR_PWR_CYC_DELAY_MASK) - 1); @@ -209,7 +227,7 @@ -- Force power-up to backlight-on delay to 100us as recommended by PRM. Registers.Unset_And_Set_Mask - (Register => Registers.PCH_PP_ON_DELAYS, + (Register => PP_ON_DELAYS_REG, Mask_Unset => PCH_PP_ON_DELAYS_PORT_SELECT_MASK or PCH_PP_ON_DELAYS_PWR_UP_MASK or PCH_PP_ON_DELAYS_PWR_UP_BL_ON_MASK, @@ -218,7 +236,7 @@ or PCH_PP_ON_DELAYS_PWR_UP_BL_ON (100)); Registers.Unset_And_Set_Mask - (Register => Registers.PCH_PP_OFF_DELAYS, + (Register => PP_OFF_DELAYS_REG, Mask_Unset => PCH_PP_OFF_DELAYS_PWR_DOWN_MASK or PCH_PP_OFF_DELAYS_BL_OFF_PWR_DOWN_MASK, Mask_Set => PCH_PP_OFF_DELAYS_PWR_DOWN @@ -227,7 +245,7 @@ (Delays_US (BL_Off_To_Power_Down))); Registers.Unset_And_Set_Mask - (Register => Registers.PCH_PP_DIVISOR, + (Register => PP_DIVISOR_REG, Mask_Unset => PCH_PP_DIVISOR_PWR_CYC_DELAY_MASK, Mask_Set => PCH_PP_DIVISOR_PWR_CYC_DELAY (Delays_US (Power_Cycle_Delay))); @@ -235,13 +253,13 @@ if Config.Has_PP_Write_Protection then Registers.Unset_And_Set_Mask - (Register => Registers.PCH_PP_CONTROL, + (Register => PP_CONTROL_REG, Mask_Unset => PCH_PP_CONTROL_WRITE_PROTECT_MASK, Mask_Set => PCH_PP_CONTROL_WRITE_PROTECT_KEY or PCH_PP_CONTROL_POWER_DOWN_ON_RESET); else Registers.Set_Mask - (Register => Registers.PCH_PP_CONTROL, + (Register => PP_CONTROL_REG, Mask => PCH_PP_CONTROL_POWER_DOWN_ON_RESET); end if; end Setup_PP_Sequencer; @@ -265,12 +283,12 @@ begin pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity)); - Registers.Is_Set_Mask (Registers.PCH_PP_CONTROL, PCH_PP_CONTROL_TARGET_ON, Was_On); + Registers.Is_Set_Mask (PP_CONTROL_REG, PCH_PP_CONTROL_TARGET_ON, Was_On); if not Was_On then Time.Delay_Until (Power_Cycle_Timer); end if; - Registers.Set_Mask (Registers.PCH_PP_CONTROL, PCH_PP_CONTROL_TARGET_ON); + Registers.Set_Mask (PP_CONTROL_REG, PCH_PP_CONTROL_TARGET_ON); if not Was_On then Power_Up_Timer := Time.US_From_Now (Delays_US (Power_Up_Delay)); end if; @@ -285,11 +303,11 @@ Time.Delay_Until (Power_Up_Timer); Registers.Wait_Unset_Mask - (Register => Registers.PCH_PP_STATUS, + (Register => PP_STATUS_REG, Mask => PCH_PP_STATUS_PWR_SEQ_PROGRESS_MASK, TOut_MS => 300); - Registers.Unset_Mask (Registers.PCH_PP_CONTROL, PCH_PP_CONTROL_VDD_OVERRIDE); + Registers.Unset_Mask (PP_CONTROL_REG, PCH_PP_CONTROL_VDD_OVERRIDE); end Wait_On; procedure Off @@ -298,16 +316,16 @@ begin pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity)); - Registers.Is_Set_Mask (Registers.PCH_PP_CONTROL, PCH_PP_CONTROL_TARGET_ON, Was_On); + Registers.Is_Set_Mask (PP_CONTROL_REG, PCH_PP_CONTROL_TARGET_ON, Was_On); Registers.Unset_Mask - (Register => Registers.PCH_PP_CONTROL, + (Register => PP_CONTROL_REG, Mask => PCH_PP_CONTROL_TARGET_ON or PCH_PP_CONTROL_VDD_OVERRIDE); if Was_On then Time.U_Delay (Delays_US (Power_Down_Delay)); end if; Registers.Wait_Unset_Mask - (Register => Registers.PCH_PP_STATUS, + (Register => PP_STATUS_REG, Mask => PCH_PP_STATUS_PWR_SEQ_PROGRESS_MASK, TOut_MS => 600); if Was_On then @@ -322,7 +340,7 @@ pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity)); Registers.Set_Mask - (Register => Registers.PCH_PP_CONTROL, + (Register => PP_CONTROL_REG, Mask => PCH_PP_CONTROL_BACKLIGHT_ENABLE); end Backlight_On; @@ -331,7 +349,7 @@ pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity)); Registers.Unset_Mask - (Register => Registers.PCH_PP_CONTROL, + (Register => PP_CONTROL_REG, Mask => PCH_PP_CONTROL_BACKLIGHT_ENABLE); end Backlight_Off; diff --git a/common/hw-gfx-gma-registers.ads b/common/hw-gfx-gma-registers.ads index 40d3437..468d79d 100644 --- a/common/hw-gfx-gma-registers.ads +++ b/common/hw-gfx-gma-registers.ads @@ -155,6 +155,11 @@ PIPEB_LINK_M1, PIPEB_LINK_N1, FDI_TX_CTL_B, + GMCH_PP_STATUS, + GMCH_PP_CONTROL, + GMCH_PP_ON_DELAYS, + GMCH_PP_OFF_DELAYS, + GMCH_PP_DIVISOR, PIPEB_DDI_FUNC_CTL, PIPEB_MSA_MISC, SRD_CTL_B, @@ -1283,6 +1288,11 @@ PWR_WELL_CTL6 => 16#04_5414# / Register_Width, -- class Panel registers + GMCH_PP_STATUS => 16#06_1200# / Register_Width, + GMCH_PP_CONTROL => 16#06_1204# / Register_Width, + GMCH_PP_ON_DELAYS => 16#06_1208# / Register_Width, + GMCH_PP_OFF_DELAYS => 16#06_120c# / Register_Width, + GMCH_PP_DIVISOR => 16#06_1210# / Register_Width, PCH_PP_STATUS => 16#0c_7200# / Register_Width, PCH_PP_CONTROL => 16#0c_7204# / Register_Width, PCH_PP_ON_DELAYS => 16#0c_7208# / Register_Width, -- To view, visit https://review.coreboot.org/25408 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: libgfxinit Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ia94af6340bdf329328f265fb9424224c1ab5f45f Gerrit-Change-Number: 25408 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>

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Change in libgfxinit[master]: Add GPU_Port types that are convenient for GMCH to use
by Arthur Heymans (Code Review) 28 Mar '18

28 Mar '18

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/25407 Change subject: Add GPU_Port types that are convenient for GMCH to use ...................................................................... Add GPU_Port types that are convenient for GMCH to use Change-Id: I9120d084637d36a7e2276fcf3f630b3f7ed32509 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M common/haswell_shared/hw-gfx-gma-connectors-ddi.ads M common/haswell_shared/hw-gfx-gma-connectors.adb M common/hw-gfx-gma-connector_info.adb M common/hw-gfx-gma.ads 4 files changed, 25 insertions(+), 11 deletions(-) git pull ssh://review.coreboot.org:29418/libgfxinit refs/changes/07/25407/1 diff --git a/common/haswell_shared/hw-gfx-gma-connectors-ddi.ads b/common/haswell_shared/hw-gfx-gma-connectors-ddi.ads index ec1fce2..d43db97 100644 --- a/common/haswell_shared/hw-gfx-gma-connectors-ddi.ads +++ b/common/haswell_shared/hw-gfx-gma-connectors-ddi.ads @@ -22,9 +22,14 @@ procedure Pre_On (Port_Cfg : in Port_Config; PLL_Hint : in Word32; - Success : out Boolean); + Success : out Boolean) + with + Pre => Port_Cfg.Port in Digital_Port; - procedure Post_On (Port_Cfg : Port_Config); + procedure Post_On (Port_Cfg : Port_Config) + with + Pre => Port_Cfg.Port in Digital_Port; + procedure Off (Port : Digital_Port); diff --git a/common/haswell_shared/hw-gfx-gma-connectors.adb b/common/haswell_shared/hw-gfx-gma-connectors.adb index 0d0ed71..0aed750 100644 --- a/common/haswell_shared/hw-gfx-gma-connectors.adb +++ b/common/haswell_shared/hw-gfx-gma-connectors.adb @@ -41,8 +41,11 @@ is begin pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity)); - - DDI.Pre_On (Port_Cfg, PLL_Hint, Success); + if Port_Cfg.Port in Digital_Port then + DDI.Pre_On (Port_Cfg, PLL_Hint, Success); + else + success := False; -- Should not happen + end if; end Pre_On; procedure Post_On @@ -53,10 +56,12 @@ begin pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity)); - DDI.Post_On (Port_Cfg); + if Port_Cfg.Port in Digital_Port then + DDI.Post_On (Port_Cfg); - if Port_Cfg.Port = DIGI_A then - Panel.Backlight_On; + if Port_Cfg.Port = DIGI_A then + Panel.Backlight_On; + end if; end if; Success := True; @@ -79,8 +84,9 @@ is begin pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity)); - - DDI.Off (Port_Cfg.Port); + if Port_Cfg.Port in Digital_Port then + DDI.Off (Port_Cfg.Port); + end if; end Post_Off; ---------------------------------------------------------------------------- diff --git a/common/hw-gfx-gma-connector_info.adb b/common/hw-gfx-gma-connector_info.adb index 798e61c..e8357be 100644 --- a/common/hw-gfx-gma-connector_info.adb +++ b/common/hw-gfx-gma-connector_info.adb @@ -87,7 +87,8 @@ begin return (if Port_Cfg.Port = DIGI_A or - (Port_Cfg.Is_FDI and Port_Cfg.PCH_Port = PCH_LVDS) + (Port_Cfg.Is_FDI and Port_Cfg.PCH_Port = PCH_LVDS) or + Port_Cfg.Port = LVDS then 6 else 8); end Default_BPC; diff --git a/common/hw-gfx-gma.ads b/common/hw-gfx-gma.ads index 50a76a0..fadf437 100644 --- a/common/hw-gfx-gma.ads +++ b/common/hw-gfx-gma.ads @@ -126,9 +126,11 @@ subtype Active_Port_Type is Port_Type range Port_Type'Succ (Disabled) .. Port_Type'Last; - type GPU_Port is (DIGI_A, DIGI_B, DIGI_C, DIGI_D, DIGI_E); + type GPU_Port is (DIGI_A, DIGI_B, DIGI_C, DIGI_D, DIGI_E, LVDS, VGA); subtype Digital_Port is GPU_Port range DIGI_A .. DIGI_E; + subtype GMCH_DP_Port is GPU_Port range DIGI_B .. DIGI_D; + subtype GMCH_HDMI_Port is GPU_Port range DIGI_B .. DIGI_C; type PCH_Port is (PCH_DAC, PCH_LVDS, -- To view, visit https://review.coreboot.org/25407 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: libgfxinit Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I9120d084637d36a7e2276fcf3f630b3f7ed32509 Gerrit-Change-Number: 25407 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>

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Change in libgfxinit[master]: Add a flag to use GMCH transcoder registers
by Arthur Heymans (Code Review) 28 Mar '18

28 Mar '18

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/25406 Change subject: Add a flag to use GMCH transcoder registers ...................................................................... Add a flag to use GMCH transcoder registers Change-Id: Ic9bff918bdcab3c5c55316cb6de1a8a8bf1c6430 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M common/hw-gfx-gma-config.ads.template M common/hw-gfx-gma-registers.ads M common/hw-gfx-gma-transcoder.adb M common/hw-gfx-gma-transcoder.ads 4 files changed, 57 insertions(+), 9 deletions(-) git pull ssh://review.coreboot.org:29418/libgfxinit refs/changes/06/25406/1 diff --git a/common/hw-gfx-gma-config.ads.template b/common/hw-gfx-gma-config.ads.template index 076f681..8a39359 100644 --- a/common/hw-gfx-gma-config.ads.template +++ b/common/hw-gfx-gma-config.ads.template @@ -57,6 +57,7 @@ Has_PF_Pipe_Select : constant Boolean := CPU in Ivybridge .. Haswell; VGA_Plane_Workaround : constant Boolean := CPU = Ivybridge; Has_GMCH_VGACNTRL : constant Boolean := false; + Has_GMCH_DP_Transcoder : constant Boolean := false; ----- Panel power: ----- Has_PP_Write_Protection : constant Boolean := CPU <= Ivybridge; diff --git a/common/hw-gfx-gma-registers.ads b/common/hw-gfx-gma-registers.ads index 37e62e8..40d3437 100644 --- a/common/hw-gfx-gma-registers.ads +++ b/common/hw-gfx-gma-registers.ads @@ -436,6 +436,10 @@ PIPEACONF, PIPEAMISC, PIPE_FRMCNT_A, + PIPEA_GMCH_DATA_M, + PIPEA_GMCH_DATA_N, + PIPEA_GMCH_LINK_M, + PIPEA_GMCH_LINK_N, DSPACNTR, DSPALINOFF, DSPASTRIDE, @@ -457,6 +461,10 @@ PIPEBCONF, PIPEBMISC, PIPE_FRMCNT_B, + PIPEB_GMCH_DATA_M, + PIPEB_GMCH_DATA_N, + PIPEB_GMCH_LINK_M, + PIPEB_GMCH_LINK_N, DSPBCNTR, DSPBLINOFF, DSPBSTRIDE, @@ -707,6 +715,10 @@ PIPEA_DATA_N1 => 16#06_0034# / Register_Width, PIPEA_LINK_M1 => 16#06_0040# / Register_Width, PIPEA_LINK_N1 => 16#06_0044# / Register_Width, + PIPEA_GMCH_DATA_M => 16#07_0050# / Register_Width, + PIPEA_GMCH_DATA_N => 16#07_0054# / Register_Width, + PIPEA_GMCH_LINK_M => 16#07_0060# / Register_Width, + PIPEA_GMCH_LINK_N => 16#07_0064# / Register_Width, PIPEA_DDI_FUNC_CTL => 16#06_0400# / Register_Width, PIPEA_MSA_MISC => 16#06_0410# / Register_Width, @@ -798,6 +810,10 @@ PIPEB_DATA_N1 => 16#06_1034# / Register_Width, PIPEB_LINK_M1 => 16#06_1040# / Register_Width, PIPEB_LINK_N1 => 16#06_1044# / Register_Width, + PIPEB_GMCH_DATA_M => 16#07_1050# / Register_Width, + PIPEB_GMCH_DATA_N => 16#07_1054# / Register_Width, + PIPEB_GMCH_LINK_M => 16#07_1060# / Register_Width, + PIPEB_GMCH_LINK_N => 16#07_1064# / Register_Width, PIPEB_DDI_FUNC_CTL => 16#06_1400# / Register_Width, PIPEB_MSA_MISC => 16#06_1410# / Register_Width, diff --git a/common/hw-gfx-gma-transcoder.adb b/common/hw-gfx-gma-transcoder.adb index 91ef6b6..5990fcf 100644 --- a/common/hw-gfx-gma-transcoder.adb +++ b/common/hw-gfx-gma-transcoder.adb @@ -15,7 +15,6 @@ with HW.Debug; with GNAT.Source_Info; -with HW.GFX.GMA.Config; with HW.GFX.GMA.DP_Info; package body HW.GFX.GMA.Transcoder is diff --git a/common/hw-gfx-gma-transcoder.ads b/common/hw-gfx-gma-transcoder.ads index aa67eb4..281aeae 100644 --- a/common/hw-gfx-gma-transcoder.ads +++ b/common/hw-gfx-gma-transcoder.ads @@ -13,6 +13,7 @@ -- with HW.GFX.GMA.Registers; +with HW.GFX.GMA.Config; private package HW.GFX.GMA.Transcoder is @@ -49,6 +50,37 @@ type Transcoder_Array is array (Transcoder_Index) of Transcoder_Regs; + PIPE_DATA_M1 : constant array (0 .. 1) of Registers.Registers_Index := + (if Config.Has_GMCH_DP_Transcoder then + (0 => Registers.PIPEA_GMCH_DATA_M, + 1 => Registers.PIPEB_GMCH_DATA_M) + else + (0 => Registers.PIPEA_DATA_M1, + 1 => Registers.PIPEB_DATA_M1)); + PIPE_DATA_N1 : constant array (0 .. 1) of Registers.Registers_Index := + (if Config.Has_GMCH_DP_Transcoder then + (0 => Registers.PIPEA_GMCH_DATA_N, + 1 => Registers.PIPEB_GMCH_DATA_N) + else + (0 => Registers.PIPEA_DATA_N1, + 1 => Registers.PIPEB_DATA_N1)); + PIPE_LINK_M1 : constant array (0 .. 1) of Registers.Registers_Index := + (if Config.Has_GMCH_DP_Transcoder then + (0 => Registers.PIPEA_GMCH_LINK_M, + 1 => Registers.PIPEB_GMCH_LINK_M) + else + (0 => Registers.PIPEA_LINK_M1, + 1 => Registers.PIPEB_LINK_M1)); + PIPE_LINK_N1 : constant array (0 .. 1) of Registers.Registers_Index := + (if Config.Has_GMCH_DP_Transcoder then + (0 => Registers.PIPEA_GMCH_LINK_N, + 1 => Registers.PIPEB_GMCH_LINK_N) + else + (0 => Registers.PIPEA_LINK_N1, + 1 => Registers.PIPEB_LINK_N1)); + + + Transcoders : constant Transcoder_Array := (Trans_EDP => (HTOTAL => Registers.HTOTAL_EDP, @@ -73,10 +105,10 @@ VBLANK => Registers.VBLANK_A, VSYNC => Registers.VSYNC_A, CONF => Registers.PIPEACONF, - DATA_M1 => Registers.PIPEA_DATA_M1, - DATA_N1 => Registers.PIPEA_DATA_N1, - LINK_M1 => Registers.PIPEA_LINK_M1, - LINK_N1 => Registers.PIPEA_LINK_N1, + DATA_M1 => PIPE_DATA_M1(0), + DATA_N1 => PIPE_DATA_N1(0), + LINK_M1 => PIPE_LINK_M1(0), + LINK_N1 => PIPE_LINK_N1(0), DDI_FUNC_CTL => Registers.PIPEA_DDI_FUNC_CTL, MSA_MISC => Registers.PIPEA_MSA_MISC, CLK_SEL => Registers.TRANSA_CLK_SEL), @@ -88,10 +120,10 @@ VBLANK => Registers.VBLANK_B, VSYNC => Registers.VSYNC_B, CONF => Registers.PIPEBCONF, - DATA_M1 => Registers.PIPEB_DATA_M1, - DATA_N1 => Registers.PIPEB_DATA_N1, - LINK_M1 => Registers.PIPEB_LINK_M1, - LINK_N1 => Registers.PIPEB_LINK_N1, + DATA_M1 => PIPE_DATA_M1(1), + DATA_N1 => PIPE_DATA_N1(1), + LINK_M1 => PIPE_LINK_M1(1), + LINK_N1 => PIPE_LINK_N1(1), DDI_FUNC_CTL => Registers.PIPEB_DDI_FUNC_CTL, MSA_MISC => Registers.PIPEB_MSA_MISC, CLK_SEL => Registers.TRANSB_CLK_SEL), -- To view, visit https://review.coreboot.org/25406 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: libgfxinit Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ic9bff918bdcab3c5c55316cb6de1a8a8bf1c6430 Gerrit-Change-Number: 25406 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>

1 0

Change in libgfxinit[master]: Add flag to use GMCH GMBUS registers
by Arthur Heymans (Code Review) 28 Mar '18

28 Mar '18

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/25405 Change subject: Add flag to use GMCH GMBUS registers ...................................................................... Add flag to use GMCH GMBUS registers Change-Id: Id5d115c7a4711f634171e6e163439ebab4ee6076 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M common/hw-gfx-gma-config.ads.template M common/hw-gfx-gma-i2c.adb M common/hw-gfx-gma-registers.ads 3 files changed, 46 insertions(+), 17 deletions(-) git pull ssh://review.coreboot.org:29418/libgfxinit refs/changes/05/25405/1 diff --git a/common/hw-gfx-gma-config.ads.template b/common/hw-gfx-gma-config.ads.template index e6326de..076f681 100644 --- a/common/hw-gfx-gma-config.ads.template +++ b/common/hw-gfx-gma-config.ads.template @@ -110,6 +110,7 @@ ----- GMBUS: ----------- Ungate_GMBUS_Unit_Level : constant Boolean := CPU >= Skylake; GMBUS_Alternative_Pins : constant Boolean := CPU = Broxton; + Has_PCH_GMBUS : constant Boolean := CPU >= Ironlake; ----- Power: ----------- Has_IPS : constant Boolean := (CPU = Haswell and diff --git a/common/hw-gfx-gma-i2c.adb b/common/hw-gfx-gma-i2c.adb index 4b58dde..742080f 100644 --- a/common/hw-gfx-gma-i2c.adb +++ b/common/hw-gfx-gma-i2c.adb @@ -71,6 +71,22 @@ GMBUS5_2BYTE_INDEX_ENABLE : constant := 1 * 2 ** 31; + GMBUS_Regs : constant array (0 .. 5) of Registers.Registers_Index := + (if Config.Has_PCH_GMBUS then + (0 => Registers.PCH_GMBUS0, + 1 => Registers.PCH_GMBUS1, + 2 => Registers.PCH_GMBUS2, + 3 => Registers.PCH_GMBUS3, + 4 => Registers.PCH_GMBUS4, + 5 => Registers.PCH_GMBUS5) + else + (0 => Registers.GMCH_GMBUS0, + 1 => Registers.GMCH_GMBUS1, + 2 => Registers.GMCH_GMBUS2, + 3 => Registers.GMCH_GMBUS3, + 4 => Registers.GMCH_GMBUS4, + 5 => Registers.GMCH_GMBUS5)); + function GMBUS1_TOTAL_BYTE_COUNT (Count : HW.GFX.I2C.Transfer_Length) return Word32 is @@ -109,7 +125,7 @@ is GMBUS2 : Word32; begin - Registers.Read (Registers.PCH_GMBUS2, GMBUS2); + Registers.Read (GMBUS_Regs(2), GMBUS2); Result := (GMBUS2 and (GMBUS2_HARDWARE_WAIT_PHASE or GMBUS2_SLAVE_STALL_TIMEOUT_ERROR or GMBUS2_GMBUS_INTERRUPT_STATUS or @@ -120,9 +136,9 @@ begin pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity)); - Registers.Write (Registers.PCH_GMBUS1, GMBUS1_SOFTWARE_CLEAR_INTERRUPT); - Registers.Write (Registers.PCH_GMBUS1, 0); - Registers.Write (Registers.PCH_GMBUS0, GMBUS0_PIN_PAIR_SELECT_NONE); + Registers.Write (GMBUS_Regs(1), GMBUS1_SOFTWARE_CLEAR_INTERRUPT); + Registers.Write (GMBUS_Regs(1), 0); + Registers.Write (GMBUS_Regs(0), GMBUS0_PIN_PAIR_SELECT_NONE); GMBUS_Ready (Success); end Reset_GMBUS; @@ -138,7 +154,7 @@ end if; -- TODO: Refactor + check for timeout. - Registers.Wait_Unset_Mask (Registers.PCH_GMBUS2, GMBUS2_INUSE); + Registers.Wait_Unset_Mask (GMBUS_Regs(2), GMBUS2_INUSE); GMBUS_Ready (Success); if not Success then @@ -147,14 +163,14 @@ if Success then Registers.Write - (Register => Registers.PCH_GMBUS0, + (Register => GMBUS_Regs(0), Value => GMBUS0_GMBUS_RATE_SELECT_100KHZ or GMBUS0_PIN_PAIR_SELECT (Port)); Registers.Write - (Register => Registers.PCH_GMBUS4, + (Register => GMBUS_Regs(4), Value => 0); Registers.Write - (Register => Registers.PCH_GMBUS5, + (Register => GMBUS_Regs(5), Value => 0); end if; end Init_GMBUS; @@ -164,10 +180,10 @@ begin pragma Debug (Debug.Put_Line (GNAT.Source_Info.Enclosing_Entity)); - Registers.Write (Registers.PCH_GMBUS0, GMBUS0_PIN_PAIR_SELECT_NONE); + Registers.Write (GMBUS_Regs(0), GMBUS0_PIN_PAIR_SELECT_NONE); -- Clear INUSE. TODO: Don't do it, if timeout occured (see above). - Registers.Write (Registers.PCH_GMBUS2, GMBUS2_INUSE); + Registers.Write (GMBUS_Regs(2), GMBUS2_INUSE); if Config.Ungate_GMBUS_Unit_Level then Registers.Unset_Mask @@ -196,7 +212,7 @@ Init_GMBUS (Port, Success); if Success then Registers.Write - (Register => Registers.PCH_GMBUS1, + (Register => GMBUS_Regs(1), Value => GMBUS1_SOFTWARE_READY or GMBUS1_BUS_CYCLE_INDEX or GMBUS1_BUS_CYCLE_WAIT or @@ -206,17 +222,17 @@ while Success and then Transfered < Length loop Registers.Wait_Set_Mask - (Register => Registers.PCH_GMBUS2, + (Register => GMBUS_Regs(2), Mask => GMBUS2_HARDWARE_READY, TOut_MS => 55); - Registers.Read (Registers.PCH_GMBUS2, GMBUS2); + Registers.Read (GMBUS_Regs(2), GMBUS2); Success := (GMBUS2 and GMBUS2_HARDWARE_READY) /= 0 and (GMBUS2 and GMBUS2_NAK_INDICATOR) = 0; if Success then Current := GFX.I2C.Transfer_Length'Min (Length, Transfered + 4); - Registers.Read (Registers.PCH_GMBUS3, GMBUS3); + Registers.Read (GMBUS_Regs(3), GMBUS3); for I in Transfered .. Current - 1 loop Data (I) := Byte (GMBUS3 and 16#ff#); GMBUS3 := Shift_Right (GMBUS3, 8); @@ -226,13 +242,13 @@ end loop; if Success then Registers.Wait_Set_Mask - (Register => Registers.PCH_GMBUS2, + (Register => GMBUS_Regs(2), Mask => GMBUS2_HARDWARE_WAIT_PHASE); Registers.Write - (Register => Registers.PCH_GMBUS1, + (Register => GMBUS_Regs(1), Value => GMBUS1_SOFTWARE_READY or GMBUS1_BUS_CYCLE_STOP); Registers.Wait_Unset_Mask - (Register => Registers.PCH_GMBUS2, + (Register => GMBUS_Regs(2), Mask => GMBUS2_GMBUS_ACTIVE); end if; end if; diff --git a/common/hw-gfx-gma-registers.ads b/common/hw-gfx-gma-registers.ads index 1515fab..37e62e8 100644 --- a/common/hw-gfx-gma-registers.ads +++ b/common/hw-gfx-gma-registers.ads @@ -44,6 +44,12 @@ ARB_MODE, HWS_PGA, GAM_ECOCHK, + GMCH_GMBUS0, + GMCH_GMBUS1, + GMCH_GMBUS2, + GMCH_GMBUS3, + GMCH_GMBUS4, + GMCH_GMBUS5, MBCTL, UCGCTL1, UCGCTL2, @@ -1347,6 +1353,12 @@ SDEIER => 16#0c_400c# / Register_Width, -- I2C stuff + GMCH_GMBUS0 => 16#00_5100# / Register_Width, + GMCH_GMBUS1 => 16#00_5104# / Register_Width, + GMCH_GMBUS2 => 16#00_5108# / Register_Width, + GMCH_GMBUS3 => 16#00_510c# / Register_Width, + GMCH_GMBUS4 => 16#00_5110# / Register_Width, + GMCH_GMBUS5 => 16#00_5120# / Register_Width, PCH_GMBUS0 => 16#0c_5100# / Register_Width, PCH_GMBUS1 => 16#0c_5104# / Register_Width, PCH_GMBUS2 => 16#0c_5108# / Register_Width, -- To view, visit https://review.coreboot.org/25405 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: libgfxinit Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Id5d115c7a4711f634171e6e163439ebab4ee6076 Gerrit-Change-Number: 25405 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>

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Change in libgfxinit[master]: Add flag to allow use of VGACNTRL on GMCH
by Arthur Heymans (Code Review) 28 Mar '18

28 Mar '18

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/25404 Change subject: Add flag to allow use of VGACNTRL on GMCH ...................................................................... Add flag to allow use of VGACNTRL on GMCH Change-Id: If2f12f14b4f367cdfc8cc2c20402f2350e3bbba8 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M common/hw-gfx-gma-config.ads.template M common/hw-gfx-gma-pipe_setup.adb M common/hw-gfx-gma-registers.ads 3 files changed, 12 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/libgfxinit refs/changes/04/25404/1 diff --git a/common/hw-gfx-gma-config.ads.template b/common/hw-gfx-gma-config.ads.template index aa1c3cd..e6326de 100644 --- a/common/hw-gfx-gma-config.ads.template +++ b/common/hw-gfx-gma-config.ads.template @@ -56,6 +56,7 @@ Has_DSP_Linoff : constant Boolean := CPU <= Ivybridge; Has_PF_Pipe_Select : constant Boolean := CPU in Ivybridge .. Haswell; VGA_Plane_Workaround : constant Boolean := CPU = Ivybridge; + Has_GMCH_VGACNTRL : constant Boolean := false; ----- Panel power: ----- Has_PP_Write_Protection : constant Boolean := CPU <= Ivybridge; diff --git a/common/hw-gfx-gma-pipe_setup.adb b/common/hw-gfx-gma-pipe_setup.adb index e1ff835..8b02798 100644 --- a/common/hw-gfx-gma-pipe_setup.adb +++ b/common/hw-gfx-gma-pipe_setup.adb @@ -89,6 +89,11 @@ PS_CTRL_SCALER_MODE_7X5_EXTENDED : constant := 1 * 2 ** 28; PS_CTRL_FILTER_SELECT_MEDIUM_2 : constant := 1 * 2 ** 23; + VGACNTRL_REG : constant Registers.Registers_Index := + (if Config.Has_GMCH_VGACNTRL then + Registers.GMCH_VGACNTRL + else Registers.CPU_VGACNTRL); + --------------------------------------------------------------------------- function PLANE_WM_LINES (Lines : Natural) return Word32 is @@ -260,7 +265,7 @@ end if; Registers.Unset_And_Set_Mask - (Register => Registers.VGACNTRL, + (Register => VGACNTRL_REG, Mask_Unset => VGA_CONTROL_VGA_DISPLAY_DISABLE or VGA_CONTROL_BLINK_DUTY_CYCLE_MASK or VGA_CONTROL_VSYNC_BLINK_RATE_MASK, @@ -512,7 +517,7 @@ Port_IO.InB (Reg8, VGA_SR_DATA); Port_IO.OutB (VGA_SR_DATA, Reg8 or VGA_SR01_SCREEN_OFF); Time.U_Delay (100); -- PRM says 100us, Linux does 300 - Registers.Set_Mask (Registers.VGACNTRL, VGA_CONTROL_VGA_DISPLAY_DISABLE); + Registers.Set_Mask (VGACNTRL_REG, VGA_CONTROL_VGA_DISPLAY_DISABLE); end Legacy_VGA_Off; procedure All_Off diff --git a/common/hw-gfx-gma-registers.ads b/common/hw-gfx-gma-registers.ads index 87c8069..1515fab 100644 --- a/common/hw-gfx-gma-registers.ads +++ b/common/hw-gfx-gma-registers.ads @@ -64,7 +64,7 @@ BCS_PP_DCLV_HIGH, BCS_PP_DCLV_LOW, GAB_CTL_REG, - VGACNTRL, + CPU_VGACNTRL, FUSE_STATUS, ILK_DISPLAY_CHICKEN2, DSPCLK_GATE_D, @@ -468,6 +468,7 @@ PLANE_WM_1_B_7, PLANE_BUF_CFG_1_B, SPBCNTR, + GMCH_VGACNTRL, PIPE_SCANLINE_C, PIPECCONF, PIPECMISC, @@ -1284,7 +1285,8 @@ PCH_HDMID => 16#0e_1160# / Register_Width, -- Intel Registers - VGACNTRL => 16#04_1000# / Register_Width, + CPU_VGACNTRL => 16#04_1000# / Register_Width, + GMCH_VGACNTRL => 16#07_1400# / Register_Width, FUSE_STATUS => 16#04_2000# / Register_Width, FBA_CFB_BASE => 16#04_3200# / Register_Width, IPS_CTL => 16#04_3408# / Register_Width, -- To view, visit https://review.coreboot.org/25404 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: libgfxinit Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: If2f12f14b4f367cdfc8cc2c20402f2350e3bbba8 Gerrit-Change-Number: 25404 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>

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coreboot-gerrit March 2018