coreboot-gerrit March 2018

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: soc/intel/skylake: Limit xDCI feature when VBOOT is enabled
by build bot (Jenkins) (Code Review) 28 Mar '18

28 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25365 ) Change subject: soc/intel/skylake: Limit xDCI feature when VBOOT is enabled ...................................................................... Patch Set 2: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/69181/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/23530/ : SUCCESS -- To view, visit https://review.coreboot.org/25365 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ic3c84beac87452f17490de32082030880834501d Gerrit-Change-Number: 25365 Gerrit-PatchSet: 2 Gerrit-Owner: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 28 Mar 2018 22:11:04 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: arch/x86/smbios: Consider corner case of Part Number
by build bot (Jenkins) (Code Review) 28 Mar '18

28 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25377 ) Change subject: arch/x86/smbios: Consider corner case of Part Number ...................................................................... Patch Set 10: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/69179/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/23528/ : SUCCESS -- To view, visit https://review.coreboot.org/25377 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Id870c983584771dc1b60b1c99e95bbe7c0d25c4c Gerrit-Change-Number: 25377 Gerrit-PatchSet: 10 Gerrit-Owner: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Caveh Jalali <caveh(a)google.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Raul Rangel <rrangel(a)chromium.org> Gerrit-Reviewer: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Raul Rangel <rrangel(a)google.com> Gerrit-Comment-Date: Wed, 28 Mar 2018 21:42:54 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: soc/amd/common/block/pi/amd_late_init.c: Fix coverity issue CID 1387031
by build bot (Jenkins) (Code Review) 28 Mar '18

28 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25419 ) Change subject: soc/amd/common/block/pi/amd_late_init.c: Fix coverity issue CID 1387031 ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/69178/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/23527/ : SUCCESS -- To view, visit https://review.coreboot.org/25419 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I18fa5e9c73401575441b6810f1db80d11666368c Gerrit-Change-Number: 25419 Gerrit-PatchSet: 1 Gerrit-Owner: Richard Spiegel <richard.spiegel(a)silverbackltd.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 28 Mar 2018 20:48:06 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: soc/amd/common/block/pi/amd_late_init.c: Fix coverity issue CID 1387031
by Richard Spiegel (Code Review) 28 Mar '18

28 Mar '18

Richard Spiegel has uploaded this change for review. ( https://review.coreboot.org/25419 Change subject: soc/amd/common/block/pi/amd_late_init.c: Fix coverity issue CID 1387031 ...................................................................... soc/amd/common/block/pi/amd_late_init.c: Fix coverity issue CID 1387031 CID 1387031: Memory - illegal accesses (BUFFER_SIZE_WARNING). Calling strncpy with a maximum size argument of 19 bytes on destination array "dimm->module_part_number" of size 19 bytes might leave the destination string unterminated. Fix the size parameter. BUG=b:76202696 TEST=Build and boot kahlee, using special debug code to see the output strings, which was later removed. Change-Id: I18fa5e9c73401575441b6810f1db80d11666368c Signed-off-by: Richard Spiegel <richard.spiegel(a)silverbackltd.com> --- M src/soc/amd/common/block/pi/amd_late_init.c 1 file changed, 1 insertion(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/25419/1 diff --git a/src/soc/amd/common/block/pi/amd_late_init.c b/src/soc/amd/common/block/pi/amd_late_init.c index 48c1718..7c3d759 100644 --- a/src/soc/amd/common/block/pi/amd_late_init.c +++ b/src/soc/amd/common/block/pi/amd_late_init.c @@ -50,7 +50,7 @@ dimm->mod_id = dmi17->ManufacturerIdCode; dimm->bank_locator = 0; strncpy((char *)dimm->module_part_number, dmi17->PartNumber, - sizeof(dimm->module_part_number)); + sizeof(dimm->module_part_number) - 1); } static void print_dimm_info(const struct dimm_info *dimm) -- To view, visit https://review.coreboot.org/25419 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I18fa5e9c73401575441b6810f1db80d11666368c Gerrit-Change-Number: 25419 Gerrit-PatchSet: 1 Gerrit-Owner: Richard Spiegel <richard.spiegel(a)silverbackltd.com>

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Change in coreboot[master]: mb/intel/dg43gt/devicetree.cb: Remove superfluous whitespace
by build bot (Jenkins) (Code Review) 28 Mar '18

28 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25418 ) Change subject: mb/intel/dg43gt/devicetree.cb: Remove superfluous whitespace ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/69177/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/23526/ : SUCCESS -- To view, visit https://review.coreboot.org/25418 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I5d18dfea0b0a33995de805219bda3a73892e5fde Gerrit-Change-Number: 25418 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 28 Mar 2018 20:04:47 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: mb/intel/dg43gt/devicetree.cb: Remove superfluous whitespace
by Elyes HAOUAS (Code Review) 28 Mar '18

28 Mar '18

Elyes HAOUAS has uploaded this change for review. ( https://review.coreboot.org/25418 Change subject: mb/intel/dg43gt/devicetree.cb: Remove superfluous whitespace ...................................................................... mb/intel/dg43gt/devicetree.cb: Remove superfluous whitespace Change-Id: I5d18dfea0b0a33995de805219bda3a73892e5fde Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/intel/dg43gt/devicetree.cb 1 file changed, 6 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/18/25418/1 diff --git a/src/mainboard/intel/dg43gt/devicetree.cb b/src/mainboard/intel/dg43gt/devicetree.cb index 6d87794..70ba6bc 100644 --- a/src/mainboard/intel/dg43gt/devicetree.cb +++ b/src/mainboard/intel/dg43gt/devicetree.cb @@ -43,16 +43,16 @@ device pci 19.0 on end # GBE device pci 1a.0 on end # USB - device pci 1a.1 on end # USB - device pci 1a.2 on end # USB - device pci 1a.7 on end # USB + device pci 1a.1 on end # USB + device pci 1a.2 on end # USB + device pci 1a.7 on end # USB device pci 1b.0 on end # Audio device pci 1c.0 on end # PCIe 1 device pci 1c.1 off end # PCIe 2 device pci 1c.2 on end # PCIe 3 device pci 1c.3 on end # PCIe 4 - device pci 1c.4 off end # PCIe 5 - device pci 1c.5 off end # PCIe 6 + device pci 1c.4 off end # PCIe 5 + device pci 1c.5 off end # PCIe 6 device pci 1d.0 on end # USB device pci 1d.1 on end # USB device pci 1d.2 on end # USB @@ -108,7 +108,7 @@ device pci 1f.3 on # SMbus chip drivers/i2c/ck505 # SLG8XP549T register "mask" = "{ 0xff, 0xff, 0xff, - 0xff, 0xff, 0xff, 0xff, + 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff }" register "regs" = "{ 0x11, 0xd9, 0xff, -- To view, visit https://review.coreboot.org/25418 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I5d18dfea0b0a33995de805219bda3a73892e5fde Gerrit-Change-Number: 25418 Gerrit-PatchSet: 1 Gerrit-Owner: Elyes HAOUAS <ehaouas(a)noos.fr>

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Change in coreboot[master]: mainboard/google/zoombini: Enable HAVE_ACPI_RESUME
by build bot (Jenkins) (Code Review) 28 Mar '18

28 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25390 ) Change subject: mainboard/google/zoombini: Enable HAVE_ACPI_RESUME ...................................................................... Patch Set 2: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/69175/ : SUCCESS -- To view, visit https://review.coreboot.org/25390 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I9de84dfd450936b3bc08e016bec6cf5ae88eab3d Gerrit-Change-Number: 25390 Gerrit-PatchSet: 2 Gerrit-Owner: Vaibhav Shankar <vaibhav.shankar(a)intel.com> Gerrit-Reviewer: Aseda Aboagye <aaboagye(a)google.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: Vaibhav Shankar <vaibhav.shankar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 28 Mar 2018 19:15:51 +0000 Gerrit-HasComments: No Gerrit-HasLabels: No

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Change in coreboot[master]: mb/google/octopus: Fix wifi configuration
by build bot (Jenkins) (Code Review) 28 Mar '18

28 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25417 ) Change subject: mb/google/octopus: Fix wifi configuration ...................................................................... Patch Set 2: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/69176/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/23525/ : SUCCESS -- To view, visit https://review.coreboot.org/25417 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ic51a94902e2cac3491081ade32079e5b88719f45 Gerrit-Change-Number: 25417 Gerrit-PatchSet: 2 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Justin TerAvest <teravest(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 28 Mar 2018 19:11:52 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: mb/google/octopus: Fix wifi configuration
by build bot (Jenkins) (Code Review) 28 Mar '18

28 Mar '18

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/25417 ) Change subject: mb/google/octopus: Fix wifi configuration ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/69174/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/23524/ : SUCCESS -- To view, visit https://review.coreboot.org/25417 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ic51a94902e2cac3491081ade32079e5b88719f45 Gerrit-Change-Number: 25417 Gerrit-PatchSet: 1 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Justin TerAvest <teravest(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Wed, 28 Mar 2018 19:01:36 +0000 Gerrit-HasComments: No Gerrit-HasLabels: Yes

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Change in coreboot[master]: mb/google/octopus: Fix wifi configuration
by Furquan Shaikh (Code Review) 28 Mar '18

28 Mar '18

Furquan Shaikh has uploaded this change for review. ( https://review.coreboot.org/25417 Change subject: mb/google/octopus: Fix wifi configuration ...................................................................... mb/google/octopus: Fix wifi configuration This change updates devicetree and GPIO configurations to match the schematics: 1. pcie_rp...[2] is the one being used for wifi, thus, clk_req and deemphasis_enable for [2] need to be set instead of [0]. 2. WLAN power enable, wifi disable and PERST# GPIOs need to be configured correctly. BUG=b:76180142 TEST=Verified that wlan0 scan works. Change-Id: Ic51a94902e2cac3491081ade32079e5b88719f45 Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- M src/mainboard/google/octopus/variants/baseboard/devicetree.cb M src/mainboard/google/octopus/variants/baseboard/gpio.c 2 files changed, 18 insertions(+), 10 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/17/25417/1 diff --git a/src/mainboard/google/octopus/variants/baseboard/devicetree.cb b/src/mainboard/google/octopus/variants/baseboard/devicetree.cb index 7aa7038..f76f887 100644 --- a/src/mainboard/google/octopus/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/octopus/variants/baseboard/devicetree.cb @@ -3,20 +3,20 @@ device lapic 0 on end end - register "pcie_rp_clkreq_pin[0]" = "3" # wifi/bt + register "pcie_rp_clkreq_pin[2]" = "3" # wifi/bt # Disable unused clkreq of PCIe root ports + register "pcie_rp_clkreq_pin[0]" = "CLKREQ_DISABLED" register "pcie_rp_clkreq_pin[1]" = "CLKREQ_DISABLED" - register "pcie_rp_clkreq_pin[2]" = "CLKREQ_DISABLED" register "pcie_rp_clkreq_pin[3]" = "CLKREQ_DISABLED" register "pcie_rp_clkreq_pin[4]" = "CLKREQ_DISABLED" register "pcie_rp_clkreq_pin[5]" = "CLKREQ_DISABLED" # Set de-emphasis to disabled for PCIE WiFI (Thunderpeak) # as it is required for detection - register "pcie_rp_deemphasis_enable[0]" = "0" + register "pcie_rp_deemphasis_enable[2]" = "0" # Set de-emphasis to default (enabled) for remaining ports + register "pcie_rp_deemphasis_enable[0]" = "1" register "pcie_rp_deemphasis_enable[1]" = "1" - register "pcie_rp_deemphasis_enable[2]" = "1" register "pcie_rp_deemphasis_enable[3]" = "1" register "pcie_rp_deemphasis_enable[4]" = "1" register "pcie_rp_deemphasis_enable[5]" = "1" @@ -105,7 +105,11 @@ device pci 0f.2 on end # - Heci3 device pci 11.0 off end # - ISH device pci 12.0 off end # - SATA - device pci 13.0 on end # - PCIe-A 0 Onboard M2 Slot(Wifi) + device pci 13.0 on + chip drivers/intel/wifi + device pci 00.0 on end + end + end # - PCIe-A 0 Onboard M2 Slot(Wifi) device pci 13.1 off end # - PCIe-A 1 device pci 13.2 off end # - PCIe-A 2 device pci 13.3 off end # - PCIe-A 3 diff --git a/src/mainboard/google/octopus/variants/baseboard/gpio.c b/src/mainboard/google/octopus/variants/baseboard/gpio.c index a127f28..8ce0e89 100644 --- a/src/mainboard/google/octopus/variants/baseboard/gpio.c +++ b/src/mainboard/google/octopus/variants/baseboard/gpio.c @@ -161,17 +161,17 @@ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_115, NONE, DEEP, NF1, HIZCRx1, DISPUPD),/* LPSS_I2C7_SCL */ /* PCIE_WAKE[0:3]_B */ - PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_116, 1, DEEP, UP_20K, HIZCRx1, ENPU),/* PCIE_WAKE0_B -- WIFI_DISABLE_L */ + PAD_CFG_GPO(GPIO_116, 1, DEEP), /* WIFI_DISABLE_L */ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_117, NONE, DEEP, NF1, TxDRxE, DISPUPD),/* PCIE_WAKE1_B */ PAD_CFG_GPIO_HI_Z(GPIO_118, NONE, DEEP, HIZCRx0, DISPUPD),/* PCIE_WAKE2_B -- unused */ //TODO Reef uses PCIE_WAKE0 as GPI_SCI. Whats the difference? PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_119, NONE, DEEP, NF1, TxDRxE, DISPUPD),/* PCIE_WAKE3_B */ - /* PCIE_WAKE[0:3]_B */ + /* PCIE_CLKREQ[0:3]_B */ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_120, UP_20K, DEEP, NF1, HIZCRx1, ENPU),/* PCIE_CLKREQ0_B -- unused*/ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_121, UP_20K, DEEP, NF1, HIZCRx1, ENPU),/* PCIE_CLKREQ1_B -- unused */ PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_122, 0, DEEP, DN_20K, HIZCRx0, ENPD),/* PCIE_CLKREQ2_B -- EN_PP3300_WLAN */ - PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_123, UP_20K, DEEP, NF1, TxDRxE, ENPU),/* PCIE_CLKREQ3_B */ + PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_123, UP_20K, DEEP, NF1, TxDRxE, DISPUPD), /* PCIE_CLKREQ3_B */ /* DDI[0:1] SDA and SCL -- unused */ PAD_CFG_GPIO_HI_Z(GPIO_124, NONE, DEEP, HIZCRx0, DISPUPD),/* HV_DDI0_DDC_SDA -- unused */ @@ -218,7 +218,7 @@ PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_161, 0, DEEP, NONE, HIZCRx0, DISPUPD), /* AVS_I2S1_MCLK */ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_162, NONE, DEEP, NF1, HIZCRx0, DISPUPD), /* AVS_I2S1_BCLK */ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_163, NONE, DEEP, NF1, HIZCRx0, DISPUPD), /* AVS_I2S1_WS_SYNC */ - PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_164, 0, DEEP, NONE, HIZCRx0, ENPD), /* AVS_I2S1_SDI */ + PAD_CFG_GPO(GPIO_164, 0, DEEP), /* WLAN_PE_RST */ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_165, NONE, DEEP, NF1, HIZCRx0, DISPUPD), /* AVS_I2S1_SDO */ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_166, NONE, DEEP, NF2, HIZCRx0, SAME), /* AVS_I2S2_BCLK */ PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_167, NONE, DEEP, NF2, HIZCRx0, DISPUPD), /* AVS_I2S2_WS_SYNC */ @@ -234,7 +234,7 @@ /* SCC COMMUNITY GPIOS */ PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_176, 0, DEEP, NONE, HIZCRx0, DISPUPD), /* SMB_ALERTB */ PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_177, 0, DEEP, NONE, HIZCRx0, DISPUPD), /* SMB_CLK */ - PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_178, 0, DEEP, NONE, HIZCRx0, DISPUPD), /* SMB_DATA */ + PAD_CFG_GPO(GPIO_178, 1, DEEP), /* EN_PP3300_WLAN */ PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_189, 0, DEEP, NONE, TxDRxE, DISPUPD), /* OSC_CLK_OUT_0 */ PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_191, NONE, DEEP, NF1), /* CNV_BRI_DT */ PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_192, UP_20K, DEEP, NF1), /* CNV_BRI_RSP */ @@ -275,6 +275,10 @@ PAD_CFG_NF(GPIO_82, NONE, DEEP, NF1), /* H1_SLAVE_SPI_MISO */ /* GSPI0_MOSI */ PAD_CFG_NF(GPIO_83, NONE, DEEP, NF1), /* H1_SLAVE_SPI_MOSI_R */ + + /* Enable power to wifi early in bootblock and de-assert PERST#. */ + PAD_CFG_GPO(GPIO_178, 1, DEEP), /* EN_PP3300_WLAN */ + PAD_CFG_GPO(GPIO_164, 0, DEEP), /* WLAN_PE_RST */ }; const struct pad_config *__attribute__((weak)) -- To view, visit https://review.coreboot.org/25417 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ic51a94902e2cac3491081ade32079e5b88719f45 Gerrit-Change-Number: 25417 Gerrit-PatchSet: 1 Gerrit-Owner: Furquan Shaikh <furquan(a)google.com>

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coreboot-gerrit March 2018