Matthias Kaehlcke has posted comments on this change. ( https://review.coreboot.org/25023 )
Change subject: google/scarlet: Adjust K&D power sequence from software
......................................................................
Patch Set 2: Code-Review+1
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Gerrit-Owner: Brian Norris <briannorris(a)chromium.org>
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Brian Norris has uploaded a new patch set (#2). ( https://review.coreboot.org/25023 )
Change subject: google/scarlet: Adjust K&D power sequence from software
......................................................................
google/scarlet: Adjust K&D power sequence from software
Hardware updates have suggested we need to configure the K&D panel's
power sequence in software, not in hardware. Without this change, K&D
panels will no longer power on correctly and will instead display a
black screen.
Per K&D's suggestion, we tweak these two commands. From the little HW
docs I have, this looks like it's:
(Address 0xB7, Value 0x02) -> set BC_CTRL=bit(1) (Back light control) to
1
(Address 0xF1, Value 0x23) -> change GPO2_SEL=bits(0:3) from
MIPI_TE(0001b) to BC_CTRL (0010b)
BRANCH=scarlet
BUG=b:73133861
TEST=KD display with and without HW fix on Scarlet
Change-Id: Ia076a378b10417dd9891746f9bc1086360a0f6e6
Signed-off-by: Brian Norris <briannorris(a)chromium.org>
---
M src/mainboard/google/gru/mainboard.c
1 file changed, 2 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/25023/2
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Brian Norris has uploaded this change for review. ( https://review.coreboot.org/25023
Change subject: google/scarlet: Adjust K&D power sequence from software
......................................................................
google/scarlet: Adjust K&D power sequence from software
Hardware updates have suggested we need to configure the K&D panel's
power sequence in software, not in hardware. Without this change, K&D
panels will no longer power on correctly and will instead display a
black screen.
Per K&D's suggestion, we tweak these two commands. From the little HW
docs I have, this looks like it's:
(Address 0xB7, Value 0x02) -> set BC_CTRL=bit(1) (Back light control) to
1
(Address 0xF1, Value 0x23) -> change GPO2_SEL=bits(0:3) from
MIPI_TE(0001b) to BC_CTRL (0010b)
BRANCH=scarlet
BUG=b:73133861
TEST=KD display with and without HW fix on Scarlet
Change-Id: Ia076a378b10417dd9891746f9bc1086360a0f6e6
Signed-off-by: Brian Norris <briannorris(a)chromium.org>
---
M src/mainboard/google/gru/mainboard.c
1 file changed, 2 insertions(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/23/25023/1
diff --git a/src/mainboard/google/gru/mainboard.c b/src/mainboard/google/gru/mainboard.c
index 7cd9acd..c9f3c48 100644
--- a/src/mainboard/google/gru/mainboard.c
+++ b/src/mainboard/google/gru/mainboard.c
@@ -493,6 +493,7 @@
MIPI_INIT_CMD(0xB4, 0x00),
MIPI_INIT_CMD(0xB6, 0x80),
/* VCOM disable */
+ MIPI_INIT_CMD(0xB7, 0x02),
MIPI_INIT_CMD(0xB8, 0x80),
MIPI_INIT_CMD(0xBA, 0x43),
/* VCOM setting */
@@ -506,7 +507,7 @@
/* VGL setting */
MIPI_INIT_CMD(0xBF, 0x1A),
MIPI_INIT_CMD(0xF0, 0x39),
- MIPI_INIT_CMD(0xF1, 0x21),
+ MIPI_INIT_CMD(0xF1, 0x22),
/* Gamma setting */
MIPI_INIT_CMD(0xB0, 0x02),
MIPI_INIT_CMD(0xC0, 0x00),
--
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Gerrit-Change-Id: Ia076a378b10417dd9891746f9bc1086360a0f6e6
Gerrit-Change-Number: 25023
Gerrit-PatchSet: 1
Gerrit-Owner: Brian Norris <briannorris(a)chromium.org>
Hello Nick Vaccaro, Furquan Shaikh,
I'd like you to do a code review. Please visit
https://review.coreboot.org/25022
to review the following change.
Change subject: coreboot_table: Print GPIO state correctly for lb_gpios
......................................................................
coreboot_table: Print GPIO state correctly for lb_gpios
Looks like there's a typo in the GPIO state table we print as part of
assembling the coreboot tables. Of course, high GPIOs are represented as
1 and low GPIOs as 0. Fix this display bug.
Change-Id: I59b4d49955c13f920576dd09f463e2d399ab64e0
Signed-off-by: Julius Werner <jwerner(a)chromium.org>
---
M src/lib/coreboot_table.c
1 file changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/22/25022/1
diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c
index aeaff28..d03b771 100644
--- a/src/lib/coreboot_table.c
+++ b/src/lib/coreboot_table.c
@@ -186,10 +186,10 @@
printk(BIOS_INFO, " low | ");
switch (g->value) {
case 0:
- printk(BIOS_INFO, " high\n");
+ printk(BIOS_INFO, " low\n");
break;
case 1:
- printk(BIOS_INFO, " low\n");
+ printk(BIOS_INFO, " high\n");
break;
default:
printk(BIOS_INFO, "undefined\n");
--
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Gerrit-Change-Id: I59b4d49955c13f920576dd09f463e2d399ab64e0
Gerrit-Change-Number: 25022
Gerrit-PatchSet: 1
Gerrit-Owner: Julius Werner <jwerner(a)chromium.org>
Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com>
Gerrit-Reviewer: Nick Vaccaro <nvaccaro(a)chromium.org>