coreboot-gerrit December 2018

coreboot-gerrit@coreboot.org

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1832 discussions

Change in ...coreboot[master]: soc/intel/denverton_ns: Don't use device_t
by HAOUAS Elyes (Code Review) 02 Dec '18

02 Dec '18

Hello Patrick Rudolph, Vanessa Eusebio, build bot (Jenkins), David Guckian, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/30004 to look at the new patch set (#4). Change subject: soc/intel/denverton_ns: Don't use device_t ...................................................................... soc/intel/denverton_ns: Don't use device_t Use of device_t is deprecated. Change-Id: Ic29891d78514db3b7eed48414a14e4ff579436c0 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/soc/intel/denverton_ns/include/soc/soc_util.h M src/soc/intel/denverton_ns/soc_util.c 2 files changed, 87 insertions(+), 30 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/30004/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/30004 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic29891d78514db3b7eed48414a14e4ff579436c0 Gerrit-Change-Number: 30004 Gerrit-PatchSet: 4 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: David Guckian <david.guckian(a)intel.com> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: soc/intel/denverton_ns/soc_util.c: Don't use device_t
by HAOUAS Elyes (Code Review) 02 Dec '18

02 Dec '18

Hello Patrick Rudolph, Vanessa Eusebio, build bot (Jenkins), David Guckian, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/30004 to look at the new patch set (#3). Change subject: soc/intel/denverton_ns/soc_util.c: Don't use device_t ...................................................................... soc/intel/denverton_ns/soc_util.c: Don't use device_t Use of device_t is deprecated. Change-Id: Ic29891d78514db3b7eed48414a14e4ff579436c0 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/soc/intel/denverton_ns/include/soc/soc_util.h M src/soc/intel/denverton_ns/soc_util.c 2 files changed, 87 insertions(+), 30 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/30004/3 -- To view, visit https://review.coreboot.org/c/coreboot/+/30004 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic29891d78514db3b7eed48414a14e4ff579436c0 Gerrit-Change-Number: 30004 Gerrit-PatchSet: 3 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: David Guckian <david.guckian(a)intel.com> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: sb/intel/lynxpoint/pch.c: Don't use device_t
by HAOUAS Elyes (Code Review) 02 Dec '18

02 Dec '18

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30005 Change subject: sb/intel/lynxpoint/pch.c: Don't use device_t ...................................................................... sb/intel/lynxpoint/pch.c: Don't use device_t Use of device_t is deprecated. Change-Id: I3badd64d9ce8148c740d33c31ae599a3fcd363f1 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/southbridge/intel/lynxpoint/pch.c 1 file changed, 8 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/05/30005/1 diff --git a/src/southbridge/intel/lynxpoint/pch.c b/src/southbridge/intel/lynxpoint/pch.c index cb01de7..6596aa2 100644 --- a/src/southbridge/intel/lynxpoint/pch.c +++ b/src/southbridge/intel/lynxpoint/pch.c @@ -23,14 +23,17 @@ #include <device/pci_def.h> #include "pch.h" -static device_t pch_get_lpc_device(void) +#ifdef __SIMPLE_DEVICE__ +static pci_devfn_t pch_get_lpc_device(void) { -#ifdef __SMM__ return PCI_DEV(0, 0x1f, 0); -#else - return dev_find_slot(0, PCI_DEVFN(0x1f, 0)); -#endif } +#else +static struct device *pch_get_lpc_device(void) +{ + return dev_find_slot(0, PCI_DEVFN(0x1f, 0)); +} +#endif int pch_silicon_revision(void) { -- To view, visit https://review.coreboot.org/c/coreboot/+/30005 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I3badd64d9ce8148c740d33c31ae599a3fcd363f1 Gerrit-Change-Number: 30005 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: soc/intel/denverton_ns/soc_util.c: Don't use device_t
by HAOUAS Elyes (Code Review) 02 Dec '18

02 Dec '18

Hello Patrick Rudolph, Vanessa Eusebio, David Guckian, I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/30004 to look at the new patch set (#2). Change subject: soc/intel/denverton_ns/soc_util.c: Don't use device_t ...................................................................... soc/intel/denverton_ns/soc_util.c: Don't use device_t Use of device_t is deprecated. Change-Id: Ic29891d78514db3b7eed48414a14e4ff579436c0 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/soc/intel/denverton_ns/soc_util.c 1 file changed, 76 insertions(+), 26 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/30004/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/30004 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic29891d78514db3b7eed48414a14e4ff579436c0 Gerrit-Change-Number: 30004 Gerrit-PatchSet: 2 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: David Guckian <david.guckian(a)intel.com> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-MessageType: newpatchset

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Change in ...coreboot[master]: soc/intel/denverton_ns/soc_util.c: Don't use device_t
by Patrick Rudolph (Code Review) 02 Dec '18

02 Dec '18

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30004 ) Change subject: soc/intel/denverton_ns/soc_util.c: Don't use device_t ...................................................................... Patch Set 1: Code-Review+1 (1 comment) https://review.coreboot.org/#/c/30004/1/src/soc/intel/denverton_ns/soc_util… File src/soc/intel/denverton_ns/soc_util.c: https://review.coreboot.org/#/c/30004/1/src/soc/intel/denverton_ns/soc_util… PS1, Line 31: #if defined(__PRE_RAM__) || defined(__SMM__) #ifdef __SIMPLE_DEVICE__ -- To view, visit https://review.coreboot.org/c/coreboot/+/30004 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic29891d78514db3b7eed48414a14e4ff579436c0 Gerrit-Change-Number: 30004 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: David Guckian <david.guckian(a)intel.com> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Vanessa Eusebio <vanessa.f.eusebio(a)intel.com> Gerrit-Comment-Date: Sun, 02 Dec 2018 18:09:08 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: sb/intel/lynxpoint/usb_{e, x}hci.c: Don't use device_t
by Patrick Rudolph (Code Review) 02 Dec '18

02 Dec '18

Patrick Rudolph has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29932 ) Change subject: sb/intel/lynxpoint/usb_{e,x}hci.c: Don't use device_t ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/29932 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie75450c844e2317ded157465eb0fc6a9ec1b3ab0 Gerrit-Change-Number: 29932 Gerrit-PatchSet: 3 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 02 Dec 2018 18:07:40 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: soc/intel/denverton_ns/soc_util.c: Don't use device_t
by HAOUAS Elyes (Code Review) 02 Dec '18

02 Dec '18

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30004 Change subject: soc/intel/denverton_ns/soc_util.c: Don't use device_t ...................................................................... soc/intel/denverton_ns/soc_util.c: Don't use device_t Use of device_t is deprecated. Change-Id: Ic29891d78514db3b7eed48414a14e4ff579436c0 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/soc/intel/denverton_ns/soc_util.c 1 file changed, 76 insertions(+), 26 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/04/30004/1 diff --git a/src/soc/intel/denverton_ns/soc_util.c b/src/soc/intel/denverton_ns/soc_util.c index 780695a..9fb2159 100644 --- a/src/soc/intel/denverton_ns/soc_util.c +++ b/src/soc/intel/denverton_ns/soc_util.c @@ -28,45 +28,61 @@ #include <soc/pci_devs.h> #include <soc/systemagent.h> -device_t get_hostbridge_dev(void) -{ #if defined(__PRE_RAM__) || defined(__SMM__) +pci_devfn_t get_hostbridge_dev(void) +{ return PCI_DEV(0, SA_DEV, SA_FUNC); +} #else +struct device *get_hostbridge_dev(void) +{ return dev_find_slot(0, PCI_DEVFN(SA_DEV, SA_FUNC)); -#endif } +#endif -device_t get_lpc_dev(void) -{ #if defined(__PRE_RAM__) || defined(__SMM__) +pci_devfn_t get_lpc_dev(void) +{ return PCI_DEV(0, LPC_DEV, LPC_FUNC); +} #else +struct device *get_lpc_dev(void) +{ return dev_find_slot(0, PCI_DEVFN(LPC_DEV, LPC_FUNC)); -#endif } +#endif -device_t get_pmc_dev(void) -{ #if defined(__PRE_RAM__) || defined(__SMM__) +pci_devfn_t get_pmc_dev(void) +{ return PCI_DEV(0, PMC_DEV, PMC_FUNC); -#else - return dev_find_slot(0, PCI_DEVFN(PMC_DEV, PMC_FUNC)); -#endif } - -device_t get_smbus_dev(void) +#else +struct device *get_pmc_dev(void) { -#if defined(__PRE_RAM__) || defined(__SMM__) - return PCI_DEV(0, SMBUS_DEV, SMBUS_FUNC); -#else - return dev_find_slot(0, PCI_DEVFN(SMBUS_DEV, SMBUS_FUNC)); -#endif + return dev_find_slot(0, PCI_DEVFN(PMC_DEV, PMC_FUNC)); } +#endif + +#if defined(__PRE_RAM__) || defined(__SMM__) +pci_devfn_t get_smbus_dev(void) +{ + return PCI_DEV(0, SMBUS_DEV, SMBUS_FUNC); +} +#else +struct device *get_smbus_dev(void) +{ + return dev_find_slot(0, PCI_DEVFN(SMBUS_DEV, SMBUS_FUNC)); +} +#endif uint32_t get_pciebase(void) { - device_t dev; +#if defined(__PRE_RAM__) || defined(__SMM__) + pci_devfn_t dev; +#else + struct device *dev; +#endif u32 pciexbar_reg; dev = get_hostbridge_dev(); @@ -98,7 +114,11 @@ uint32_t get_pcielength(void) { - device_t dev; +#if defined(__PRE_RAM__) || defined(__SMM__) + pci_devfn_t dev; +#else + struct device *dev; +#endif u32 pciexbar_reg; dev = get_hostbridge_dev(); @@ -130,7 +150,12 @@ uint32_t get_tseg_memory(void) { - device_t dev = get_hostbridge_dev(); +#if defined(__PRE_RAM__) || defined(__SMM__) + pci_devfn_t dev; +#else + struct device *dev; +#endif + dev = get_hostbridge_dev(); if (!dev) return 0; @@ -140,7 +165,12 @@ uint32_t get_top_of_low_memory(void) { - device_t dev = get_hostbridge_dev(); +#if defined(__PRE_RAM__) || defined(__SMM__) + pci_devfn_t dev; +#else + struct device *dev; +#endif + dev = get_hostbridge_dev(); if (!dev) return 0; @@ -150,7 +180,12 @@ uint64_t get_top_of_upper_memory(void) { - device_t dev = get_hostbridge_dev(); +#if defined(__PRE_RAM__) || defined(__SMM__) + pci_devfn_t dev; +#else + struct device *dev; +#endif + dev = get_hostbridge_dev(); if (!dev) return 0; @@ -162,7 +197,12 @@ uint16_t get_pmbase(void) { - device_t dev = get_pmc_dev(); +#if defined(__PRE_RAM__) || defined(__SMM__) + pci_devfn_t dev; +#else + struct device *dev; +#endif + dev = get_pmc_dev(); if (!dev) return 0; @@ -172,7 +212,12 @@ uint16_t get_tcobase(void) { - device_t dev = get_smbus_dev(); +#if defined(__PRE_RAM__) || defined(__SMM__) + pci_devfn_t dev; +#else + struct device *dev; +#endif + dev = get_smbus_dev(); if (!dev) return 0; @@ -193,7 +238,12 @@ uint8_t silicon_stepping(void) { uint8_t revision_id; - device_t dev = get_lpc_dev(); +#if defined(__PRE_RAM__) || defined(__SMM__) + pci_devfn_t dev; +#else + struct device *dev; +#endif + dev = get_lpc_dev(); if (!dev) return 0; -- To view, visit https://review.coreboot.org/c/coreboot/+/30004 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ic29891d78514db3b7eed48414a14e4ff579436c0 Gerrit-Change-Number: 30004 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: src: Remove unused variables
by HAOUAS Elyes (Code Review) 02 Dec '18

02 Dec '18

HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29917 ) Change subject: src: Remove unused variables ...................................................................... Patch Set 15: Phase2. remaining unused variable (Any takers?) src/drivers/intel/fsp1_1/fsp_util.c:89:6: error: variable 'fsp_base' set but not used src/northbridge/amd/amdmct/mct_ddr3/mct_d.c:1743:10: error: variable 'rank_count_dimm1' set but not used src/northbridge/amd/amdmct/mct_ddr3/mct_d.c:3810:34: error: variable 'DramHoleOffset' set but not used src/northbridge/amd/amdmct/mct/mctdqs_d.c:1193:6: error: variable 'value' set but not used src/northbridge/amd/pi/00630F01/northbridge.c:471:15: error: variable 'hest' set but not used src/northbridge/amd/pi/00630F01/northbridge.c:688:6: error: variable 'reset_memhole' set but not used src/northbridge/amd/pi/00660F01/northbridge.c:458:15: error: variable 'hest' set but not used src/northbridge/amd/pi/00660F01/northbridge.c:683:6: error: variable 'reset_memhole' set but not used src/northbridge/intel/nehalem/raminit.c:3741:14: error: variable 'tmp8' set but not used src/northbridge/intel/nehalem/raminit.c:3742:15: error: variable 'tmp16' set but not used src/northbridge/intel/nehalem/raminit.c:3743:15: error: variable 'tmp32' set but not used src/northbridge/intel/pineview/raminit.c:1833:15: error: variable 'strobedata' set but not used src/northbridge/intel/sandybridge/raminit_common.c:2628:19: error: variable 'tmp' set but not used src/northbridge/intel/sandybridge/raminit_common.c:2676:19: error: variable 'tmp' set but not used src/northbridge/intel/x4x/raminit_ddr23.c:1320:15: error: variable 'rubbish' set but not used src/soc/mediatek/mt8173/i2c.c:113:26: error: variable 'regs' set but not used src/vendorcode/amd/agesa/f12/Legacy/Proc/agesaCallouts.c:103:16: error: variable 'Status' set but not used src/vendorcode/amd/agesa/f14/Legacy/Proc/agesaCallouts.c:107:16: error: variable 'Status' set but not used src/vendorcode/amd/agesa/f15tn/Legacy/Proc/agesaCallouts.c:103:16: error: variable 'Status' set but not used src/vendorcode/amd/agesa/f16kb/Legacy/Proc/agesaCallouts.c:104:16: error: variable 'Status' set but not used -- To view, visit https://review.coreboot.org/c/coreboot/+/29917 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibdfbf1031130ff861c4313d1271d6ccb68bf8837 Gerrit-Change-Number: 29917 Gerrit-PatchSet: 15 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: Damien Zammit <damien(a)zamaudio.com> Gerrit-Reviewer: David Guckian <david.guckian(a)intel.com> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Huang Jin <huang.jin(a)intel.com> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: York Yang <york.yang(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 02 Dec 2018 16:10:02 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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Change in ...coreboot[master]: sb/{bd82x6x, i82801gx, ibexpeak, lynxpoint}: Use BIOS_CNTL macro
by HAOUAS Elyes (Code Review) 02 Dec '18

02 Dec '18

HAOUAS Elyes has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29990 ) Change subject: sb/{bd82x6x,i82801gx,ibexpeak,lynxpoint}: Use BIOS_CNTL macro ...................................................................... Patch Set 1: (1 comment) https://review.coreboot.org/#/c/29990/1/src/southbridge/intel/i82801gx/lpc.c File src/southbridge/intel/i82801gx/lpc.c: https://review.coreboot.org/#/c/29990/1/src/southbridge/intel/i82801gx/lpc.… PS1, Line 358: #if TEST_SMM_FLASH_LOCKDOWN > is this dead code ? indeed, TEST_SMM_FLASH_LOCKDOWN is defined as zero. for my understanding, this is used for test/debug purpose. I can remove it if there is no objection. -- To view, visit https://review.coreboot.org/c/coreboot/+/29990 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I0d2b555ada9c2893af4f85422128f5a8b04e2fc6 Gerrit-Change-Number: 29990 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sun, 02 Dec 2018 16:04:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Patrick Rudolph <siro(a)das-labor.org> Gerrit-MessageType: comment

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Change in ...coreboot[master]: nb/amd/pi/00{630F01, 730F01}: Use ARRAY_SIZE
by HAOUAS Elyes (Code Review) 02 Dec '18

02 Dec '18

Hello Angel Pons, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/29860 to look at the new patch set (#2). Change subject: nb/amd/pi/00{630F01,730F01}: Use ARRAY_SIZE ...................................................................... nb/amd/pi/00{630F01,730F01}: Use ARRAY_SIZE Use already defined ARRAY_SIZE macro. Change-Id: Ie22e3557e958b562816921a985411dd55c712142 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/northbridge/amd/pi/00630F01/dimmSpd.c M src/northbridge/amd/pi/00730F01/dimmSpd.c 2 files changed, 8 insertions(+), 10 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/60/29860/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/29860 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie22e3557e958b562816921a985411dd55c712142 Gerrit-Change-Number: 29860 Gerrit-PatchSet: 2 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-MessageType: newpatchset

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coreboot-gerrit December 2018