Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29684 )
Change subject: soc/intel/common: Bring DISPLAY_MTRRS into the light
......................................................................
Patch Set 3:
(2 comments)
https://review.coreboot.org/#/c/29684/3/src/cpu/Kconfig.debug
File src/cpu/Kconfig.debug:
https://review.coreboot.org/#/c/29684/3/src/cpu/Kconfig.debug@1
PS3, Line 1: source "src/cpu/*/Kconfig.debug"
nit: maybe just put this line directly into src/Kconfig?
https://review.coreboot.org/#/c/29684/3/src/cpu/x86/Kconfig.debug
File src/cpu/x86/Kconfig.debug:
https://review.coreboot.org/#/c/29684/3/src/cpu/x86/Kconfig.debug@1
PS3, Line 1: config HAVE_DISPLAY_MTRRS
Shouldn't this whole file have an if ARCH_X86 wrapped around it? (Then again, I'm asking myself the same thing about src/cpu/x86/Kconfig... and why *is* there an if ARCH_X86 with a bunch of x86-specific crap in src/cpu/Kconfig?)
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Ibd0a64121bd6e4ab5d7fd835f3ac25d3f5011f24
Gerrit-Change-Number: 29684
Gerrit-PatchSet: 3
Gerrit-Owner: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Julius Werner <jwerner(a)chromium.org>
Gerrit-Comment-Date: Wed, 21 Nov 2018 01:11:43 +0000
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Gerrit-MessageType: comment
Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29572 )
Change subject: (console,drivers/uart)/Kconfig: Fix dependencies
......................................................................
Patch Set 5: Code-Review+2
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Gerrit-Branch: master
Gerrit-Change-Id: I0ea73a8909f07202b23c88db93df74cf9dc8abf9
Gerrit-Change-Number: 29572
Gerrit-PatchSet: 5
Gerrit-Owner: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org>
Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de>
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Gerrit-Comment-Date: Wed, 21 Nov 2018 01:06:18 +0000
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Gerrit-MessageType: comment
Hello Aamir Bohra, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/29749
to look at the new patch set (#4).
Change subject: mb/google/dragonegg: Add initial mainboard code support
......................................................................
mb/google/dragonegg: Add initial mainboard code support
This patch includes support for both ICL ES0 and ES1 samples.
Change-Id: I2cc269cb0050bf5b031f48cfe114485c55ab8fa9
Signed-off-by: Aamir Bohra <aamir.bohra(a)intel.com>
---
A src/mainboard/google/dragonegg/Kconfig
A src/mainboard/google/dragonegg/Kconfig.name
A src/mainboard/google/dragonegg/Makefile.inc
A src/mainboard/google/dragonegg/acpi_tables.c
A src/mainboard/google/dragonegg/board_info.txt
A src/mainboard/google/dragonegg/bootblock.c
A src/mainboard/google/dragonegg/chromeos.c
A src/mainboard/google/dragonegg/chromeos.fmd
A src/mainboard/google/dragonegg/dsdt.asl
A src/mainboard/google/dragonegg/ec.c
A src/mainboard/google/dragonegg/mainboard.c
A src/mainboard/google/dragonegg/ramstage.c
A src/mainboard/google/dragonegg/romstage.c
A src/mainboard/google/dragonegg/smihandler.c
A src/mainboard/google/dragonegg/spd/Hynix_H9HCNNN8KUMLHR_2GB.spd.hex
A src/mainboard/google/dragonegg/spd/Hynix_H9HCNNNCPMMLHR_4GB.spd.hex
A src/mainboard/google/dragonegg/spd/Makefile.inc
A src/mainboard/google/dragonegg/spd/Micron_MT53E2G32D8QD_8GB.spd.hex
A src/mainboard/google/dragonegg/spd/Micron_MT53E512M32D2NP_2GB.spd.hex
A src/mainboard/google/dragonegg/spd/empty.spd.hex
A src/mainboard/google/dragonegg/variants/baseboard/Makefile.inc
A src/mainboard/google/dragonegg/variants/baseboard/devicetree.cb
A src/mainboard/google/dragonegg/variants/baseboard/gpio.c
A src/mainboard/google/dragonegg/variants/baseboard/include/baseboard/ec.h
A src/mainboard/google/dragonegg/variants/baseboard/include/baseboard/gpio.h
A src/mainboard/google/dragonegg/variants/baseboard/include/baseboard/variants.h
A src/mainboard/google/dragonegg/variants/baseboard/memory.c
A src/mainboard/google/dragonegg/variants/dragonegg/include/variant/ec.h
A src/mainboard/google/dragonegg/variants/dragonegg/include/variant/gpio.h
29 files changed, 1,355 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/29749/4
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I2cc269cb0050bf5b031f48cfe114485c55ab8fa9
Gerrit-Change-Number: 29749
Gerrit-PatchSet: 4
Gerrit-Owner: Shelley Chen <shchen(a)google.com>
Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-MessageType: newpatchset
Hello Aamir Bohra, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/29749
to look at the new patch set (#3).
Change subject: mb/google/dragonegg: Add initial mainboard code support
......................................................................
mb/google/dragonegg: Add initial mainboard code support
This patch includes support for both ICL ES0 and ES1 samples.
Change-Id: I2cc269cb0050bf5b031f48cfe114485c55ab8fa9
Signed-off-by: Aamir Bohra <aamir.bohra(a)intel.com>
---
A src/mainboard/google/dragonegg/Kconfig
A src/mainboard/google/dragonegg/Kconfig.name
A src/mainboard/google/dragonegg/Makefile.inc
A src/mainboard/google/dragonegg/acpi_tables.c
A src/mainboard/google/dragonegg/board_info.txt
A src/mainboard/google/dragonegg/bootblock.c
A src/mainboard/google/dragonegg/chromeos.c
A src/mainboard/google/dragonegg/chromeos.fmd
A src/mainboard/google/dragonegg/dsdt.asl
A src/mainboard/google/dragonegg/ec.c
A src/mainboard/google/dragonegg/mainboard.c
A src/mainboard/google/dragonegg/ramstage.c
A src/mainboard/google/dragonegg/romstage.c
A src/mainboard/google/dragonegg/smihandler.c
A src/mainboard/google/dragonegg/spd/Hynix_H9HCNNN8KUMLHR_2GB.spd.hex
A src/mainboard/google/dragonegg/spd/Hynix_H9HCNNNCPMMLHR_4GB.spd.hex
A src/mainboard/google/dragonegg/spd/Makefile.inc
A src/mainboard/google/dragonegg/spd/Micron_MT53E2G32D8QD_8GB.spd.hex
A src/mainboard/google/dragonegg/spd/Micron_MT53E512M32D2NP_2GB.spd.hex
A src/mainboard/google/dragonegg/spd/empty.spd.hex
A src/mainboard/google/dragonegg/variants/baseboard/Makefile.inc
A src/mainboard/google/dragonegg/variants/baseboard/devicetree.cb
A src/mainboard/google/dragonegg/variants/baseboard/gpio.c
A src/mainboard/google/dragonegg/variants/baseboard/include/baseboard/ec.h
A src/mainboard/google/dragonegg/variants/baseboard/include/baseboard/gpio.h
A src/mainboard/google/dragonegg/variants/baseboard/include/baseboard/variants.h
A src/mainboard/google/dragonegg/variants/baseboard/memory.c
A src/mainboard/google/dragonegg/variants/dragonegg/include/variant/ec.h
A src/mainboard/google/dragonegg/variants/dragonegg/include/variant/gpio.h
29 files changed, 1,356 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/29749/3
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I2cc269cb0050bf5b031f48cfe114485c55ab8fa9
Gerrit-Change-Number: 29749
Gerrit-PatchSet: 3
Gerrit-Owner: Shelley Chen <shchen(a)google.com>
Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-MessageType: newpatchset
Hello Aamir Bohra, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/29749
to look at the new patch set (#2).
Change subject: mb/google/dragonegg: Add initial mainboard code support
......................................................................
mb/google/dragonegg: Add initial mainboard code support
This patch includes support for both ICL ES0 and ES1 samples.
Change-Id: I2cc269cb0050bf5b031f48cfe114485c55ab8fa9
Signed-off-by: Aamir Bohra <aamir.bohra(a)intel.com>
---
A src/mainboard/google/dragonegg/Kconfig
A src/mainboard/google/dragonegg/Kconfig.name
A src/mainboard/google/dragonegg/Makefile.inc
A src/mainboard/google/dragonegg/acpi_tables.c
A src/mainboard/google/dragonegg/board_info.txt
A src/mainboard/google/dragonegg/bootblock.c
A src/mainboard/google/dragonegg/chromeos.c
A src/mainboard/google/dragonegg/chromeos.fmd
A src/mainboard/google/dragonegg/dsdt.asl
A src/mainboard/google/dragonegg/ec.c
A src/mainboard/google/dragonegg/mainboard.c
A src/mainboard/google/dragonegg/ramstage.c
A src/mainboard/google/dragonegg/romstage.c
A src/mainboard/google/dragonegg/smihandler.c
A src/mainboard/google/dragonegg/spd/Hynix_H9HCNNN8KUMLHR_2GB.spd.hex
A src/mainboard/google/dragonegg/spd/Hynix_H9HCNNNCPMMLHR_4GB.spd.hex
A src/mainboard/google/dragonegg/spd/Makefile.inc
A src/mainboard/google/dragonegg/spd/Micron_MT53E2G32D8QD_8GB.spd.hex
A src/mainboard/google/dragonegg/spd/Micron_MT53E512M32D2NP_2GB.spd.hex
A src/mainboard/google/dragonegg/spd/empty.spd.hex
A src/mainboard/google/dragonegg/variants/baseboard/Makefile.inc
A src/mainboard/google/dragonegg/variants/baseboard/devicetree.cb
A src/mainboard/google/dragonegg/variants/baseboard/gpio.c
A src/mainboard/google/dragonegg/variants/baseboard/include/baseboard/ec.h
A src/mainboard/google/dragonegg/variants/baseboard/include/baseboard/gpio.h
A src/mainboard/google/dragonegg/variants/baseboard/include/baseboard/variants.h
A src/mainboard/google/dragonegg/variants/baseboard/memory.c
A src/mainboard/google/dragonegg/variants/dragonegg/include/variant/ec.h
A src/mainboard/google/dragonegg/variants/dragonegg/include/variant/gpio.h
29 files changed, 1,356 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/49/29749/2
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Gerrit-Branch: master
Gerrit-Change-Id: I2cc269cb0050bf5b031f48cfe114485c55ab8fa9
Gerrit-Change-Number: 29749
Gerrit-PatchSet: 2
Gerrit-Owner: Shelley Chen <shchen(a)google.com>
Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-MessageType: newpatchset
Hello HAOUAS Elyes, Subrata Banik, build bot (Jenkins), Patrick Georgi,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/29680
to look at the new patch set (#3).
Change subject: Kconfig: Unify power-after-failure options
......................................................................
Kconfig: Unify power-after-failure options
The newest and most useful incarnation was hiding in soc/intel/common/.
We move it into the Mainboard menu and extend it with various flags to
be selected to control the default and which options are visible. Also
add a new `int` config MAINBOARD_POWER_FAILURE_STATE that moves the
boolean to int conversion into Kconfig:
0 - S5
1 - S0
2 - previous state
This patch focuses on the Kconfig code. The C code could be unified as
well, e.g. starting with a common enum and safe wrapper around the
get_option() call.
TEST=Did what-jenkins-does with and without this commit and compared
binaries. Nothing changed for the default configurations.
Change-Id: I61259f864c8a8cfc7099cc2699059f972fa056c0
Signed-off-by: Nico Huber <nico.h(a)gmx.de>
---
M src/mainboard/Kconfig
M src/mainboard/asrock/h81m-hds/Kconfig
M src/mainboard/asus/kcma-d8/Kconfig
M src/mainboard/asus/kfsn4-dre/Kconfig
M src/mainboard/asus/kgpe-d16/Kconfig
M src/mainboard/msi/ms9652_fam10/Kconfig
M src/mainboard/samsung/lumpy/Kconfig
M src/mainboard/samsung/stumpy/Kconfig
M src/soc/intel/broadwell/Kconfig
M src/soc/intel/broadwell/lpc.c
M src/soc/intel/broadwell/smihandler.c
M src/soc/intel/common/block/include/intelblocks/pmclib.h
M src/soc/intel/common/block/pmc/Kconfig
M src/soc/intel/common/block/pmc/pmclib.c
M src/southbridge/amd/agesa/hudson/sm.c
M src/southbridge/amd/amd8111/Kconfig
M src/southbridge/amd/amd8111/acpi.c
M src/southbridge/amd/pi/hudson/sm.c
M src/southbridge/amd/sb700/Kconfig
M src/southbridge/amd/sb700/sm.c
M src/southbridge/amd/sb800/sm.c
M src/southbridge/intel/bd82x6x/lpc.c
M src/southbridge/intel/common/Kconfig
M src/southbridge/intel/common/pmutil.h
M src/southbridge/intel/common/smihandler.c
M src/southbridge/intel/fsp_bd82x6x/Kconfig
M src/southbridge/intel/fsp_bd82x6x/lpc.c
M src/southbridge/intel/fsp_bd82x6x/pch.h
M src/southbridge/intel/fsp_bd82x6x/smihandler.c
M src/southbridge/intel/fsp_i89xx/Kconfig
M src/southbridge/intel/fsp_i89xx/lpc.c
M src/southbridge/intel/fsp_i89xx/pch.h
M src/southbridge/intel/fsp_i89xx/smihandler.c
M src/southbridge/intel/fsp_rangeley/soc.h
M src/southbridge/intel/i82801dx/Kconfig
M src/southbridge/intel/i82801dx/i82801dx.h
M src/southbridge/intel/i82801dx/lpc.c
M src/southbridge/intel/i82801dx/smihandler.c
M src/southbridge/intel/i82801gx/Kconfig
M src/southbridge/intel/i82801gx/i82801gx.h
M src/southbridge/intel/i82801gx/lpc.c
M src/southbridge/intel/i82801gx/smihandler.c
M src/southbridge/intel/i82801ix/i82801ix.h
M src/southbridge/intel/i82801ix/lpc.c
M src/southbridge/intel/i82801jx/Kconfig
M src/southbridge/intel/i82801jx/i82801jx.h
M src/southbridge/intel/i82801jx/lpc.c
M src/southbridge/intel/ibexpeak/Kconfig
M src/southbridge/intel/ibexpeak/lpc.c
M src/southbridge/intel/ibexpeak/pch.h
M src/southbridge/intel/ibexpeak/smihandler.c
M src/southbridge/intel/lynxpoint/Kconfig
M src/southbridge/intel/lynxpoint/lpc.c
M src/southbridge/intel/lynxpoint/pch.h
M src/southbridge/intel/lynxpoint/smihandler.c
M src/southbridge/nvidia/ck804/Kconfig
M src/southbridge/nvidia/ck804/lpc.c
M src/southbridge/nvidia/mcp55/Kconfig
M src/southbridge/nvidia/mcp55/lpc.c
M src/superio/nuvoton/nct5572d/Kconfig
M src/superio/nuvoton/nct5572d/superio.c
M src/superio/winbond/w83667hg-a/Kconfig
M src/superio/winbond/w83667hg-a/superio.c
63 files changed, 129 insertions(+), 176 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/80/29680/3
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: I61259f864c8a8cfc7099cc2699059f972fa056c0
Gerrit-Change-Number: 29680
Gerrit-PatchSet: 3
Gerrit-Owner: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: HAOUAS Elyes <ehaouas(a)noos.fr>
Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com>
Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-CC: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-MessageType: newpatchset
Hello Youness Alaoui, Matt DeVillier, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/29682
to look at the new patch set (#3).
Change subject: soc/intel/skylake: Use real common code for VMX init
......................................................................
soc/intel/skylake: Use real common code for VMX init
There doesn't seem to be anything wrong with the original, common
implementation to enable and lock VMX. Use it.
As it's correctly based on a Kconfig, the `VmxEnable` devicetree
setting vanishes.
Change-Id: Iea598cf74ba542a650433719f29cb5c9df700c0f
Signed-off-by: Nico Huber <nico.h(a)gmx.de>
---
M src/mainboard/google/eve/devicetree.cb
M src/mainboard/google/fizz/variants/baseboard/devicetree.cb
M src/mainboard/google/glados/variants/asuka/devicetree.cb
M src/mainboard/google/glados/variants/caroline/devicetree.cb
M src/mainboard/google/glados/variants/cave/devicetree.cb
M src/mainboard/google/glados/variants/chell/devicetree.cb
M src/mainboard/google/glados/variants/glados/devicetree.cb
M src/mainboard/google/glados/variants/lars/devicetree.cb
M src/mainboard/google/glados/variants/sentry/devicetree.cb
M src/mainboard/google/poppy/variants/atlas/devicetree.cb
M src/mainboard/google/poppy/variants/baseboard/devicetree.cb
M src/mainboard/google/poppy/variants/nami/devicetree.cb
M src/mainboard/google/poppy/variants/nautilus/devicetree.cb
M src/mainboard/google/poppy/variants/nocturne/devicetree.cb
M src/mainboard/google/poppy/variants/rammus/devicetree.cb
M src/mainboard/google/poppy/variants/soraka/devicetree.cb
M src/mainboard/intel/kblrvp/variants/rvp3/devicetree.cb
M src/mainboard/intel/kblrvp/variants/rvp7/devicetree.cb
M src/mainboard/intel/kblrvp/variants/rvp8/devicetree.cb
M src/mainboard/intel/kunimitsu/devicetree.cb
M src/mainboard/intel/saddlebrook/devicetree.cb
M src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb
M src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb
M src/soc/intel/skylake/Kconfig
M src/soc/intel/skylake/chip.h
M src/soc/intel/skylake/chip_fsp20.c
M src/soc/intel/skylake/cpu.c
M src/soc/intel/skylake/romstage/romstage_fsp20.c
28 files changed, 9 insertions(+), 58 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/29682/3
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Iea598cf74ba542a650433719f29cb5c9df700c0f
Gerrit-Change-Number: 29682
Gerrit-PatchSet: 3
Gerrit-Owner: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com>
Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: Youness Alaoui <snifikino(a)gmail.com>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-MessageType: newpatchset
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/29682
to look at the new patch set (#2).
Change subject: soc/intel/skylake: Use real common code for VMX init
......................................................................
soc/intel/skylake: Use real common code for VMX init
There doesn't seem to be anything wrong with the original, common
implementation to enable and lock VMX. Use it.
As it's correctly based on a Kconfig, the `VmxEnable` devicetree
setting vanishes.
Change-Id: Iea598cf74ba542a650433719f29cb5c9df700c0f
Signed-off-by: Nico Huber <nico.h(a)gmx.de>
---
M src/mainboard/google/eve/devicetree.cb
M src/mainboard/google/fizz/variants/baseboard/devicetree.cb
M src/mainboard/google/glados/variants/asuka/devicetree.cb
M src/mainboard/google/glados/variants/caroline/devicetree.cb
M src/mainboard/google/glados/variants/cave/devicetree.cb
M src/mainboard/google/glados/variants/chell/devicetree.cb
M src/mainboard/google/glados/variants/glados/devicetree.cb
M src/mainboard/google/glados/variants/lars/devicetree.cb
M src/mainboard/google/glados/variants/sentry/devicetree.cb
M src/mainboard/google/poppy/variants/atlas/devicetree.cb
M src/mainboard/google/poppy/variants/baseboard/devicetree.cb
M src/mainboard/google/poppy/variants/nami/devicetree.cb
M src/mainboard/google/poppy/variants/nautilus/devicetree.cb
M src/mainboard/google/poppy/variants/nocturne/devicetree.cb
M src/mainboard/google/poppy/variants/rammus/devicetree.cb
M src/mainboard/google/poppy/variants/soraka/devicetree.cb
M src/mainboard/intel/kblrvp/variants/rvp3/devicetree.cb
M src/mainboard/intel/kblrvp/variants/rvp7/devicetree.cb
M src/mainboard/intel/kblrvp/variants/rvp8/devicetree.cb
M src/mainboard/intel/kunimitsu/devicetree.cb
M src/mainboard/intel/saddlebrook/devicetree.cb
M src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb
M src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb
M src/soc/intel/skylake/Kconfig
M src/soc/intel/skylake/chip.h
M src/soc/intel/skylake/chip_fsp20.c
M src/soc/intel/skylake/cpu.c
M src/soc/intel/skylake/romstage/romstage_fsp20.c
28 files changed, 8 insertions(+), 58 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/82/29682/2
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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Iea598cf74ba542a650433719f29cb5c9df700c0f
Gerrit-Change-Number: 29682
Gerrit-PatchSet: 2
Gerrit-Owner: Nico Huber <nico.h(a)gmx.de>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Gerrit-MessageType: newpatchset