coreboot-gerrit November 2018

coreboot-gerrit@coreboot.org

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Change in ...coreboot[master]: mb/google/kahlee: Enable 2T mode for liara in DVT phase
by Martin Roth (Code Review) 23 Nov '18

23 Nov '18

Martin Roth has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29779 ) Change subject: mb/google/kahlee: Enable 2T mode for liara in DVT phase ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/29779 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibb4cc1fd2bb54984cb7a8856ed7b9f49b78eddce Gerrit-Change-Number: 29779 Gerrit-PatchSet: 1 Gerrit-Owner: chris wang <Chris.Wang(a)amd.com> Gerrit-Reviewer: Amanda Hwang <amanda_hwang(a)compal.corp-partner.google.com> Gerrit-Reviewer: Chris Wang <chris.wang(a)amd.corp-partner.google.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: chris wang <Chris.Wang(a)amd.com> Gerrit-Comment-Date: Fri, 23 Nov 2018 21:52:21 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: mainboard/lenovo/t530: Improve configuration
by Philipp Deppenwiese (Code Review) 23 Nov '18

23 Nov '18

Philipp Deppenwiese has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29816 ) Change subject: mainboard/lenovo/t530: Improve configuration ...................................................................... Patch Set 3: (2 comments) https://review.coreboot.org/#/c/29816/2/src/mainboard/lenovo/t530/Kconfig File src/mainboard/lenovo/t530/Kconfig: https://review.coreboot.org/#/c/29816/2/src/mainboard/lenovo/t530/Kconfig@41 PS2, Line 41: 0x2a > Would be great to make cmos. […] so basically move it to mainboard/lenovo? https://review.coreboot.org/#/c/29816/2/src/mainboard/lenovo/t530/Kconfig@95 PS2, Line 95: config CBFS_SIZE : hex : default 0x001d9000 if VBOOT : default 0x0069b800 > Is this even used when using an FMDFILE? I thought it was only used to generate a default FMD? AFAIK it should be used -- To view, visit https://review.coreboot.org/c/coreboot/+/29816 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I28c2fb92d574c8070dbf767adc5839faf4fb47a0 Gerrit-Change-Number: 29816 Gerrit-PatchSet: 3 Gerrit-Owner: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Comment-Date: Fri, 23 Nov 2018 19:23:58 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-MessageType: comment

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Change in ...coreboot[master]: {mb/cubieboard, soc/intel/quark}: Remove define __SIMPLE_DEVICE__
by HAOUAS Elyes (Code Review) 23 Nov '18

23 Nov '18

HAOUAS Elyes has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/29821 Change subject: {mb/cubieboard,soc/intel/quark}: Remove define __SIMPLE_DEVICE__ ...................................................................... {mb/cubieboard,soc/intel/quark}: Remove define __SIMPLE_DEVICE__ As it is already in Makefile, "define __SIMPLE_DEVICE__" is not needed. Change-Id: I8db1b15c9186536c9b8a6b5d667fa5a11af1bad2 Signed-off-by: Elyes HAOUAS <ehaouas(a)noos.fr> --- M src/mainboard/cubietech/cubieboard/romstage.c M src/soc/intel/quark/romstage/car.c M src/soc/intel/quark/romstage/fsp1_1.c M src/soc/intel/quark/romstage/romstage.c 4 files changed, 0 insertions(+), 4 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/21/29821/1 diff --git a/src/mainboard/cubietech/cubieboard/romstage.c b/src/mainboard/cubietech/cubieboard/romstage.c index 665eb9d..f13dbf4 100644 --- a/src/mainboard/cubietech/cubieboard/romstage.c +++ b/src/mainboard/cubietech/cubieboard/romstage.c @@ -29,7 +29,6 @@ #include <cpu/allwinner/a10/gpio.h> #include <cpu/allwinner/a10/twi.h> #include <program_loading.h> -#define __SIMPLE_DEVICE__ #include <device/device.h> #include <drivers/xpowers/axp209/axp209.h> #include <drivers/xpowers/axp209/chip.h> diff --git a/src/soc/intel/quark/romstage/car.c b/src/soc/intel/quark/romstage/car.c index 781349c..9f052a3 100644 --- a/src/soc/intel/quark/romstage/car.c +++ b/src/soc/intel/quark/romstage/car.c @@ -13,7 +13,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ -#define __SIMPLE_DEVICE__ #include <console/console.h> #include <fsp/util.h> diff --git a/src/soc/intel/quark/romstage/fsp1_1.c b/src/soc/intel/quark/romstage/fsp1_1.c index 6ce2079..d5c5f19 100644 --- a/src/soc/intel/quark/romstage/fsp1_1.c +++ b/src/soc/intel/quark/romstage/fsp1_1.c @@ -13,7 +13,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ -#define __SIMPLE_DEVICE__ #include <arch/early_variables.h> #include <console/console.h> diff --git a/src/soc/intel/quark/romstage/romstage.c b/src/soc/intel/quark/romstage/romstage.c index c5f59c6..f2a280e 100644 --- a/src/soc/intel/quark/romstage/romstage.c +++ b/src/soc/intel/quark/romstage/romstage.c @@ -13,7 +13,6 @@ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the * GNU General Public License for more details. */ -#define __SIMPLE_DEVICE__ #include <arch/early_variables.h> #include <cbfs.h> -- To view, visit https://review.coreboot.org/c/coreboot/+/29821 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I8db1b15c9186536c9b8a6b5d667fa5a11af1bad2 Gerrit-Change-Number: 29821 Gerrit-PatchSet: 1 Gerrit-Owner: HAOUAS Elyes <ehaouas(a)noos.fr> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: northbridge/nehalem: clean up header file
by Felix Held (Code Review) 23 Nov '18

23 Nov '18

Felix Held has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/27686 ) Change subject: northbridge/nehalem: clean up header file ...................................................................... Abandoned seems to be a duplicate of an already merged patch -- To view, visit https://review.coreboot.org/c/coreboot/+/27686 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I1f758203afdcb1b18f3c0d786698f9fbf2246e0e Gerrit-Change-Number: 27686 Gerrit-PatchSet: 1 Gerrit-Owner: Felix Held <felix-coreboot(a)felixheld.de> Gerrit-MessageType: abandon

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Change in ...coreboot[master]: arch/x86: drop special case cbfs locator
by Philipp Deppenwiese (Code Review) 23 Nov '18

23 Nov '18

Philipp Deppenwiese has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29801 ) Change subject: arch/x86: drop special case cbfs locator ...................................................................... Patch Set 1: Code-Review+2 Tested on the OCP Wedge100s -- To view, visit https://review.coreboot.org/c/coreboot/+/29801 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I6fa78073ee4015d7769ed588dc67f9b019d42d07 Gerrit-Change-Number: 29801 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Fri, 23 Nov 2018 18:29:58 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes Gerrit-MessageType: comment

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Change in ...coreboot[master]: MAINTAINERS: Update 9eSec maintainers
by Philipp Deppenwiese (Code Review) 23 Nov '18

23 Nov '18

Philipp Deppenwiese has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/29820 Change subject: MAINTAINERS: Update 9eSec maintainers ...................................................................... MAINTAINERS: Update 9eSec maintainers Update 9elements Cyber Security maintainers. Change-Id: Ib683cb1b6a338667b065a71b05bdd3a4294e0296 Signed-off-by: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> --- M MAINTAINERS 1 file changed, 27 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/20/29820/1 diff --git a/MAINTAINERS b/MAINTAINERS index 3df572c..7b41edf 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -193,6 +193,20 @@ S: Supported F: src/mainboard/google/panther/ +OCP MAINBOARDS +M: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> +M: Patrick Rudolph <patrick.rudolph(a)9elements.com> +S: Supported +F: src/mainboard/ocp/wedge100s/ +F: src/mainboard/ocp/monolake/ + +OPENCELLULAR MAINBOARDS +M: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> +M: Patrick Rudolph <patrick.rudolph(a)9elements.com> +S: Supported +F: src/mainboard/opencellular/rotundu/ +F: src/mainboard/opencellular/elgon/ + INTEL MINNOWBOARD MAX MAINBOARD M: Huang Jin <huang.jin(a)intel.com> M: York Yang <york.yang(a)intel.com> @@ -202,6 +216,7 @@ INTEL FSP BAYTRAIL CHIP & CRBs M: Huang Jin <huang.jin(a)intel.com> M: York Yang <york.yang(a)intel.com> +M: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> S: Supported F: src/soc/intel/fsp_baytrail/ F: src/vendorcode/intel/fsp1_0/baytrail/ @@ -210,6 +225,7 @@ INTEL FSP BROADWELL-DE SOC & CRB M: York Yang <york.yang(a)intel.com> +M: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> S: Supported F: src/soc/intel/fsp_broadwell_de/ F: src/vendorcode/intel/fsp1_0/broadwell_de/ @@ -239,8 +255,10 @@ INTEL FSP 1.0 M: Huang Jin <huang.jin(a)intel.com> M: York Yang <york.yang(a)intel.com> +M: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> S: Supported F: src/drivers/intel/fsp1_0/ +F: src/vendorcode/intel/fsp1_0/broadwell_de/ INTEL FSP 1.1 M: Lee Leahy <leroy.p.leahy(a)intel.com> @@ -496,16 +514,22 @@ M: Martin Roth <gaumless(a)gmail.com> F: payloads/external +LINUXBOOT PAYLOAD INTEGRATION +M: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> +M: Marcello Sylvester Bauer <marcello.bauer(a)9elements.com> +S: Supported +F: payloads/external/LinuxBoot + VERIFIED BOOT 2 M: Aaron Durbin <adurbin(a)chromium.org> F: src/vendorcode/google/chromeos/vboot2/ TPM SUPPORT M: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> +S: Supported F: src/drivers/*/tpm/ -F: src/security/tpm12/ -F: src/security/tpm20/ -F: util/tss-generator/ +F: src/security/vboot/vboot_crtm.* +F: src/security/tpm DOCKER M: Martin Roth <gaumless(a)gmail.com> -- To view, visit https://review.coreboot.org/c/coreboot/+/29820 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ib683cb1b6a338667b065a71b05bdd3a4294e0296 Gerrit-Change-Number: 29820 Gerrit-PatchSet: 1 Gerrit-Owner: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: soc/fsp_broadwell_de: Add microcode updates pre memory
by Philipp Deppenwiese (Code Review) 23 Nov '18

23 Nov '18

Philipp Deppenwiese has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/29819 Change subject: soc/fsp_broadwell_de: Add microcode updates pre memory ...................................................................... soc/fsp_broadwell_de: Add microcode updates pre memory Add support for updating microcodes on BDX DE before memory is initialized without FIT support. Change-Id: Ie31acaf0fc41c51b9edf65b981d43d7732661770 Signed-off-by: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> --- M src/drivers/intel/fsp1_0/fsp_util.c 1 file changed, 5 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/19/29819/1 diff --git a/src/drivers/intel/fsp1_0/fsp_util.c b/src/drivers/intel/fsp1_0/fsp_util.c index a09b1b1..71f6416 100644 --- a/src/drivers/intel/fsp1_0/fsp_util.c +++ b/src/drivers/intel/fsp1_0/fsp_util.c @@ -22,6 +22,7 @@ #include <lib.h> // hexdump #include <ip_checksum.h> #include <timestamp.h> +#include <cpu/intel/microcode.h> #ifndef __PRE_RAM__ /* Globals pointers for FSP structures */ @@ -75,6 +76,10 @@ UPD_DATA_REGION fsp_upd_data; #endif + /* Load microcode before RAM init */ + if (IS_ENABLED(CONFIG_SUPPORT_CPU_UCODE_IN_CBFS)) + intel_update_microcode_from_cbfs(); + memset((void *)&FspRtBuffer, 0, sizeof(FSP_INIT_RT_BUFFER)); FspRtBuffer.Common.StackTop = (u32 *)CONFIG_RAMTOP; FspInitParams.NvsBufferPtr = NULL; -- To view, visit https://review.coreboot.org/c/coreboot/+/29819 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ie31acaf0fc41c51b9edf65b981d43d7732661770 Gerrit-Change-Number: 29819 Gerrit-PatchSet: 1 Gerrit-Owner: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: mainboard/lenovo/t530: Improve configuration
by Philipp Deppenwiese (Code Review) 23 Nov '18

23 Nov '18

Philipp Deppenwiese has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/29816 Change subject: mainboard/lenovo/t530: Improve configuration ...................................................................... mainboard/lenovo/t530: Improve configuration * Enable vboot support with VBNV CMOS option. * Add board and vboot-rw-ab fmds. * Adjust CBFS sizes * Increase thermal specs for performance version Change-Id: I28c2fb92d574c8070dbf767adc5839faf4fb47a0 Signed-off-by: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> --- M src/mainboard/lenovo/t530/Kconfig A src/mainboard/lenovo/t530/board.fmd M src/mainboard/lenovo/t530/cmos.layout M src/mainboard/lenovo/t530/thermal.h A src/mainboard/lenovo/t530/vboot-rw-ab.fmd 5 files changed, 83 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/16/29816/1 diff --git a/src/mainboard/lenovo/t530/Kconfig b/src/mainboard/lenovo/t530/Kconfig index 61752d8..04f584c 100644 --- a/src/mainboard/lenovo/t530/Kconfig +++ b/src/mainboard/lenovo/t530/Kconfig @@ -28,6 +28,18 @@ if BOARD_LENOVO_BASEBOARD_T530 +config VBOOT + select VBOOT_VBNV_CMOS + select VBOOT_NO_BOARD_SUPPORT + select GBB_FLAG_DISABLE_LID_SHUTDOWN + select GBB_FLAG_DISABLE_PD_SOFTWARE_SYNC + select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC + select GBB_FLAG_DISABLE_FWMP + +config VBOOT_VBNV_OFFSET + hex + default 0x2a + config VARIANT_DIR string default "t530" if BOARD_LENOVO_T530 @@ -75,4 +87,14 @@ bool default y +config FMDFILE + string + default "src/mainboard/$(CONFIG_MAINBOARD_DIR)/vboot-rw-ab.fmd" if VBOOT + default "src/mainboard/$(CONFIG_MAINBOARD_DIR)/board.fmd" + +config CBFS_SIZE + hex + default 0x001d9000 if VBOOT + default 0x005ac000 + endif diff --git a/src/mainboard/lenovo/t530/board.fmd b/src/mainboard/lenovo/t530/board.fmd new file mode 100644 index 0000000..74c0e15 --- /dev/null +++ b/src/mainboard/lenovo/t530/board.fmd @@ -0,0 +1,24 @@ +FLASH 12M { + SI_ALL@0x0 0x500000 { + SI_DESC@0x0 0x1000 + SI_GBE@0x1000 0x2000 + SI_ME@0x3000 0x4fd000 + } + SI_BIOS@0x500000 0x700000 { + MISC_RW@0x0 0x60000 { + RW_MRC_CACHE@0x0 0x10000 + RW_VPD@0x010000 0x4000 + SMMSTORE@0x14000 0x40000 + } + WP_RO@0x020000 0x6a0000 { + RO_VPD@0x0 0x4000 + RO_SECTION@0x4000 0x69c000 { + FMAP@0x0 0x800 + RO_FRID@0x800 0x40 + RO_FRID_PAD@0x840 0x7c0 + GBB@0x1000 0xef000 + COREBOOT(CBFS)@0xf0000 0x5ac000 + } + } + } +} diff --git a/src/mainboard/lenovo/t530/cmos.layout b/src/mainboard/lenovo/t530/cmos.layout index 3400a4d..aa91229 100644 --- a/src/mainboard/lenovo/t530/cmos.layout +++ b/src/mainboard/lenovo/t530/cmos.layout @@ -80,6 +80,7 @@ #437 3 r 0 unused 440 8 h 0 volume +448 128 r 0 vbnv # SandyBridge MRC Scrambler Seed values 896 32 r 0 mrc_scrambler_seed diff --git a/src/mainboard/lenovo/t530/thermal.h b/src/mainboard/lenovo/t530/thermal.h index 0b24ea8..06438e0 100644 --- a/src/mainboard/lenovo/t530/thermal.h +++ b/src/mainboard/lenovo/t530/thermal.h @@ -18,9 +18,9 @@ #define T530_THERMAL_H /* Temperature which OS will shutdown at */ - #define CRITICAL_TEMPERATURE 100 + #define CRITICAL_TEMPERATURE 105 /* Temperature which OS will throttle CPU */ - #define PASSIVE_TEMPERATURE 90 + #define PASSIVE_TEMPERATURE 100 #endif /* T530_THERMAL_H */ diff --git a/src/mainboard/lenovo/t530/vboot-rw-ab.fmd b/src/mainboard/lenovo/t530/vboot-rw-ab.fmd new file mode 100644 index 0000000..f23e6b3 --- /dev/null +++ b/src/mainboard/lenovo/t530/vboot-rw-ab.fmd @@ -0,0 +1,34 @@ +FLASH 12M { + SI_ALL@0x0 0x500000 { + SI_DESC@0x0 0x1000 + SI_GBE@0x1000 0x2000 + SI_ME@0x3000 0x4fd000 + } + SI_BIOS@0x500000 0x700000 { + MISC_RW@0x0 0x60000 { + RW_MRC_CACHE@0x0 0x10000 + RW_VPD@0x010000 0x4000 + SMMSTORE@0x14000 0x40000 + } + WP_RO@0x60000 0x2cd000 { + RO_VPD@0x0 0x4000 + RO_SECTION@0x4000 0x2c9000 { + FMAP@0x0 0x800 + RO_FRID@0x800 0x40 + RO_FRID_PAD@0x840 0x7c0 + GBB@0x1000 0xef000 + COREBOOT(CBFS)@0xf0000 0x1d9000 + } + } + RW_SECTION_A@0x32d000 0x1e9040 { + VBLOCK_A@0x0 0x10000 + FW_MAIN_A(CBFS)@0x10000 0x1d9000 + RW_FWID_A@0x1e9000 0x40 + } + RW_SECTION_B@0x516040 0x1e9040 { + VBLOCK_B@0x0 0x10000 + FW_MAIN_B(CBFS)@0x10000 0x1d9000 + RW_FWID_B@0x1e9000 0x40 + } + } +} -- To view, visit https://review.coreboot.org/c/coreboot/+/29816 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: I28c2fb92d574c8070dbf767adc5839faf4fb47a0 Gerrit-Change-Number: 29816 Gerrit-PatchSet: 1 Gerrit-Owner: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: southbridge/intel/bd82x6x: Enable vboot support
by Philipp Deppenwiese (Code Review) 23 Nov '18

23 Nov '18

Philipp Deppenwiese has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/29815 Change subject: southbridge/intel/bd82x6x: Enable vboot support ...................................................................... southbridge/intel/bd82x6x: Enable vboot support Enable vboot support in romstage. Change-Id: Ibe86ffe7bfc6f71090d106b1e1a6228435e127ed Signed-off-by: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> --- M src/southbridge/intel/bd82x6x/Kconfig 1 file changed, 3 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/15/29815/1 diff --git a/src/southbridge/intel/bd82x6x/Kconfig b/src/southbridge/intel/bd82x6x/Kconfig index d906ea7..1004bcb 100644 --- a/src/southbridge/intel/bd82x6x/Kconfig +++ b/src/southbridge/intel/bd82x6x/Kconfig @@ -43,6 +43,9 @@ select SOUTHBRIDGE_INTEL_COMMON_SMM select SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT +config VBOOT + select VBOOT_STARTS_IN_ROMSTAGE + config EHCI_BAR hex default 0xfef00000 -- To view, visit https://review.coreboot.org/c/coreboot/+/29815 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ibe86ffe7bfc6f71090d106b1e1a6228435e127ed Gerrit-Change-Number: 29815 Gerrit-PatchSet: 1 Gerrit-Owner: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-MessageType: newchange

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Change in ...coreboot[master]: Documentation/../../icelake: Add Ice Lake coreboot development docume...
by Philipp Deppenwiese (Code Review) 23 Nov '18

23 Nov '18

Philipp Deppenwiese has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/29805 ) Change subject: Documentation/../../icelake: Add Ice Lake coreboot development documentation ...................................................................... Patch Set 3: Please give more a detailed overview of the supported icelake features and their requirements. Also please recommend to use 3rdparty/fsp via kconfig instead of copying binaries into the tree. -- To view, visit https://review.coreboot.org/c/coreboot/+/29805 To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Change-Id: Ief4df6ca11f95b75ecddeb560f7887bfadced086 Gerrit-Change-Number: 29805 Gerrit-PatchSet: 3 Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Duncan Laurie <dlaurie(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Patrick Rudolph <patrick.rudolph(a)9elements.com> Gerrit-Reviewer: Patrick Rudolph <siro(a)das-labor.org> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Shelley Chen <shchen(a)google.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Comment-Date: Fri, 23 Nov 2018 15:43:52 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: No Gerrit-MessageType: comment

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coreboot-gerrit November 2018