Jonathan Neuschäfer has uploaded this change for review. ( https://review.coreboot.org/28993
Change subject: arch/x86/exception: Improve the readability of a comment
......................................................................
arch/x86/exception: Improve the readability of a comment
Add punctuation and fix a typo.
Change-Id: Ic61c665f7e2daefb50b478a1710ea66c8a88235a
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net>
---
M src/arch/x86/exception.c
1 file changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/93/28993/1
diff --git a/src/arch/x86/exception.c b/src/arch/x86/exception.c
index a281c54..0f42fdf 100644
--- a/src/arch/x86/exception.c
+++ b/src/arch/x86/exception.c
@@ -554,8 +554,8 @@
/* Even though the vecX symbols are interrupt entry points just treat them
like data to more easily get the pointer values in C. Because IDT entries
- format splits the offset field up one can't use the linker to resolve
- parts of a relecation on x86 ABI an array of pointers is used to gather
+ format splits the offset field up, one can't use the linker to resolve
+ parts of a relocation on x86 ABI. An array of pointers is used to gather
the symbols. The IDT is initialized at runtime when exception_init() is
called. */
extern u8 vec0[], vec1[], vec2[], vec3[], vec4[], vec5[], vec6[], vec7[];
--
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Gerrit-MessageType: newchange
Gerrit-Change-Id: Ic61c665f7e2daefb50b478a1710ea66c8a88235a
Gerrit-Change-Number: 28993
Gerrit-PatchSet: 1
Gerrit-Owner: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net>
Jonathan Neuschäfer has uploaded this change for review. ( https://review.coreboot.org/28992
Change subject: Documentation: Improve message printed by livesphinx target
......................................................................
Documentation: Improve message printed by livesphinx target
Printing "Autobuild finished" after the autobuild server exits (which
normally doesn't happen) is not very useful.
Change-Id: I909d7ab5f399993dbb1916e66ba94c48d7bc53bf
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net>
---
M Documentation/Makefile.sphinx
1 file changed, 3 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/92/28992/1
diff --git a/Documentation/Makefile.sphinx b/Documentation/Makefile.sphinx
index 5236f3e..caa8190 100644
--- a/Documentation/Makefile.sphinx
+++ b/Documentation/Makefile.sphinx
@@ -57,9 +57,10 @@
.PHONY: livehtml
livehtml:
- $(SPHINXAUTOBUILD) -b html $(ALLSPHINXOPTS) $(BUILDDIR)
+ @echo "Starting sphinx-autobuild. The HTML pages are in $(BUILDDIR)."
+ @echo "Press Ctrl-C to stop."
@echo
- @echo "Autobuild finished. The HTML pages are in $(BUILDDIR)."
+ $(SPHINXAUTOBUILD) -b html $(ALLSPHINXOPTS) $(BUILDDIR)
.PHONY: dirhtml
dirhtml:
--
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Gerrit-Change-Id: I909d7ab5f399993dbb1916e66ba94c48d7bc53bf
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Gerrit-Owner: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net>
Jonathan Neuschäfer has uploaded this change for review. ( https://review.coreboot.org/28990
Change subject: Documentation/releases: Improve readability
......................................................................
Documentation/releases: Improve readability
A colon usually indicates that something related follows. But in
Documentation/releases/index.md, nothing followed. Fix this by swapping
two lines.
Change-Id: I3e2750c208a2b725145b94615f64381ac763f0dc
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net>
---
M Documentation/releases/index.md
1 file changed, 1 insertion(+), 1 deletion(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/90/28990/1
diff --git a/Documentation/releases/index.md b/Documentation/releases/index.md
index 09082a1..602a63a 100644
--- a/Documentation/releases/index.md
+++ b/Documentation/releases/index.md
@@ -12,6 +12,6 @@
Upcoming release
----------------
-* [4.9 - November 2018](coreboot-4.9-relnotes.md)
Please add to the release notes as changes are added:
+* [4.9 - November 2018](coreboot-4.9-relnotes.md)
--
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Gerrit-Change-Id: I3e2750c208a2b725145b94615f64381ac763f0dc
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Gerrit-Owner: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net>
Jonathan Neuschäfer has uploaded this change for review. ( https://review.coreboot.org/28987
Change subject: arch/riscv: Don't set FPU state to "dirty"
......................................................................
arch/riscv: Don't set FPU state to "dirty"
Quoting from the RISC-V Privileged Architecture manual version 1.10,
chapter 3.1.11:
The FS and XS fields use the same status encoding as shown in Table
3.3, with the four possible status values being Off, Initial, Clean,
and Dirty.
Status FS Meaning XS Meaning
0 Off All off
1 Initial None dirty of clean, some on
2 Clean None dirty, some clean
3 Dirty Some dirty
Change-Id: If0225044ed52215ce64ea979d120014e02d4ce37
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net>
---
M src/arch/riscv/virtual_memory.c
1 file changed, 0 insertions(+), 5 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/87/28987/1
diff --git a/src/arch/riscv/virtual_memory.c b/src/arch/riscv/virtual_memory.c
index d9bae2a..506a047 100644
--- a/src/arch/riscv/virtual_memory.c
+++ b/src/arch/riscv/virtual_memory.c
@@ -40,11 +40,6 @@
void mstatus_init(void)
{
- uintptr_t ms = 0;
-
- ms = INSERT_FIELD(ms, MSTATUS_FS, 3);
- write_csr(mstatus, ms);
-
// clear any pending timer interrupts.
clear_csr(mip, MIP_STIP | MIP_SSIP);
--
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Felix Held has submitted this change and it was merged. ( https://review.coreboot.org/28958 )
Change subject: util/superiotool/smsc.c: Add SCH5504 register dump
......................................................................
util/superiotool/smsc.c: Add SCH5504 register dump
There is no datasheet available for this SuperIO, but dumping all
possible registers on a Dell Optiplex GX520 resulted in data that was
similar to other supported chips. Data also matches what is set in the
BIOS, e.g. the parallel and serial ports' addresses.
Change-Id: I768e4b5ec1e73c53e1a2355e0a0657b7a5ccbb89
Signed-off-by: Angel Pons <th3fanbus(a)gmail.com>
Reviewed-on: https://review.coreboot.org/28958
Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org>
Reviewed-by: Felix Held <felix-coreboot(a)felixheld.de>
---
M util/superiotool/smsc.c
1 file changed, 26 insertions(+), 1 deletion(-)
Approvals:
build bot (Jenkins): Verified
Felix Held: Looks good to me, approved
diff --git a/util/superiotool/smsc.c b/util/superiotool/smsc.c
index 820bc16..2fe940c 100644
--- a/util/superiotool/smsc.c
+++ b/util/superiotool/smsc.c
@@ -715,7 +715,32 @@
{0x30,0x60,0x61,0x62,0x63,0xf0,0xf1,0xf2,EOT},
{0x00,0x00,0x00,0x00,0x00,NANA,RSVD,0x04,EOT}},
{EOT}}},
- {0x79, "SCH5504", { /* From sensors-detect (no datasheet) */
+ {0x79, "SCH5504", { /* No datasheet, reverse-engineered */
+ {NOLDN, NULL, /* FIXME: Is this correct? */
+ {0x02,0x03,0x21,0x22,0x23,0x24,0x26,0x27,
+ 0x28,0x2a,0x2b,0x2c,0x2d,0x2e,0x2f,EOT},
+ {0x00,RSVD,MISC,0x00,0x00,0x04,MISC,0x00,
+ RSVD,0x00,0x00,0x00,0x00,0x00,0x00,EOT}},
+ {0x0, "Floppy",
+ {0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,0xf2,0xf4,
+ 0xf5,EOT},
+ {0x00,0x03,0xf0,0x06,0x02,0x0e,0x00,0xff,0x00,
+ 0x00,EOT}},
+ {0x3, "Parallel port",
+ {0x30,0x60,0x61,0x70,0x74,0xf0,0xf1,EOT},
+ {0x00,0x00,0x00,0x00,0x04,0x3c,0x00,EOT}},
+ {0x4, "COM1",
+ {0x30,0x60,0x61,0x70,0xf0,EOT},
+ {0x00,0x00,0x00,0x00,0x00,EOT}},
+ {0x5, "COM2",
+ {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf2,EOT},
+ {0x00,0x00,0x00,0x00,0x00,0x02,0x03,EOT}},
+ {0x7, "Keyboard",
+ {0x30,0x70,0x72,0xf0,EOT},
+ {0x00,0x00,0x00,0x00,EOT}},
+ {0xa, "Runtime registers", /* FIXME: Is this correct? */
+ {0x30,0x60,0x61,0x70,0xf0,0xf1,EOT},
+ {0x00,0x00,0x00,0x00,0x00,RSVD,EOT}},
{EOT}}},
{0x7a, "LPC47N217", { /* Found in Toshiba Satellite A80-117. */
{NOLDN, NULL,
--
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Gerrit-Change-Id: I768e4b5ec1e73c53e1a2355e0a0657b7a5ccbb89
Gerrit-Change-Number: 28958
Gerrit-PatchSet: 3
Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Reviewer: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de>
Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>
Felix Held has posted comments on this change. ( https://review.coreboot.org/28971 )
Change subject: src/superio/smsc/smscsuperio/superio.c: Add SCH5504
......................................................................
Patch Set 1: Code-Review+1
looks good to me; I'd like to wait with +2ing this until there is a patch adding mainboard with this superio in the review system though
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Gerrit-Change-Id: I6c433fa04c01ba6315bcdca699030dfce18a169a
Gerrit-Change-Number: 28971
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Gerrit-Owner: Angel Pons <th3fanbus(a)gmail.com>
Gerrit-Reviewer: Felix Held <felix-coreboot(a)felixheld.de>
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Gerrit-Comment-Date: Wed, 10 Oct 2018 11:17:15 +0000
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Patrick Rudolph has uploaded this change for review. ( https://review.coreboot.org/28986
Change subject: mb/cavium/cn8100_sff_evb: Only expose two UARTs
......................................................................
mb/cavium/cn8100_sff_evb: Only expose two UARTs
Only two UARTs are connected to the FTDI UART USB chip.
Change-Id: Id5ae7266ce44c9f64c7f7aeaf23c49122041f47a
Signed-off-by: Patrick Rudolph <patrick.rudolph(a)9elements.com>
---
M src/mainboard/cavium/cn8100_sff_evb/devicetree.cb
1 file changed, 2 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/86/28986/1
diff --git a/src/mainboard/cavium/cn8100_sff_evb/devicetree.cb b/src/mainboard/cavium/cn8100_sff_evb/devicetree.cb
index 3398e9a..00be155 100644
--- a/src/mainboard/cavium/cn8100_sff_evb/devicetree.cb
+++ b/src/mainboard/cavium/cn8100_sff_evb/devicetree.cb
@@ -93,11 +93,11 @@
end
chip soc/cavium/common/pci
register "secure" = "1"
- device pci 08.2 on end # UUA2
+ device pci 08.2 off end # UUA2
end
chip soc/cavium/common/pci
register "secure" = "1"
- device pci 08.3 on end # UUA3
+ device pci 08.3 off end # UUA3
end
chip soc/cavium/common/pci
register "secure" = "1"
--
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