coreboot-gerrit October 2018

coreboot-gerrit@coreboot.org
  • 1 participants
  • 1285 discussions

Change in coreboot[master]: soc/intel/cannonlake: Enable ISH from device
by Lijian Zhao (Code Review)
1 year, 9 months

Change in coreboot[master]: soc/intel/cannonlake: Enable ISH from device
by Lijian Zhao (Code Review)
1 year, 9 months

Change in coreboot[master]: sb/intel/common/pciehp.h: Fix missing license header
by Elyes HAOUAS (Code Review)
1 year, 9 months

Change in coreboot[master]: sb/intel/common/pciehp.h: Fix missing license header
by Elyes HAOUAS (Code Review)
1 year, 9 months

Change in coreboot[master]: src: Add missing include <stdint.h>
by Elyes HAOUAS (Code Review)
1 year, 9 months

Change in coreboot[master]: src: Add missing include <stdint.h>
by Elyes HAOUAS (Code Review)
1 year, 9 months

Change in coreboot[master]: cpu/amd: Use common AMD's MSR
by Elyes HAOUAS (Code Review)
1 year, 9 months

Change in coreboot[master]: cpu/amd: Replace MSR addresses with macros
by Richard Spiegel (Code Review)
1 year, 9 months

Change in coreboot[master]: Veyron: add Hynix H9CCNNNBKTMLBR-NTD ddr with RAMID '00Z1'
by Julius Werner (Code Review)
1 year, 9 months

Change in coreboot[master]: Veyron: add Hynix H9CCNNNBKTMLBR-NTD ddr with RAMID '00Z1'
by Julius Werner (Code Review)
1 year, 9 months
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