coreboot-gerrit September 2017

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Change in coreboot[master]: Fizz: Continue booting with EC in RW for EC-EFS
by build bot (Jenkins) (Code Review) 26 Sep '17

26 Sep '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21711 ) Change subject: Fizz: Continue booting with EC in RW for EC-EFS ...................................................................... Patch Set 1: Verified-1 Build Failed https://qa.coreboot.org/job/coreboot-gerrit/61161/ : FAILURE https://qa.coreboot.org/job/coreboot-checkpatch/16326/ : SUCCESS -- To view, visit https://review.coreboot.org/21711 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I45a874b73c46ea88cb831485757d194faa9f4c99 Gerrit-Change-Number: 21711 Gerrit-PatchSet: 1 Gerrit-Owner: Daisuke Nojiri <dnojiri(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 26 Sep 2017 22:08:54 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: Fizz: Continue booting with EC in RW for EC-EFS
by Daisuke Nojiri (Code Review) 26 Sep '17

26 Sep '17

Daisuke Nojiri has uploaded this change for review. ( https://review.coreboot.org/21711 Change subject: Fizz: Continue booting with EC in RW for EC-EFS ...................................................................... Fizz: Continue booting with EC in RW for EC-EFS If EC does EFS, it jumps to RW in all cases except when recovery is requested manually. This patch makes Coreboot on EC-EFS systems check whether EC is running in RO or not only when recovery is requested manually. BUG=b:66516882 BRANCH=none TEST=Boot Fizz. Change-Id: I45a874b73c46ea88cb831485757d194faa9f4c99 Signed-off-by: Daisuke Nojiri <dnojiri(a)chromium.org> --- M src/ec/google/chromeec/ec.c M src/vboot/bootmode.c M src/vboot/vboot_common.h 3 files changed, 17 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/11/21711/1 diff --git a/src/ec/google/chromeec/ec.c b/src/ec/google/chromeec/ec.c index 03d4c3b..1783281 100644 --- a/src/ec/google/chromeec/ec.c +++ b/src/ec/google/chromeec/ec.c @@ -668,6 +668,15 @@ static int ec_image_type; /* Cached EC image type (ro or rw). */ +static +int need_ec_in_ro(void) +{ + if (IS_ENABLED(CONFIG_VBOOT_EC_EFS)) + return vboot_recovery_mode_enabled_manually(); + else + return vboot_recovery_mode_enabled(); +} + void google_chromeec_init(void) { struct chromeec_command cec_cmd; @@ -698,8 +707,7 @@ } if (cec_cmd.cmd_code || - (vboot_recovery_mode_enabled() && - (cec_resp.current_image != EC_IMAGE_RO))) { + (need_ec_in_ro() && (cec_resp.current_image != EC_IMAGE_RO))) { /* Reboot the EC and make it come back in RO mode */ printk(BIOS_DEBUG, "Rebooting with EC in RO mode:\n"); post_code(0); /* clear current post code */ diff --git a/src/vboot/bootmode.c b/src/vboot/bootmode.c index 1207448..23285dd 100644 --- a/src/vboot/bootmode.c +++ b/src/vboot/bootmode.c @@ -141,6 +141,11 @@ return !!vboot_check_recovery_request(); } +int vboot_recovery_mode_enabled_manually(void) +{ + return vboot_check_recovery_request() == VB2_RECOVERY_RO_MANUAL; +} + int __attribute__((weak)) clear_recovery_mode_switch(void) { // Weak implementation. Nothing to do. diff --git a/src/vboot/vboot_common.h b/src/vboot/vboot_common.h index 8c92f7f..1636a5e 100644 --- a/src/vboot/vboot_common.h +++ b/src/vboot/vboot_common.h @@ -108,10 +108,12 @@ #if IS_ENABLED(CONFIG_VBOOT) int vboot_developer_mode_enabled(void); int vboot_recovery_mode_enabled(void); +int vboot_recovery_mode_enabled_manually(void); int vboot_recovery_mode_memory_retrain(void); #else /* !CONFIG_VBOOT */ static inline int vboot_developer_mode_enabled(void) { return 0; } static inline int vboot_recovery_mode_enabled(void) { return 0; } +static inline int vboot_recovery_mode_enabled_manually(void) { return 0; } static inline int vboot_recovery_mode_memory_retrain(void) { return 0; } #endif -- To view, visit https://review.coreboot.org/21711 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I45a874b73c46ea88cb831485757d194faa9f4c99 Gerrit-Change-Number: 21711 Gerrit-PatchSet: 1 Gerrit-Owner: Daisuke Nojiri <dnojiri(a)chromium.org>

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Change in coreboot[master]: buildgcc: Implement simple tarball hash verification
by build bot (Jenkins) (Code Review) 26 Sep '17

26 Sep '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21592 ) Change subject: buildgcc: Implement simple tarball hash verification ...................................................................... Patch Set 4: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/61153/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/16319/ : SUCCESS https://qa.coreboot.org/job/coreboot-toolchain/369/ : SUCCESS -- To view, visit https://review.coreboot.org/21592 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I0d5d67b34684d02011a845d00f6f5b6769f43b4f Gerrit-Change-Number: 21592 Gerrit-PatchSet: 4 Gerrit-Owner: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Reviewer: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Nico Huber <nico.h(a)gmx.de> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Philipp Deppenwiese <zaolin.daisuki(a)gmail.com> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 26 Sep 2017 22:03:10 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: src/vendorcode/amd: Use AR variable in Makefiles
by build bot (Jenkins) (Code Review) 26 Sep '17

26 Sep '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21700 ) Change subject: src/vendorcode/amd: Use AR variable in Makefiles ...................................................................... Patch Set 2: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/61160/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/16325/ : SUCCESS -- To view, visit https://review.coreboot.org/21700 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I5158f1bcc18eb5b15f310d0cf50fb787c12317c8 Gerrit-Change-Number: 21700 Gerrit-PatchSet: 2 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 26 Sep 2017 21:46:45 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: src/vendorcode/amd: Use AR variable in Makefiles
by Martin Roth (Code Review) 26 Sep '17

26 Sep '17

Martin Roth has posted comments on this change. ( https://review.coreboot.org/21700 ) Change subject: src/vendorcode/amd: Use AR variable in Makefiles ...................................................................... Patch Set 1: (1 comment) https://review.coreboot.org/#/c/21700/1/src/vendorcode/amd/agesa/f12/Makefi… File src/vendorcode/amd/agesa/f12/Makefile.inc: https://review.coreboot.org/#/c/21700/1/src/vendorcode/amd/agesa/f12/Makefi… PS1, Line 62: > Spurious newline? Done -- To view, visit https://review.coreboot.org/21700 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I5158f1bcc18eb5b15f310d0cf50fb787c12317c8 Gerrit-Change-Number: 21700 Gerrit-PatchSet: 1 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 26 Sep 2017 21:41:52 +0000 Gerrit-HasComments: Yes

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Change in coreboot[master]: src/vendorcode/amd: Use AR variable in Makefiles
by Martin Roth (Code Review) 26 Sep '17

26 Sep '17

Hello Jonathan Neuschäfer, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/21700 to look at the new patch set (#2). Change subject: src/vendorcode/amd: Use AR variable in Makefiles ...................................................................... src/vendorcode/amd: Use AR variable in Makefiles Change-Id: I5158f1bcc18eb5b15f310d0cf50fb787c12317c8 Signed-off-by: Martin Roth <martinroth(a)google.com> --- M src/vendorcode/amd/agesa/f12/Makefile.inc M src/vendorcode/amd/agesa/f15/Makefile.inc M src/vendorcode/amd/agesa/f15tn/Makefile.inc M src/vendorcode/amd/agesa/f16kb/Makefile.inc M src/vendorcode/amd/pi/Makefile.inc 5 files changed, 5 insertions(+), 5 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/00/21700/2 -- To view, visit https://review.coreboot.org/21700 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I5158f1bcc18eb5b15f310d0cf50fb787c12317c8 Gerrit-Change-Number: 21700 Gerrit-PatchSet: 2 Gerrit-Owner: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: nb/intel/sandybridge/raminit: Fix setting scrub seed for CH1
by build bot (Jenkins) (Code Review) 26 Sep '17

26 Sep '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21710 ) Change subject: nb/intel/sandybridge/raminit: Fix setting scrub seed for CH1 ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/61159/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/16324/ : SUCCESS -- To view, visit https://review.coreboot.org/21710 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I3778947e96b3298c38e6d5b74988e617e1ffea7b Gerrit-Change-Number: 21710 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 26 Sep 2017 21:26:52 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: soc/intel/cannonlake: Add config option of CpuRatio
by build bot (Jenkins) (Code Review) 26 Sep '17

26 Sep '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21709 ) Change subject: soc/intel/cannonlake: Add config option of CpuRatio ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/61158/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/16323/ : SUCCESS -- To view, visit https://review.coreboot.org/21709 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I4a1df15c619038f17c1bef5b7f53d322e352c56b Gerrit-Change-Number: 21709 Gerrit-PatchSet: 1 Gerrit-Owner: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Tue, 26 Sep 2017 21:20:00 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: nb/intel/sandybridge/raminit: Fix setting scrub seed for CH1
by Arthur Heymans (Code Review) 26 Sep '17

26 Sep '17

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/21710 Change subject: nb/intel/sandybridge/raminit: Fix setting scrub seed for CH1 ...................................................................... nb/intel/sandybridge/raminit: Fix setting scrub seed for CH1 UNTESTED Change-Id: I3778947e96b3298c38e6d5b74988e617e1ffea7b Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/northbridge/intel/sandybridge/raminit_common.c 1 file changed, 3 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/10/21710/1 diff --git a/src/northbridge/intel/sandybridge/raminit_common.c b/src/northbridge/intel/sandybridge/raminit_common.c index 3e69f4d..ea5108e 100644 --- a/src/northbridge/intel/sandybridge/raminit_common.c +++ b/src/northbridge/intel/sandybridge/raminit_common.c @@ -3108,9 +3108,9 @@ }; FOR_ALL_POPULATED_CHANNELS { MCHBAR32(0x4020 + 0x400 * channel) &= ~0x10000000; - write32(DEFAULT_MCHBAR + 0x4034, seeds[channel][0]); - write32(DEFAULT_MCHBAR + 0x403c, seeds[channel][1]); - write32(DEFAULT_MCHBAR + 0x4038, seeds[channel][2]); + MCHBAR32(0x4034 + 0x400 * channel) = seeds[channel][0]; + MCHBAR32(0x403c + 0x400 * channel) = seeds[channel][1]; + MCHBAR32(0x4038 + 0x400 * channel) = seeds[channel][2]; } } -- To view, visit https://review.coreboot.org/21710 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I3778947e96b3298c38e6d5b74988e617e1ffea7b Gerrit-Change-Number: 21710 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>

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Change in coreboot[master]: soc/intel/cannonlake: Add config option of CpuRatio
by Lijian Zhao (Code Review) 26 Sep '17

26 Sep '17

Lijian Zhao has uploaded this change for review. ( https://review.coreboot.org/21709 Change subject: soc/intel/cannonlake: Add config option of CpuRatio ...................................................................... soc/intel/cannonlake: Add config option of CpuRatio Add config option of CPU ratio as input to Fsp Memory init. Change-Id: I4a1df15c619038f17c1bef5b7f53d322e352c56b Signed-off-by: Lijian Zhao <lijian.zhao(a)intel.com> --- M src/soc/intel/cannonlake/chip.h M src/soc/intel/cannonlake/romstage/romstage.c 2 files changed, 4 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/09/21709/1 diff --git a/src/soc/intel/cannonlake/chip.h b/src/soc/intel/cannonlake/chip.h index 5a4dfd3..49b6140 100644 --- a/src/soc/intel/cannonlake/chip.h +++ b/src/soc/intel/cannonlake/chip.h @@ -227,6 +227,9 @@ * PchSerialIoHidden */ uint8_t SerialIoDevMode[PchSerialIoIndexMAX]; + /* Valid Range 0 to 63. CPU Ratio is 0 when disabled */ + uint8_t cpuratio; + }; typedef struct soc_intel_cannonlake_config config_t; diff --git a/src/soc/intel/cannonlake/romstage/romstage.c b/src/soc/intel/cannonlake/romstage/romstage.c index a9ad1d8..9e95b47 100644 --- a/src/soc/intel/cannonlake/romstage/romstage.c +++ b/src/soc/intel/cannonlake/romstage/romstage.c @@ -86,6 +86,7 @@ m_cfg->PcieRpEnableMask = mask; m_cfg->PrmrrSize = config->PrmrrSize; m_cfg->EnableC6Dram = config->enable_c6dram; + m_cfg->CpuRatio = config->cpuratio; } void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version) -- To view, visit https://review.coreboot.org/21709 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I4a1df15c619038f17c1bef5b7f53d322e352c56b Gerrit-Change-Number: 21709 Gerrit-PatchSet: 1 Gerrit-Owner: Lijian Zhao <lijian.zhao(a)intel.com>

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coreboot-gerrit September 2017