coreboot-gerrit September 2017

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Change in coreboot[master]: google/gru: Re-enable 3V rail GPIO on Scarlet
by Julius Werner (Code Review) 02 Sep '17

02 Sep '17

Julius Werner has posted comments on this change. ( https://review.coreboot.org/21328 ) Change subject: google/gru: Re-enable 3V rail GPIO on Scarlet ...................................................................... Patch Set 2: (1 comment) https://review.coreboot.org/#/c/21328/1/src/mainboard/google/gru/mainboard.c File src/mainboard/google/gru/mainboard.c: https://review.coreboot.org/#/c/21328/1/src/mainboard/google/gru/mainboard.… PS1, Line 95: IS_ENABLED(CONFIG_BOARD_GOO > Always use IS_ENABLED() to check Kconfig options. You should know this by n Whoops, sorry, didn't pay attention. Fixed! -- To view, visit https://review.coreboot.org/21328 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I6037aa486b50119f2c7b859b966cadc3686e3459 Gerrit-Change-Number: 21328 Gerrit-PatchSet: 2 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: David Schneider <dnschneid(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Lin Huang <hl(a)rock-chips.com> Gerrit-Reviewer: Philip Chen <philipchen(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sat, 02 Sep 2017 00:37:37 +0000 Gerrit-HasComments: Yes

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Change in coreboot[master]: google/gru: Re-enable 3V rail GPIO on Scarlet
by Julius Werner (Code Review) 02 Sep '17

02 Sep '17

Hello Lin Huang, David Schneider, Philip Chen, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/21328 to look at the new patch set (#2). Change subject: google/gru: Re-enable 3V rail GPIO on Scarlet ...................................................................... google/gru: Re-enable 3V rail GPIO on Scarlet We've decided to move control for the 3.0V rail (technically 3.3V on Scarlet, but who cares about millivolts) back to a GPIO on the AP for Scarlet rev2. This patch adds the necessary code to enable it and make ARM TF aware of its existence. Since the pin had previously not been connected to anything, we shouldn't really need to guard this by board ID... older Scarlets will just be twiddling an empty pin. Change-Id: I6037aa486b50119f2c7b859b966cadc3686e3459 Signed-off-by: Julius Werner <jwerner(a)chromium.org> --- M src/mainboard/google/gru/board.h M src/mainboard/google/gru/bootblock.c M src/mainboard/google/gru/mainboard.c 3 files changed, 23 insertions(+), 34 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/28/21328/2 -- To view, visit https://review.coreboot.org/21328 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: I6037aa486b50119f2c7b859b966cadc3686e3459 Gerrit-Change-Number: 21328 Gerrit-PatchSet: 2 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: David Schneider <dnschneid(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Lin Huang <hl(a)rock-chips.com> Gerrit-Reviewer: Philip Chen <philipchen(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: google/gru: Re-enable 3V rail GPIO on Scarlet
by Julius Werner (Code Review) 02 Sep '17

02 Sep '17

Julius Werner has posted comments on this change. ( https://review.coreboot.org/21328 ) Change subject: google/gru: Re-enable 3V rail GPIO on Scarlet ...................................................................... Patch Set 1: (1 comment) https://review.coreboot.org/#/c/21328/1/src/mainboard/google/gru/mainboard.c File src/mainboard/google/gru/mainboard.c: https://review.coreboot.org/#/c/21328/1/src/mainboard/google/gru/mainboard.… PS1, Line 95: CONFIG_BOARD_GOOGLE_SCARLET Always use IS_ENABLED() to check Kconfig options. You should know this by now... -- To view, visit https://review.coreboot.org/21328 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I6037aa486b50119f2c7b859b966cadc3686e3459 Gerrit-Change-Number: 21328 Gerrit-PatchSet: 1 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: David Schneider <dnschneid(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Lin Huang <hl(a)rock-chips.com> Gerrit-Reviewer: Philip Chen <philipchen(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sat, 02 Sep 2017 00:35:51 +0000 Gerrit-HasComments: Yes

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Change in coreboot[master]: gooble/kahlee: Use devicetree register values for UMA
by Marshall Dawson (Code Review) 02 Sep '17

02 Sep '17

Marshall Dawson has removed Marc Herbert from this change. ( https://review.coreboot.org/21335 ) Change subject: gooble/kahlee: Use devicetree register values for UMA ...................................................................... Removed reviewer Marc Herbert. -- To view, visit https://review.coreboot.org/21335 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: deleteReviewer Gerrit-Change-Id: I2bc808d8b402c3eb16a1a5962f3fa9d6b224cf52 Gerrit-Change-Number: 21335 Gerrit-PatchSet: 1 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: amd/stoneyridge: Add UMA settings to chip.h
by build bot (Jenkins) (Code Review) 02 Sep '17

02 Sep '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21334 ) Change subject: amd/stoneyridge: Add UMA settings to chip.h ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/14990/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/59719/ : SUCCESS -- To view, visit https://review.coreboot.org/21334 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I38b6603f365fdc1f1f615794365476f749e58be7 Gerrit-Change-Number: 21334 Gerrit-PatchSet: 1 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sat, 02 Sep 2017 00:24:53 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: gooble/kahlee: Use devicetree register values for UMA
by build bot (Jenkins) (Code Review) 02 Sep '17

02 Sep '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21335 ) Change subject: gooble/kahlee: Use devicetree register values for UMA ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/14991/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/59718/ : SUCCESS -- To view, visit https://review.coreboot.org/21335 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I2bc808d8b402c3eb16a1a5962f3fa9d6b224cf52 Gerrit-Change-Number: 21335 Gerrit-PatchSet: 1 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sat, 02 Sep 2017 00:23:22 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: amd/stoneyridge: Remove duplicate PCI definitions
by build bot (Jenkins) (Code Review) 02 Sep '17

02 Sep '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21333 ) Change subject: amd/stoneyridge: Remove duplicate PCI definitions ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/14989/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/59717/ : SUCCESS -- To view, visit https://review.coreboot.org/21333 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Iafb10476f32505f6b4ad7b5ba6fa5de2c4648836 Gerrit-Change-Number: 21333 Gerrit-PatchSet: 1 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sat, 02 Sep 2017 00:22:48 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: superio/winbond/*: Unify w*_set_clksel_48()
by build bot (Jenkins) (Code Review) 02 Sep '17

02 Sep '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21331 ) Change subject: superio/winbond/*: Unify w*_set_clksel_48() ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/14987/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/59715/ : SUCCESS -- To view, visit https://review.coreboot.org/21331 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: If05e0db93375641917e538d83aacd1b50fbd033b Gerrit-Change-Number: 21331 Gerrit-PatchSet: 1 Gerrit-Owner: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sat, 02 Sep 2017 00:20:28 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: winbond/w83697hf: Drop early_serial.c
by build bot (Jenkins) (Code Review) 02 Sep '17

02 Sep '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21332 ) Change subject: winbond/w83697hf: Drop early_serial.c ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/14988/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/59716/ : SUCCESS -- To view, visit https://review.coreboot.org/21332 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I7424233b5d70e143721038493f194760f07346a1 Gerrit-Change-Number: 21332 Gerrit-PatchSet: 1 Gerrit-Owner: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sat, 02 Sep 2017 00:18:06 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: gooble/kahlee: Use devicetree register values for UMA
by Marshall Dawson (Code Review) 02 Sep '17

02 Sep '17

Marshall Dawson has uploaded this change for review. ( https://review.coreboot.org/21335 Change subject: gooble/kahlee: Use devicetree register values for UMA ...................................................................... gooble/kahlee: Use devicetree register values for UMA Modify Kahlee's OemPostParams() to vary the UMA settings passed to AmdInitPost(). BUG=b:64927639 TEST=default, and 64, 128, 256, 384MB non-legacy configurations. Change-Id: I2bc808d8b402c3eb16a1a5962f3fa9d6b224cf52 Signed-off-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> --- M src/mainboard/google/kahlee/OemCustomize.c M src/mainboard/google/kahlee/devicetree.cb 2 files changed, 28 insertions(+), 1 deletion(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/35/21335/1 diff --git a/src/mainboard/google/kahlee/OemCustomize.c b/src/mainboard/google/kahlee/OemCustomize.c index 2b3ac29..5da260b 100644 --- a/src/mainboard/google/kahlee/OemCustomize.c +++ b/src/mainboard/google/kahlee/OemCustomize.c @@ -1,7 +1,7 @@ /* * This file is part of the coreboot project. * - * Copyright (C) 2015-2016 Advanced Micro Devices, Inc. + * Copyright (C) 2015-2017 Advanced Micro Devices, Inc. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License as published by @@ -13,8 +13,11 @@ * GNU General Public License for more details. */ +#include <device/device.h> #include <agesawrapper.h> #include <PlatformMemoryConfiguration.h> +#include <chip.h> +#include <soc/pci_devs.h> #define FILECODE PROC_GNB_PCIE_FAMILY_0X15_F15PCIECOMPLEXCONFIG_FILECODE @@ -34,6 +37,27 @@ void OemPostParams(AMD_POST_PARAMS *PostParams) { + const struct soc_amd_stoneyridge_config *cfg; + const struct device *dev = dev_find_slot(0, GNB_DEVFN); + + if (!dev || !dev->chip_info) + printk(BIOS_ERR, "BUG! Could not find SoC devicetree config\n"); + cfg = dev->chip_info; + PostParams->MemConfig.PlatformMemoryConfiguration = (PSO_ENTRY *)DDR4PlatformMemoryConfiguration; + + if (IS_ENABLED(CONFIG_GFXUMA)) { + PostParams->MemConfig.UmaMode = cfg->uma_mode; + PostParams->MemConfig.UmaVersion = cfg->uma_type; + if (cfg->uma_mode == UMAMODE_SPECIFIED) + PostParams->MemConfig.UmaSize = cfg->uma_size; + else + PostParams->MemConfig.UmaSize = 0; + } else { + if (cfg->uma_mode != UMAMODE_NONE) + printk(BIOS_WARNING, "Warning: UMA mode was requested " + "but CONFIG_GFXUMA is not enabled\n"); + PostParams->MemConfig.UmaMode = UMAMODE_NONE; + } } diff --git a/src/mainboard/google/kahlee/devicetree.cb b/src/mainboard/google/kahlee/devicetree.cb index 0ed3336..0be629b 100644 --- a/src/mainboard/google/kahlee/devicetree.cb +++ b/src/mainboard/google/kahlee/devicetree.cb @@ -18,6 +18,9 @@ { { {0xA0, 0x00} }, // socket 0 - Channel 0, slot 0 }" + register "uma_type" = "UMATYPE_LEGACY" + register "uma_mode" = "UMAMODE_AUTO" + register "uma_size" = "0" device cpu_cluster 0 on device lapic 10 on end -- To view, visit https://review.coreboot.org/21335 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I2bc808d8b402c3eb16a1a5962f3fa9d6b224cf52 Gerrit-Change-Number: 21335 Gerrit-PatchSet: 1 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com>

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coreboot-gerrit September 2017