coreboot-gerrit September 2017

coreboot-gerrit@coreboot.org

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Change in coreboot[master]: intel/skylake: nhlt: Add capture format for IV feedback from max98927
by harsha p (Code Review) 02 Sep '17

02 Sep '17

Hello HARSHAPRIYA N, I'd like you to do a code review. Please visit https://review.coreboot.org/21340 to review the following change. Change subject: intel/skylake: nhlt: Add capture format for IV feedback from max98927 ...................................................................... intel/skylake: nhlt: Add capture format for IV feedback from max98927 This changelist adds the capture format to be set for max98927. The nhlt blob is the same but the format params for capture are different from the render. BUG=b:36724448 TEST=IV feedback data is of good quality Change-Id: I135cf4479e89cd2046ff46027f94c0f71aed650e Signed-off-by: Harsha Priya <harshapriya.n(a)intel.com> --- M src/soc/intel/skylake/nhlt/max98927.c 1 file changed, 20 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/21340/1 diff --git a/src/soc/intel/skylake/nhlt/max98927.c b/src/soc/intel/skylake/nhlt/max98927.c index 8b14df7..9a20cd8 100644 --- a/src/soc/intel/skylake/nhlt/max98927.c +++ b/src/soc/intel/skylake/nhlt/max98927.c @@ -36,6 +36,17 @@ }, }; +static const struct nhlt_format_config max98927_capture_formats[] = { + /* 48 KHz 16-bits per sample. */ + { + .num_channels = 4, + .sample_freq_khz = 48, + .container_bits_per_sample = 32, + .valid_bits_per_sample = 16, + .speaker_mask = SPEAKER_FRONT_LEFT | SPEAKER_FRONT_RIGHT | SPEAKER_BACK_LEFT | SPEAKER_BACK_RIGHT, + .settings_file = "max98927-render-2ch-48khz-16b.bin", + }, +}; static const struct nhlt_endp_descriptor max98927_descriptors[] = { { .link = NHLT_LINK_SSP, @@ -46,6 +57,15 @@ .formats = max98927_render_formats, .num_formats = ARRAY_SIZE(max98927_render_formats), }, + { + .link = NHLT_LINK_SSP, + .device = NHLT_SSP_DEV_I2S, + .direction = NHLT_DIR_CAPTURE, + .vid = NHLT_VID, + .did = NHLT_DID_SSP, + .formats = max98927_capture_formats, + .num_formats = ARRAY_SIZE(max98927_capture_formats), + }, }; int nhlt_soc_add_max98927(struct nhlt *nhlt, int hwlink) -- To view, visit https://review.coreboot.org/21340 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I135cf4479e89cd2046ff46027f94c0f71aed650e Gerrit-Change-Number: 21340 Gerrit-PatchSet: 1 Gerrit-Owner: harsha p <harsha.p.n(a)intel.corp-partner.google.com> Gerrit-Reviewer: HARSHAPRIYA N <harshapriya.n(a)intel.com>

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Change in coreboot[master]: [WIP]src/soc/intel/cannonlake: Define USB AFE params
by build bot (Jenkins) (Code Review) 02 Sep '17

02 Sep '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21339 ) Change subject: [WIP]src/soc/intel/cannonlake: Define USB AFE params ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/14995/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/59725/ : SUCCESS -- To view, visit https://review.coreboot.org/21339 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I42243950366d672e886158eb1934350f47b4ff1f Gerrit-Change-Number: 21339 Gerrit-PatchSet: 1 Gerrit-Owner: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sat, 02 Sep 2017 05:43:34 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: [WIP]src/soc/intel/cannonlake: Define USB AFE params
by Pratikkumar V Prajapati (Code Review) 02 Sep '17

02 Sep '17

Pratikkumar V Prajapati has uploaded this change for review. ( https://review.coreboot.org/21339 Change subject: [WIP]src/soc/intel/cannonlake: Define USB AFE params ...................................................................... [WIP]src/soc/intel/cannonlake: Define USB AFE params Change-Id: I42243950366d672e886158eb1934350f47b4ff1f Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati(a)intel.com> --- M src/soc/intel/cannonlake/include/soc/usb.h 1 file changed, 49 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/21339/1 diff --git a/src/soc/intel/cannonlake/include/soc/usb.h b/src/soc/intel/cannonlake/include/soc/usb.h index eac017e..c02949f 100644 --- a/src/soc/intel/cannonlake/include/soc/usb.h +++ b/src/soc/intel/cannonlake/include/soc/usb.h @@ -19,6 +19,25 @@ #include <stdint.h> +/* Per Port HS Transmitter Emphasis */ +#define USB2_EMP_OFF 0 +#define USB2_DE_EMP_ON 1 +#define USB2_PRE_EMP_ON 2 +#define USB2_DE_EMP_ON_PRE_EMP_ON 3 + +/* Per Port Half Bit Pre-emphasis */ +#define USB2_FULL_BIT_PRE_EMP 0 +#define USB2_HALF_BIT_PRE_EMP 1 + +/* Per Port HS Preemphasis Bias */ +#define USB2_BIAS_0MV 0 +#define USB2_BIAS_11P25MV 1 +#define USB2_BIAS_16P9MV 2 +#define USB2_BIAS_28P15MV 3 +#define USB2_BIAS_39P35MV 5 +#define USB2_BIAS_45MV 6 +#define USB2_BIAS_56P3MV 7 + struct usb2_port_config { uint8_t enable; uint8_t ocpin; @@ -28,6 +47,29 @@ uint8_t pre_emp_bit; }; +/* USB Overcurrent pins definition */ +enum { + OC0 = 0, + OC1, + OC2, + OC3, + OC4, + OC5, + OC6, + OC7, + OCMAX, + OC_SKIP = 0xff, /* Skip OC programming */ +}; + +#define USB2_PORT_EMPTY { \ + .enable = 0, \ + .ocpin = OC_SKIP, \ + .tx_bias = USB2_BIAS_0MV, \ + .tx_emp_enable = USB2_EMP_OFF, \ + .pre_emp_bias = USB2_BIAS_0MV, \ + .pre_emp_bit = USB2_HALF_BIT_PRE_EMP, \ +} + struct usb3_port_config { uint8_t enable; uint8_t ocpin; @@ -35,4 +77,11 @@ uint8_t tx_downscale_amp; }; +#define USB3_PORT_EMPTY { \ + .enable = 0, \ + .ocpin = OC_SKIP, \ + .tx_de_emp = 0x00, \ + .tx_downscale_amp = 0x00, \ +} + #endif -- To view, visit https://review.coreboot.org/21339 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I42243950366d672e886158eb1934350f47b4ff1f Gerrit-Change-Number: 21339 Gerrit-PatchSet: 1 Gerrit-Owner: Pratikkumar V Prajapati <pratikkumar.v.prajapati(a)intel.com>

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Change in coreboot[master]: util/board_status: do a spell check
by Jonathan Neuschäfer (Code Review) 02 Sep '17

02 Sep '17

Jonathan Neuschäfer has posted comments on this change. ( https://review.coreboot.org/21322 ) Change subject: util/board_status: do a spell check ...................................................................... Patch Set 1: Code-Review+1 (2 comments) https://review.coreboot.org/#/c/21322/1/util/board_status/README File util/board_status/README: https://review.coreboot.org/#/c/21322/1/util/board_status/README@12 PS1, Line 12: Rereference: "Reference"? I can't imagine what a re-reference is… https://review.coreboot.org/#/c/21322/1/util/board_status/README@13 PS1, Line 13: -- (To keep the formatting nice, please adjust this line, if you change the above line) -- To view, visit https://review.coreboot.org/21322 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ie39be471851586076343b8e9454a9140d4664b8d Gerrit-Change-Number: 21322 Gerrit-PatchSet: 1 Gerrit-Owner: Idwer Vollering <vidwer(a)gmail.com> Gerrit-Reviewer: Denis 'GNUtoo' Carikli <GNUtoo(a)no-log.org> Gerrit-Reviewer: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sat, 02 Sep 2017 02:15:46 +0000 Gerrit-HasComments: Yes

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Change in coreboot[master]: arch/x86/Kconfig: Add deprecation warnings for LATE_CBMEM_INIT
by build bot (Jenkins) (Code Review) 02 Sep '17

02 Sep '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21112 ) Change subject: arch/x86/Kconfig: Add deprecation warnings for LATE_CBMEM_INIT ...................................................................... Patch Set 6: Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/14994/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/59724/ : SUCCESS -- To view, visit https://review.coreboot.org/21112 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I2d21a6ab2fc2811d44fc4febb05841bb2f8d1857 Gerrit-Change-Number: 21112 Gerrit-PatchSet: 6 Gerrit-Owner: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Reviewer: Alexander Couzens <lynxis(a)fe80.eu> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Reviewer: Kyösti Mälkki <kyosti.malkki(a)gmail.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Stefan Reinauer <stefan.reinauer(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sat, 02 Sep 2017 02:11:02 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: superio/winbond/*: Unify w*_set_clksel_48()
by Jonathan Neuschäfer (Code Review) 02 Sep '17

02 Sep '17

Jonathan Neuschäfer has posted comments on this change. ( https://review.coreboot.org/21331 ) Change subject: superio/winbond/*: Unify w*_set_clksel_48() ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/21331 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: If05e0db93375641917e538d83aacd1b50fbd033b Gerrit-Change-Number: 21331 Gerrit-PatchSet: 1 Gerrit-Owner: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sat, 02 Sep 2017 02:01:36 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: winbond/w83697hf: Drop early_serial.c
by Jonathan Neuschäfer (Code Review) 02 Sep '17

02 Sep '17

Jonathan Neuschäfer has posted comments on this change. ( https://review.coreboot.org/21332 ) Change subject: winbond/w83697hf: Drop early_serial.c ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/21332 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I7424233b5d70e143721038493f194760f07346a1 Gerrit-Change-Number: 21332 Gerrit-PatchSet: 1 Gerrit-Owner: Keith Hui <buurin(a)gmail.com> Gerrit-Reviewer: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sat, 02 Sep 2017 01:57:34 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: Revert "soc/intel/cannonlake: Perform dram top calculation based on H...
by build bot (Jenkins) (Code Review) 02 Sep '17

02 Sep '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21336 ) Change subject: Revert "soc/intel/cannonlake: Perform dram top calculation based on HW registers" ...................................................................... Patch Set 1: Verified-1 Build Failed https://qa.coreboot.org/job/coreboot-gerrit/59723/ : FAILURE https://qa.coreboot.org/job/coreboot-checkpatch/14993/ : SUCCESS -- To view, visit https://review.coreboot.org/21336 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I51d48281acc422950348b8261fa2d6f0584ce619 Gerrit-Change-Number: 21336 Gerrit-PatchSet: 1 Gerrit-Owner: Lijian Zhao <lijian.zhao(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: John Zhao <john.zhao(a)intel.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: dhaval v sharma <dhaval.v.sharma(a)intel.com> Gerrit-Comment-Date: Sat, 02 Sep 2017 01:37:33 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: google/gru: Re-enable 3V rail GPIO on Scarlet
by David Schneider (Code Review) 02 Sep '17

02 Sep '17

David Schneider has posted comments on this change. ( https://review.coreboot.org/21328 ) Change subject: google/gru: Re-enable 3V rail GPIO on Scarlet ...................................................................... Patch Set 2: Code-Review+1 -- To view, visit https://review.coreboot.org/21328 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I6037aa486b50119f2c7b859b966cadc3686e3459 Gerrit-Change-Number: 21328 Gerrit-PatchSet: 2 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: David Schneider <dnschneid(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Lin Huang <hl(a)rock-chips.com> Gerrit-Reviewer: Philip Chen <philipchen(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sat, 02 Sep 2017 01:04:48 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: google/gru: Re-enable 3V rail GPIO on Scarlet
by build bot (Jenkins) (Code Review) 02 Sep '17

02 Sep '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21328 ) Change subject: google/gru: Re-enable 3V rail GPIO on Scarlet ...................................................................... Patch Set 2: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-checkpatch/14992/ : SUCCESS https://qa.coreboot.org/job/coreboot-gerrit/59720/ : SUCCESS -- To view, visit https://review.coreboot.org/21328 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I6037aa486b50119f2c7b859b966cadc3686e3459 Gerrit-Change-Number: 21328 Gerrit-PatchSet: 2 Gerrit-Owner: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: David Schneider <dnschneid(a)chromium.org> Gerrit-Reviewer: Julius Werner <jwerner(a)chromium.org> Gerrit-Reviewer: Lin Huang <hl(a)rock-chips.com> Gerrit-Reviewer: Philip Chen <philipchen(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sat, 02 Sep 2017 00:42:22 +0000 Gerrit-HasComments: No

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coreboot-gerrit September 2017