coreboot-gerrit September 2017

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Change in coreboot[master]: amd/stoneyridge: Use generic SMM command port values
by Marshall Dawson (Code Review) 28 Sep '17

28 Sep '17

Marshall Dawson has uploaded this change for review. ( https://review.coreboot.org/21741 Change subject: amd/stoneyridge: Use generic SMM command port values ...................................................................... amd/stoneyridge: Use generic SMM command port values Remove the old Hudson-specific SMM command port definitions and use the ones in cpu/x86/smm.h. Change-Id: I3de9a178e5f189ac1dbc921e41b69d47e3796a4f Signed-off-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> --- M src/soc/amd/stoneyridge/acpi.c M src/soc/amd/stoneyridge/include/soc/southbridge.h M src/soc/amd/stoneyridge/smihandler.c M src/soc/amd/stoneyridge/southbridge.c 4 files changed, 9 insertions(+), 16 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/21741/1 diff --git a/src/soc/amd/stoneyridge/acpi.c b/src/soc/amd/stoneyridge/acpi.c index 78fd4b7..e6e785c 100644 --- a/src/soc/amd/stoneyridge/acpi.c +++ b/src/soc/amd/stoneyridge/acpi.c @@ -24,13 +24,13 @@ #include <arch/acpigen.h> #include <arch/io.h> #include <arch/ioapic.h> +#include <cpu/x86/smm.h> #include <cbmem.h> #include <device/device.h> #include <device/pci.h> #include <soc/acpi.h> #include <soc/southbridge.h> #include <soc/nvs.h> -#include <soc/smi.h> unsigned long acpi_fill_madt(unsigned long current) { @@ -88,9 +88,9 @@ fadt->sci_int = 9; /* IRQ 09 - ACPI SCI */ if (IS_ENABLED(CONFIG_HAVE_SMI_HANDLER)) { - fadt->smi_cmd = ACPI_SMI_CTL_PORT; - fadt->acpi_enable = ACPI_SMI_CMD_ENABLE; - fadt->acpi_disable = ACPI_SMI_CMD_DISABLE; + fadt->smi_cmd = APM_CNT; + fadt->acpi_enable = APM_CNT_ACPI_ENABLE; + fadt->acpi_disable = APM_CNT_ACPI_DISABLE; fadt->s4bios_req = 0; /* Not supported */ fadt->pstate_cnt = 0; /* Not supported */ fadt->cst_cnt = 0; /* Not supported */ diff --git a/src/soc/amd/stoneyridge/include/soc/southbridge.h b/src/soc/amd/stoneyridge/include/soc/southbridge.h index 20edf5f..9f353fb 100644 --- a/src/soc/amd/stoneyridge/include/soc/southbridge.h +++ b/src/soc/amd/stoneyridge/include/soc/southbridge.h @@ -66,13 +66,6 @@ #define ACPI_GPE0_BLK (STONEYRIDGE_ACPI_IO_BASE + 0x10) /* 8 bytes */ #define ACPI_CPU_CONTROL (STONEYRIDGE_ACPI_IO_BASE + 0x08) /* 6 bytes */ -#define ACPI_SMI_CTL_PORT 0xb2 -#define ACPI_SMI_CMD_CST_CONTROL 0xde -#define ACPI_SMI_CMD_PST_CONTROL 0xad -#define ACPI_SMI_CMD_DISABLE 0xbe -#define ACPI_SMI_CMD_ENABLE 0xef -#define ACPI_SMI_CMD_S4_REQ 0xc0 - #define REV_STONEYRIDGE_A11 0x11 #define REV_STONEYRIDGE_A12 0x12 diff --git a/src/soc/amd/stoneyridge/smihandler.c b/src/soc/amd/stoneyridge/smihandler.c index 9aff690..45dada5 100644 --- a/src/soc/amd/stoneyridge/smihandler.c +++ b/src/soc/amd/stoneyridge/smihandler.c @@ -27,15 +27,15 @@ static void sb_apmc_smi_handler(void) { u32 reg32; - const uint8_t cmd = inb(ACPI_SMI_CTL_PORT); + const uint8_t cmd = inb(APM_CNT); switch (cmd) { - case ACPI_SMI_CMD_ENABLE: + case APM_CNT_ACPI_ENABLE: reg32 = inl(ACPI_PM1_CNT_BLK); reg32 |= (1 << 0); /* SCI_EN */ outl(reg32, ACPI_PM1_CNT_BLK); break; - case ACPI_SMI_CMD_DISABLE: + case APM_CNT_ACPI_DISABLE: reg32 = inl(ACPI_PM1_CNT_BLK); reg32 &= ~(1 << 0); /* clear SCI_EN */ outl(ACPI_PM1_CNT_BLK, reg32); diff --git a/src/soc/amd/stoneyridge/southbridge.c b/src/soc/amd/stoneyridge/southbridge.c index 5e36100..1ca742f 100644 --- a/src/soc/amd/stoneyridge/southbridge.c +++ b/src/soc/amd/stoneyridge/southbridge.c @@ -18,7 +18,7 @@ #include <arch/io.h> #include <arch/acpi.h> #include <bootstate.h> - +#include <cpu/x86/smm.h> #include <device/device.h> #include <device/pci.h> #include <device/pci_ids.h> @@ -79,7 +79,7 @@ pm_write16(PM_CPU_CTRL, ACPI_CPU_CONTROL); if (IS_ENABLED(CONFIG_HAVE_SMI_HANDLER)) { - pm_write16(PM_ACPI_SMI_CMD, ACPI_SMI_CTL_PORT); + pm_write16(PM_ACPI_SMI_CMD, APM_CNT); enable_acpi_cmd_smi(); } else { pm_write16(PM_ACPI_SMI_CMD, 0); -- To view, visit https://review.coreboot.org/21741 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I3de9a178e5f189ac1dbc921e41b69d47e3796a4f Gerrit-Change-Number: 21741 Gerrit-PatchSet: 1 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com>

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Change in coreboot[master]: amd/stoneyridge: Add uart.c to smm-y list
by Marshall Dawson (Code Review) 28 Sep '17

28 Sep '17

Marshall Dawson has uploaded this change for review. ( https://review.coreboot.org/21740 Change subject: amd/stoneyridge: Add uart.c to smm-y list ...................................................................... amd/stoneyridge: Add uart.c to smm-y list This corrects a build error when a developer need to use DEBUG_SMM and one of the APU's internal UARTs is used. Change-Id: Ie1962e969a8cb93eefc0b86bf4062752580e5acd Signed-off-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> --- M src/soc/amd/stoneyridge/Makefile.inc 1 file changed, 1 insertion(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/40/21740/1 diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc index e93a961..28b3244 100644 --- a/src/soc/amd/stoneyridge/Makefile.inc +++ b/src/soc/amd/stoneyridge/Makefile.inc @@ -93,6 +93,7 @@ smm-y += smihandler.c smm-y += smi_util.c smm-y += tsc_freq.c +smm-y += uart.c CPPFLAGS_common += -I$(src)/soc/amd/stoneyridge CPPFLAGS_common += -I$(src)/soc/amd/stoneyridge/include -- To view, visit https://review.coreboot.org/21740 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ie1962e969a8cb93eefc0b86bf4062752580e5acd Gerrit-Change-Number: 21740 Gerrit-PatchSet: 1 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com>

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Change in coreboot[master]: amd/stoneyridge: Remove HAVE_SMI_HANDLER from makefile
by Marshall Dawson (Code Review) 28 Sep '17

28 Sep '17

Marshall Dawson has uploaded this change for review. ( https://review.coreboot.org/21739 Change subject: amd/stoneyridge: Remove HAVE_SMI_HANDLER from makefile ...................................................................... amd/stoneyridge: Remove HAVE_SMI_HANDLER from makefile Stoney Ridge always now selects HAVE_SMI_HANDLER so it is pointless to use the variable in Makefile.inc. Make all files built into smm unconditional. Change-Id: I4ea89d7bce83a99328c58897a4098debacd86d66 Signed-off-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> --- M src/soc/amd/stoneyridge/Makefile.inc 1 file changed, 3 insertions(+), 3 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/39/21739/1 diff --git a/src/soc/amd/stoneyridge/Makefile.inc b/src/soc/amd/stoneyridge/Makefile.inc index 0fd318b..e93a961 100644 --- a/src/soc/amd/stoneyridge/Makefile.inc +++ b/src/soc/amd/stoneyridge/Makefile.inc @@ -90,9 +90,9 @@ ramstage-y += usb.c ramstage-y += tsc_freq.c -smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c -smm-$(CONFIG_HAVE_SMI_HANDLER) += smi_util.c -smm-$(CONFIG_HAVE_SMI_HANDLER) += tsc_freq.c +smm-y += smihandler.c +smm-y += smi_util.c +smm-y += tsc_freq.c CPPFLAGS_common += -I$(src)/soc/amd/stoneyridge CPPFLAGS_common += -I$(src)/soc/amd/stoneyridge/include -- To view, visit https://review.coreboot.org/21739 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I4ea89d7bce83a99328c58897a4098debacd86d66 Gerrit-Change-Number: 21739 Gerrit-PatchSet: 1 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com>

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Change in coreboot[master]: soc/amd/common: Add included directory
by Marshall Dawson (Code Review) 28 Sep '17

28 Sep '17

Marshall Dawson has uploaded this change for review. ( https://review.coreboot.org/21738 Change subject: soc/amd/common: Add included directory ...................................................................... soc/amd/common: Add included directory If the symbol SOC_AMD_COMMON is selected, include the soc/amd/common directory. Until now this has been working due to the directory being included as part of AGESA_INC in vendorcode. That one is still necessary in order to build the AGESA code so it is left in place for now. Change-Id: Ia8191897d2030c475c9268ae86faaf01952c6ace Signed-off-by: Marshall Dawson <marshalldawson3rd(a)gmail.com> --- M src/soc/amd/common/Makefile.inc 1 file changed, 2 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/38/21738/1 diff --git a/src/soc/amd/common/Makefile.inc b/src/soc/amd/common/Makefile.inc index e11695b..aa27512 100644 --- a/src/soc/amd/common/Makefile.inc +++ b/src/soc/amd/common/Makefile.inc @@ -1,5 +1,7 @@ ifeq ($(CONFIG_SOC_AMD_COMMON),y) +CPPFLAGS_common += -I$(src)/soc/amd/common + bootblock-y += agesawrapper.c bootblock-y += def_callouts.c bootblock-y += heapmanager.c -- To view, visit https://review.coreboot.org/21738 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: Ia8191897d2030c475c9268ae86faaf01952c6ace Gerrit-Change-Number: 21738 Gerrit-PatchSet: 1 Gerrit-Owner: Marshall Dawson <marshalldawson3rd(a)gmail.com>

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Change in coreboot[master]: soc/amd/stoneyridge: Add ELOG to SMM (WIP)
by build bot (Jenkins) (Code Review) 28 Sep '17

28 Sep '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21728 ) Change subject: soc/amd/stoneyridge: Add ELOG to SMM (WIP) ...................................................................... Patch Set 2: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/61274/ : SUCCESS -- To view, visit https://review.coreboot.org/21728 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I458babe1694f042215dd0e1c3277856e340de86f Gerrit-Change-Number: 21728 Gerrit-PatchSet: 2 Gerrit-Owner: John E. Kabat Jr. <john.kabat(a)scarletltd.com> Gerrit-Reviewer: Marshall Dawson <marshalldawson3rd(a)gmail.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 28 Sep 2017 16:26:23 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: mb/google/reef: Cache EC's SKU ID on Coral
by build bot (Jenkins) (Code Review) 28 Sep '17

28 Sep '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21737 ) Change subject: mb/google/reef: Cache EC's SKU ID on Coral ...................................................................... Patch Set 1: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/61273/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/16420/ : SUCCESS -- To view, visit https://review.coreboot.org/21737 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I1925f51d63290b8d08366b622d5df3aab3a7484e Gerrit-Change-Number: 21737 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 28 Sep 2017 16:07:07 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: mainboard/google/reef: Override VBT selection in coral
by build bot (Jenkins) (Code Review) 28 Sep '17

28 Sep '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21725 ) Change subject: mainboard/google/reef: Override VBT selection in coral ...................................................................... Patch Set 3: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/61272/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/16419/ : SUCCESS -- To view, visit https://review.coreboot.org/21725 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I7fd667b1cf0b7c2a5e4ab7ac7748d9636a52ae54 Gerrit-Change-Number: 21725 Gerrit-PatchSet: 3 Gerrit-Owner: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 28 Sep 2017 16:03:33 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: soc/intel/common: Allow overriding CBFS filename of VBT
by build bot (Jenkins) (Code Review) 28 Sep '17

28 Sep '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21724 ) Change subject: soc/intel/common: Allow overriding CBFS filename of VBT ...................................................................... Patch Set 3: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/61271/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/16418/ : SUCCESS -- To view, visit https://review.coreboot.org/21724 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ic7865dc0e0c9ea3077b749d9d0482079877e9c4f Gerrit-Change-Number: 21724 Gerrit-PatchSet: 3 Gerrit-Owner: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 28 Sep 2017 16:02:36 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: mb/google/reef: Cache EC's SKU ID on Coral
by Patrick Georgi (Code Review) 28 Sep '17

28 Sep '17

Patrick Georgi has uploaded this change for review. ( https://review.coreboot.org/21737 Change subject: mb/google/reef: Cache EC's SKU ID on Coral ...................................................................... mb/google/reef: Cache EC's SKU ID on Coral Change-Id: I1925f51d63290b8d08366b622d5df3aab3a7484e Signed-off-by: Patrick Georgi <pgeorgi(a)google.com> --- M src/mainboard/google/reef/variants/coral/mainboard.c 1 file changed, 6 insertions(+), 2 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/37/21737/1 diff --git a/src/mainboard/google/reef/variants/coral/mainboard.c b/src/mainboard/google/reef/variants/coral/mainboard.c index 1abfa0a..35a635d 100644 --- a/src/mainboard/google/reef/variants/coral/mainboard.c +++ b/src/mainboard/google/reef/variants/coral/mainboard.c @@ -31,8 +31,12 @@ uint8_t variant_board_sku(void) { - // we know that the values are in 0..255 - return google_chromeec_get_sku_id(); + static int sku = -1; + + if (sku == -1) + sku = google_chromeec_get_sku_id(); + + return sku; } void variant_nhlt_oem_overrides(const char **oem_id, -- To view, visit https://review.coreboot.org/21737 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I1925f51d63290b8d08366b622d5df3aab3a7484e Gerrit-Change-Number: 21737 Gerrit-PatchSet: 1 Gerrit-Owner: Patrick Georgi <pgeorgi(a)google.com>

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Change in coreboot[master]: drivers/intel/fsp2_0: use common code to fetch vbt.bin
by build bot (Jenkins) (Code Review) 28 Sep '17

28 Sep '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/21723 ) Change subject: drivers/intel/fsp2_0: use common code to fetch vbt.bin ...................................................................... Patch Set 3: Build Successful https://qa.coreboot.org/job/coreboot-gerrit/61270/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/16417/ : SUCCESS -- To view, visit https://review.coreboot.org/21723 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ie1cdd1783dd5dababd1e97436a4ce1a4f068d5b3 Gerrit-Change-Number: 21723 Gerrit-PatchSet: 3 Gerrit-Owner: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Patrick Georgi <pgeorgi(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 28 Sep 2017 16:01:55 +0000 Gerrit-HasComments: No

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coreboot-gerrit September 2017