coreboot-gerrit August 2017

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Change in coreboot[master]: [WIP]nb/amd/amdfam10/amdfam10.h: Clean up header
by Arthur Heymans (Code Review) 12 Aug '17

12 Aug '17

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/20974 Change subject: [WIP]nb/amd/amdfam10/amdfam10.h: Clean up header ...................................................................... [WIP]nb/amd/amdfam10/amdfam10.h: Clean up header Change-Id: I3df97a038cf265423cb7019d1639a3d47d4871f7 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/mainboard/amd/mahogany_fam10/romstage.c M src/northbridge/amd/amdfam10/Makefile.inc M src/northbridge/amd/amdfam10/amdfam10.h M src/northbridge/amd/amdfam10/inline_helper.c 4 files changed, 6 insertions(+), 9 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/74/20974/1 diff --git a/src/mainboard/amd/mahogany_fam10/romstage.c b/src/mainboard/amd/mahogany_fam10/romstage.c index 0393822..979ef22 100644 --- a/src/mainboard/amd/mahogany_fam10/romstage.c +++ b/src/mainboard/amd/mahogany_fam10/romstage.c @@ -42,6 +42,7 @@ #include <southbridge/amd/sb700/sb700.h> #include <southbridge/amd/sb700/smbus.h> #include <northbridge/amd/amdfam10/raminit.h> +#include <northbridge/amd/amdfam10/early_ht.h> #include <northbridge/amd/amdht/ht_wrapper.h> #include <cpu/amd/family_10h-family_15h/init_cpus.h> #include <arch/early_variables.h> diff --git a/src/northbridge/amd/amdfam10/Makefile.inc b/src/northbridge/amd/amdfam10/Makefile.inc index 787f444..04405df 100644 --- a/src/northbridge/amd/amdfam10/Makefile.inc +++ b/src/northbridge/amd/amdfam10/Makefile.inc @@ -7,12 +7,13 @@ # Generic ROMSTAGE stuff romstage-y += reset_test.c debug.c setup_resource_map.c raminit_sysinfo_in_ram.c -romstage-y += raminit_amdmct.c pci.c early_ht.c amdfam10_util.c +romstage-y += raminit_amdmct.c pci.c early_ht.c amdfam10_util.c inline_helper.c # RAMSTAGE ramstage-y += northbridge.c misc_control.c link_control.c nb_control.c ramstage-y += amdfam10_util.c ht_config.c get_pci1234.c ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c +ramstage-y += inline_helper.c # Enable this if you want to check the values of the PCI routing registers. # Call show_all_routes() anywhere amdfam10.h is included. diff --git a/src/northbridge/amd/amdfam10/amdfam10.h b/src/northbridge/amd/amdfam10/amdfam10.h index e9f714a..09c382f 100644 --- a/src/northbridge/amd/amdfam10/amdfam10.h +++ b/src/northbridge/amd/amdfam10/amdfam10.h @@ -17,13 +17,6 @@ #ifndef AMDFAM10_H #define AMDFAM10_H -#include <inttypes.h> -#include <compiler.h> -#include <arch/io.h> -#include <device/device.h> -#include "early_ht.h" - -#include "inline_helper.c" struct DCTStatStruc; struct MCTStatStruc; @@ -1028,5 +1021,6 @@ #endif void set_sysinfo_in_ram(u32 val); +uint8_t is_fam15h(void); #endif /* AMDFAM10_H */ diff --git a/src/northbridge/amd/amdfam10/inline_helper.c b/src/northbridge/amd/amdfam10/inline_helper.c index 7f26031..1b947ea 100644 --- a/src/northbridge/amd/amdfam10/inline_helper.c +++ b/src/northbridge/amd/amdfam10/inline_helper.c @@ -14,8 +14,9 @@ */ #include <arch/cpu.h> +#include "amdfam10.h" -static inline uint8_t is_fam15h(void) +uint8_t is_fam15h(void) { uint8_t fam15h = 0; uint32_t family; -- To view, visit https://review.coreboot.org/20974 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I3df97a038cf265423cb7019d1639a3d47d4871f7 Gerrit-Change-Number: 20974 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>

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Change in coreboot[master]: cpu/amd/fam10: Link fidvid.c
by Arthur Heymans (Code Review) 12 Aug '17

12 Aug '17

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/20973 Change subject: cpu/amd/fam10: Link fidvid.c ...................................................................... cpu/amd/fam10: Link fidvid.c Change-Id: I724fa6c3ba0cc4fdfb11cc28fd54611c5959f2fb Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/cpu/amd/family_10h-family_15h/Makefile.inc M src/cpu/amd/family_10h-family_15h/fidvid.c M src/cpu/amd/family_10h-family_15h/init_cpus.c M src/cpu/amd/family_10h-family_15h/init_cpus.h 4 files changed, 24 insertions(+), 14 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/73/20973/1 diff --git a/src/cpu/amd/family_10h-family_15h/Makefile.inc b/src/cpu/amd/family_10h-family_15h/Makefile.inc index c540320..aa9b4d0 100644 --- a/src/cpu/amd/family_10h-family_15h/Makefile.inc +++ b/src/cpu/amd/family_10h-family_15h/Makefile.inc @@ -1,5 +1,6 @@ romstage-y += ../../x86/mtrr/earlymtrr.c +romstage-y += fidvid.c romstage-y += init_cpus.c ramstage-y += model_10xxx_init.c diff --git a/src/cpu/amd/family_10h-family_15h/fidvid.c b/src/cpu/amd/family_10h-family_15h/fidvid.c index e4bb9a3..af3a674 100644 --- a/src/cpu/amd/family_10h-family_15h/fidvid.c +++ b/src/cpu/amd/family_10h-family_15h/fidvid.c @@ -89,8 +89,16 @@ */ +#include <arch/io.h> +#include <console/console.h> +#include <cpu/x86/msr.h> #include <inttypes.h> +#include <northbridge/amd/amdfam10/amdfam10.h> #include <northbridge/amd/amdht/AsPsDefs.h> +#include <northbridge/amd/amdht/ht_wrapper.h> +#include <cpu/amd/multicore.h> + +#include "init_cpus.h" static inline void print_debug_fv(const char *str, u32 val) { @@ -859,7 +867,7 @@ } -static void init_fidvid_ap(u32 apicid, u32 nodeid, u32 coreid) +void init_fidvid_ap(u32 apicid, u32 nodeid, u32 coreid) { u32 send; diff --git a/src/cpu/amd/family_10h-family_15h/init_cpus.c b/src/cpu/amd/family_10h-family_15h/init_cpus.c index f5a949c..be4f8d4 100644 --- a/src/cpu/amd/family_10h-family_15h/init_cpus.c +++ b/src/cpu/amd/family_10h-family_15h/init_cpus.c @@ -138,7 +138,7 @@ //core range = 1 : core 0 only //core range = 2 : cores other than core0 -static void for_each_ap(uint32_t bsp_apicid, uint32_t core_range, int8_t node, +void for_each_ap(uint32_t bsp_apicid, uint32_t core_range, int8_t node, process_ap_t process_ap, void *gp) { // here assume the OS don't change our apicid @@ -198,7 +198,7 @@ } } -static inline int lapic_remote_read(int apicid, int reg, u32 *pvalue) +int lapic_remote_read(int apicid, int reg, u32 *pvalue) { int timeout; u32 status; @@ -226,10 +226,6 @@ } return result; } - -#if IS_ENABLED(CONFIG_SET_FIDVID) -static void init_fidvid_ap(u32 apicid, u32 nodeid, u32 coreid); -#endif static inline __attribute__((always_inline)) void print_apicid_nodeid_coreid(u32 apicid, struct node_core_id id, @@ -764,7 +760,7 @@ } } -static u32 get_platform_type(void) +u32 get_platform_type(void) { u32 ret = 0; @@ -825,7 +821,7 @@ * * Returns the offset of the link register. */ -static BOOL AMD_CpuFindCapability(u8 node, u8 cap_count, u8 * offset) +BOOL AMD_CpuFindCapability(u8 node, u8 cap_count, u8 * offset) { u32 reg; u32 val; @@ -865,7 +861,7 @@ * * Returns the link characteristic mask. */ -static u32 AMD_checkLinkType(u8 node, u8 regoff) +u32 AMD_checkLinkType(u8 node, u8 regoff) { uint32_t val; uint32_t val2; @@ -1878,7 +1874,3 @@ } #endif } - -#if IS_ENABLED(CONFIG_SET_FIDVID) -# include "fidvid.c" -#endif diff --git a/src/cpu/amd/family_10h-family_15h/init_cpus.h b/src/cpu/amd/family_10h-family_15h/init_cpus.h index d4bff0b..8ca9c8b 100644 --- a/src/cpu/amd/family_10h-family_15h/init_cpus.h +++ b/src/cpu/amd/family_10h-family_15h/init_cpus.h @@ -25,6 +25,7 @@ #include <cpu/amd/multicore.h> #include <reset.h> #include <northbridge/amd/amdfam10/raminit.h> +#include <northbridge/amd/amdht/porting.h> #include "defaults.h" #define NODE_HT(x) NODE_PCI(x,0) @@ -45,6 +46,13 @@ uint32_t wait_cpu_state(uint32_t apicid, uint32_t state, uint32_t state2); void start_other_cores(uint32_t bsp_apicid); u32 get_core_num_in_bsp(u32 nodeid); +void for_each_ap(uint32_t bsp_apicid, uint32_t core_range, int8_t node, + process_ap_t process_ap, void *gp); +u32 get_platform_type(void); +BOOL AMD_CpuFindCapability(u8 node, u8 cap_count, u8 * offset); +u32 AMD_checkLinkType(u8 node, u8 regoff); +int lapic_remote_read(int apicid, int reg, u32 *pvalue); + void update_microcode(u32 cpu_deviceid); @@ -52,5 +60,6 @@ void init_fidvid_stage2(u32 apicid, u32 nodeid); void prep_fid_change(void); int init_fidvid_bsp(u32 bsp_apicid, u32 nodes); +void init_fidvid_ap(u32 apicid, u32 nodeid, u32 coreid); #endif -- To view, visit https://review.coreboot.org/20973 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I724fa6c3ba0cc4fdfb11cc28fd54611c5959f2fb Gerrit-Change-Number: 20973 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>

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Change in coreboot[master]: nb/amd/amdfam10/debug.c: Fix building with DEBUG_SMBUS
by build bot (Jenkins) (Code Review) 12 Aug '17

12 Aug '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/20970 ) Change subject: nb/amd/amdfam10/debug.c: Fix building with DEBUG_SMBUS ...................................................................... Patch Set 4: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/58476/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/13878/ : SUCCESS -- To view, visit https://review.coreboot.org/20970 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Iebe8aa1c4c3019414c6a23404cc5dc7f668cd8eb Gerrit-Change-Number: 20970 Gerrit-PatchSet: 4 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sat, 12 Aug 2017 19:34:42 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: nb/amd/mct_ddr3/mct_d.c: Break out of allow_config_restore loop
by build bot (Jenkins) (Code Review) 12 Aug '17

12 Aug '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/20971 ) Change subject: nb/amd/mct_ddr3/mct_d.c: Break out of allow_config_restore loop ...................................................................... Patch Set 2: Verified-1 Build Unstable https://qa.coreboot.org/job/coreboot-gerrit/58475/ : UNSTABLE https://qa.coreboot.org/job/coreboot-checkpatch/13877/ : SUCCESS -- To view, visit https://review.coreboot.org/20971 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ie669d1bc38411e40ab95c28b17ee8818874dc741 Gerrit-Change-Number: 20971 Gerrit-PatchSet: 2 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Raptor Engineering Automated Test Stand <noreply(a)raptorengineeringinc.com> Gerrit-Reviewer: Timothy Pearson <tpearson(a)raptorengineering.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sat, 12 Aug 2017 19:14:22 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: nb/amd/mct: Don't include all needed headers in mct_d.h
by build bot (Jenkins) (Code Review) 12 Aug '17

12 Aug '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/20972 ) Change subject: nb/amd/mct: Don't include all needed headers in mct_d.h ...................................................................... Patch Set 1: Verified-1 Build Unstable https://qa.coreboot.org/job/coreboot-gerrit/58474/ : UNSTABLE https://qa.coreboot.org/job/coreboot-checkpatch/13876/ : SUCCESS -- To view, visit https://review.coreboot.org/20972 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: I454eb9f00c8ffebd7a48bf9cb65d012b3fc335f2 Gerrit-Change-Number: 20972 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sat, 12 Aug 2017 19:10:03 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: nb/amd/amdfam10/debug.c: Fix building with DEBUG_SMBUS
by Arthur Heymans (Code Review) 12 Aug '17

12 Aug '17

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/20970 to look at the new patch set (#4). Change subject: nb/amd/amdfam10/debug.c: Fix building with DEBUG_SMBUS ...................................................................... nb/amd/amdfam10/debug.c: Fix building with DEBUG_SMBUS Was presumably missed when linking most amd fam10 files in 75a3d1fb7c: "amdfam10: Perform major include ".c" cleanup". Change-Id: Iebe8aa1c4c3019414c6a23404cc5dc7f668cd8eb Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/northbridge/amd/amdfam10/debug.c M src/northbridge/amd/amdfam10/debug.h M src/northbridge/amd/amdmct/mct/mct_d.c M src/northbridge/amd/amdmct/mct/mct_d.h M src/northbridge/amd/amdmct/mct/mctardk3.c M src/northbridge/amd/amdmct/mct/mctardk4.c M src/northbridge/amd/amdmct/mct/mctchi_d.c M src/northbridge/amd/amdmct/mct/mctcsi_d.c M src/northbridge/amd/amdmct/mct/mctdqs_d.c M src/northbridge/amd/amdmct/mct/mctecc_d.c M src/northbridge/amd/amdmct/mct/mctmtr_d.c M src/northbridge/amd/amdmct/mct/mctndi_d.c M src/northbridge/amd/amdmct/mct/mctpro_d.c M src/northbridge/amd/amdmct/mct/mctsrc.c 14 files changed, 20 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/20970/4 -- To view, visit https://review.coreboot.org/20970 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: Iebe8aa1c4c3019414c6a23404cc5dc7f668cd8eb Gerrit-Change-Number: 20970 Gerrit-PatchSet: 4 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: nb/amd/mct_ddr3/mct_d.c: Break out of allow_config_restore loop
by build bot (Jenkins) (Code Review) 12 Aug '17

12 Aug '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/20971 ) Change subject: nb/amd/mct_ddr3/mct_d.c: Break out of allow_config_restore loop ...................................................................... Patch Set 1: Verified-1 Build Failed https://qa.coreboot.org/job/coreboot-gerrit/58472/ : ABORTED https://qa.coreboot.org/job/coreboot-checkpatch/13874/ : SUCCESS -- To view, visit https://review.coreboot.org/20971 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Ie669d1bc38411e40ab95c28b17ee8818874dc741 Gerrit-Change-Number: 20971 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: Raptor Engineering Automated Test Stand <noreply(a)raptorengineeringinc.com> Gerrit-Reviewer: Timothy Pearson <tpearson(a)raptorengineering.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sat, 12 Aug 2017 19:04:44 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: nb/amd/mct: Don't include all needed headers in mct_d.h
by Arthur Heymans (Code Review) 12 Aug '17

12 Aug '17

Arthur Heymans has uploaded this change for review. ( https://review.coreboot.org/20972 Change subject: nb/amd/mct: Don't include all needed headers in mct_d.h ...................................................................... nb/amd/mct: Don't include all needed headers in mct_d.h Include header that the *.c files need in the *.c file itself. Change-Id: I454eb9f00c8ffebd7a48bf9cb65d012b3fc335f2 Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/northbridge/amd/amdmct/mct/mct_d.c M src/northbridge/amd/amdmct/mct/mct_d.h M src/northbridge/amd/amdmct/mct/mctardk4.c M src/northbridge/amd/amdmct/mct/mctcsi_d.c M src/northbridge/amd/amdmct/mct/mctdqs_d.c M src/northbridge/amd/amdmct/mct/mctmtr_d.c M src/northbridge/amd/amdmct/mct/mctndi_d.c M src/northbridge/amd/amdmct/mct/mctpro_d.c M src/northbridge/amd/amdmct/mct/mctsrc.c M src/northbridge/amd/amdmct/mct/mcttmrl.c 10 files changed, 28 insertions(+), 11 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/72/20972/1 diff --git a/src/northbridge/amd/amdmct/mct/mct_d.c b/src/northbridge/amd/amdmct/mct/mct_d.c index ea619a3..802b5a4 100644 --- a/src/northbridge/amd/amdmct/mct/mct_d.c +++ b/src/northbridge/amd/amdmct/mct/mct_d.c @@ -33,11 +33,14 @@ * supported. */ +#include <console/console.h> #include <northbridge/amd/amdfam10/debug.h> -#include "mct_d.h" - #include <string.h> +#include "mct_d.h" +#include "mct_d_gcc.h" + + static u8 ReconfigureDIMMspare_D(struct MCTStatStruc *pMCTstat, struct DCTStatStruc *pDCTstatA); static void DQSTiming_D(struct MCTStatStruc *pMCTstat, diff --git a/src/northbridge/amd/amdmct/mct/mct_d.h b/src/northbridge/amd/amdmct/mct/mct_d.h index 29a7876..5e46173 100644 --- a/src/northbridge/amd/amdmct/mct/mct_d.h +++ b/src/northbridge/amd/amdmct/mct/mct_d.h @@ -22,10 +22,6 @@ #define DQS_TRAIN_DEBUG 0 -#include <inttypes.h> -#include <compiler.h> -#include "mct_d_gcc.h" -#include <console/console.h> #include <northbridge/amd/amdfam10/raminit.h> extern const u8 Table_DQSRcvEn_Offset[]; @@ -707,7 +703,6 @@ #define NV_MAX_DIMMS_PER_CH 64 /* Maximum number of DIMMs per channel */ -#include <northbridge/amd/amdfam10/amdfam10.h> /*=============================================================================== CBMEM storage diff --git a/src/northbridge/amd/amdmct/mct/mctardk4.c b/src/northbridge/amd/amdmct/mct/mctardk4.c index 29861e7..89dd393 100644 --- a/src/northbridge/amd/amdmct/mct/mctardk4.c +++ b/src/northbridge/amd/amdmct/mct/mctardk4.c @@ -15,7 +15,9 @@ #include <inttypes.h> #include <northbridge/amd/amdfam10/debug.h> + #include "mct_d.h" +#include "mct_d_gcc.h" static void Get_ChannelPS_Cfg0_D(u8 MAAdimms, u8 Speed, u8 MAAload, u8 DATAAload, u32 *AddrTmgCTL, u32 *ODC_CTL, diff --git a/src/northbridge/amd/amdmct/mct/mctcsi_d.c b/src/northbridge/amd/amdmct/mct/mctcsi_d.c index 08acc03..829892d 100644 --- a/src/northbridge/amd/amdmct/mct/mctcsi_d.c +++ b/src/northbridge/amd/amdmct/mct/mctcsi_d.c @@ -14,7 +14,9 @@ */ #include <northbridge/amd/amdfam10/debug.h> + #include "mct_d.h" +#include "mct_d_gcc.h" /* Low swap bit vs bank size encoding (physical, not logical address bit) * ;To calculate the number by hand, add the number of Bank address bits diff --git a/src/northbridge/amd/amdmct/mct/mctdqs_d.c b/src/northbridge/amd/amdmct/mct/mctdqs_d.c index 3146bfd..174c481 100644 --- a/src/northbridge/amd/amdmct/mct/mctdqs_d.c +++ b/src/northbridge/amd/amdmct/mct/mctdqs_d.c @@ -14,10 +14,12 @@ */ #include <northbridge/amd/amdfam10/debug.h> -#include "mct_d.h" #include <cpu/x86/cr.h> #include <cpu/amd/mtrr.h> +#include "mct_d.h" +#include "mct_d_gcc.h" + static void CalcEccDQSPos_D(struct MCTStatStruc *pMCTstat, struct DCTStatStruc *pDCTstat, u16 like, u8 scale, u8 ChipSel); diff --git a/src/northbridge/amd/amdmct/mct/mctmtr_d.c b/src/northbridge/amd/amdmct/mct/mctmtr_d.c index 0a157ed..ce5a60c 100644 --- a/src/northbridge/amd/amdmct/mct/mctmtr_d.c +++ b/src/northbridge/amd/amdmct/mct/mctmtr_d.c @@ -14,9 +14,11 @@ */ #include <northbridge/amd/amdfam10/debug.h> -#include "mct_d.h" #include <cpu/amd/mtrr.h> +#include "mct_d.h" +#include "mct_d_gcc.h" + static void SetMTRRrangeWB_D(u32 Base, u32 *pLimit, u32 *pMtrrAddr); static void SetMTRRrange_D(u32 Base, u32 *pLimit, u32 *pMtrrAddr, u16 MtrrType); diff --git a/src/northbridge/amd/amdmct/mct/mctndi_d.c b/src/northbridge/amd/amdmct/mct/mctndi_d.c index fe2bf9e..a95f1c9 100644 --- a/src/northbridge/amd/amdmct/mct/mctndi_d.c +++ b/src/northbridge/amd/amdmct/mct/mctndi_d.c @@ -15,7 +15,10 @@ */ #include <northbridge/amd/amdfam10/debug.h> + #include "mct_d.h" +#include "mct_d_gcc.h" + void InterleaveNodes_D(struct MCTStatStruc *pMCTstat, struct DCTStatStruc *pDCTstatA) diff --git a/src/northbridge/amd/amdmct/mct/mctpro_d.c b/src/northbridge/amd/amdmct/mct/mctpro_d.c index 18d69b5..90f1a42 100644 --- a/src/northbridge/amd/amdmct/mct/mctpro_d.c +++ b/src/northbridge/amd/amdmct/mct/mctpro_d.c @@ -15,7 +15,10 @@ */ #include <northbridge/amd/amdfam10/debug.h> + #include "mct_d.h" +#include "mct_d_gcc.h" + void EarlySampleSupport_D(void) { diff --git a/src/northbridge/amd/amdmct/mct/mctsrc.c b/src/northbridge/amd/amdmct/mct/mctsrc.c index c53b947..3a78620 100644 --- a/src/northbridge/amd/amdmct/mct/mctsrc.c +++ b/src/northbridge/amd/amdmct/mct/mctsrc.c @@ -15,9 +15,12 @@ */ #include <northbridge/amd/amdfam10/debug.h> -#include "mct_d.h" #include <cpu/x86/cr.h> +#include "mct_d.h" +#include "mct_d_gcc.h" + + /****************************************************************************** Description: Receiver En and DQS Timing Training feature for DDR 2 MCT ******************************************************************************/ diff --git a/src/northbridge/amd/amdmct/mct/mcttmrl.c b/src/northbridge/amd/amdmct/mct/mcttmrl.c index 4c6d8e6..81ec5f9 100644 --- a/src/northbridge/amd/amdmct/mct/mcttmrl.c +++ b/src/northbridge/amd/amdmct/mct/mcttmrl.c @@ -13,9 +13,11 @@ * GNU General Public License for more details. */ -#include "mct_d.h" #include <cpu/x86/cr.h> +#include "mct_d.h" +#include "mct_d_gcc.h" + /* * Description: Max Read Latency Training feature for DDR 2 MCT */ -- To view, visit https://review.coreboot.org/20972 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newchange Gerrit-Change-Id: I454eb9f00c8ffebd7a48bf9cb65d012b3fc335f2 Gerrit-Change-Number: 20972 Gerrit-PatchSet: 1 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz>

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Change in coreboot[master]: nb/amd/amdfam10/debug.c: Fix building with DEBUG_SMBUS
by build bot (Jenkins) (Code Review) 12 Aug '17

12 Aug '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/20970 ) Change subject: nb/amd/amdfam10/debug.c: Fix building with DEBUG_SMBUS ...................................................................... Patch Set 3: Verified-1 Build Unstable https://qa.coreboot.org/job/coreboot-gerrit/58473/ : UNSTABLE https://qa.coreboot.org/job/coreboot-checkpatch/13875/ : SUCCESS -- To view, visit https://review.coreboot.org/20970 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: comment Gerrit-Change-Id: Iebe8aa1c4c3019414c6a23404cc5dc7f668cd8eb Gerrit-Change-Number: 20970 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Sat, 12 Aug 2017 19:02:41 +0000 Gerrit-HasComments: No

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Change in coreboot[master]: nb/amd/amdfam10/debug.c: Fix building with DEBUG_SMBUS
by Arthur Heymans (Code Review) 12 Aug '17

12 Aug '17

Hello build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/20970 to look at the new patch set (#3). Change subject: nb/amd/amdfam10/debug.c: Fix building with DEBUG_SMBUS ...................................................................... nb/amd/amdfam10/debug.c: Fix building with DEBUG_SMBUS Was presumably missed when linking most amd fam10 files in 75a3d1fb7c: "amdfam10: Perform major include ".c" cleanup". Change-Id: Iebe8aa1c4c3019414c6a23404cc5dc7f668cd8eb Signed-off-by: Arthur Heymans <arthur(a)aheymans.xyz> --- M src/northbridge/amd/amdfam10/debug.c M src/northbridge/amd/amdfam10/debug.h M src/northbridge/amd/amdmct/mct/mct_d.c M src/northbridge/amd/amdmct/mct/mct_d.h M src/northbridge/amd/amdmct/mct/mctardk4.c M src/northbridge/amd/amdmct/mct/mctchi_d.c M src/northbridge/amd/amdmct/mct/mctcsi_d.c M src/northbridge/amd/amdmct/mct/mctdqs_d.c M src/northbridge/amd/amdmct/mct/mctecc_d.c M src/northbridge/amd/amdmct/mct/mctmtr_d.c M src/northbridge/amd/amdmct/mct/mctndi_d.c M src/northbridge/amd/amdmct/mct/mctpro_d.c M src/northbridge/amd/amdmct/mct/mctsrc.c 13 files changed, 18 insertions(+), 7 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/70/20970/3 -- To view, visit https://review.coreboot.org/20970 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-MessageType: newpatchset Gerrit-Change-Id: Iebe8aa1c4c3019414c6a23404cc5dc7f668cd8eb Gerrit-Change-Number: 20970 Gerrit-PatchSet: 3 Gerrit-Owner: Arthur Heymans <arthur(a)aheymans.xyz> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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