coreboot-gerrit May 2017

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Change in coreboot[master]: mc_bdx1: Switch to RTC RX6110SA
by Werner Zeh (Code Review) 31 May '17

31 May '17

Werner Zeh has submitted this change and it was merged. ( https://review.coreboot.org/19979 ) Change subject: mc_bdx1: Switch to RTC RX6110SA ...................................................................... mc_bdx1: Switch to RTC RX6110SA The prior used RTC PCF8523 is replaced with RX6110SA on this mainboard. Switch to the new RTC in Kconfig and adapt devicetree to the new chip. Change-Id: I7c4911191cae254900f9a958da42ecd18497484c Signed-off-by: Werner Zeh <werner.zeh(a)siemens.com> Reviewed-on: https://review.coreboot.org/19979 Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> Reviewed-by: Mario Scheithauer <mario.scheithauer(a)siemens.com> --- M src/mainboard/siemens/mc_bdx1/Kconfig M src/mainboard/siemens/mc_bdx1/devicetree.cb 2 files changed, 6 insertions(+), 7 deletions(-) Approvals: Mario Scheithauer: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/mainboard/siemens/mc_bdx1/Kconfig b/src/mainboard/siemens/mc_bdx1/Kconfig index f64b22b..0200d92 100644 --- a/src/mainboard/siemens/mc_bdx1/Kconfig +++ b/src/mainboard/siemens/mc_bdx1/Kconfig @@ -12,7 +12,8 @@ select USE_SIEMENS_HWILIB select DRIVER_INTEL_I210 select DRIVER_SIEMENS_NC_FPGA - select DRIVERS_I2C_PCF8523 + select DRIVERS_I2C_RX6110SA + select RX6110SA_USE_SMBUS config MAINBOARD_DIR string diff --git a/src/mainboard/siemens/mc_bdx1/devicetree.cb b/src/mainboard/siemens/mc_bdx1/devicetree.cb index 804b781..543786b 100644 --- a/src/mainboard/siemens/mc_bdx1/devicetree.cb +++ b/src/mainboard/siemens/mc_bdx1/devicetree.cb @@ -11,16 +11,14 @@ device pci 1f.2 on end # SATA Controller device pci 1f.3 on # Enable external RTC chip - chip drivers/i2c/pcf8523 - register "cap_sel" = "CAP_SEL_7_PF" - register "power_mode" = "PM_BAT_SW_OFF_LOW_DETECT_OFF" - register "cof_selection" = "COF_OFF" + chip drivers/i2c/rx6110sa + register "cof_selection" = "0" register "set_user_date" = "1" register "user_year" = "04" register "user_month" = "07" register "user_day" = "01" - register "user_weekday" = "0" - device i2c 0x68 on end # RTC PCF8523 + register "user_weekday" = "4" + device i2c 0x32 on end # RTC RX6110 SA end end # SMBus Controller device pci 1f.5 on end # SATA Controller -- To view, visit https://review.coreboot.org/19979 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: merged Gerrit-Change-Id: I7c4911191cae254900f9a958da42ecd18497484c Gerrit-PatchSet: 6 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: rx6110sa: Add possibility to use both I2C and SMBus for the RTC
by Werner Zeh (Code Review) 31 May '17

31 May '17

Werner Zeh has submitted this change and it was merged. ( https://review.coreboot.org/19978 ) Change subject: rx6110sa: Add possibility to use both I2C and SMBus for the RTC ...................................................................... rx6110sa: Add possibility to use both I2C and SMBus for the RTC The driver for the RTC RX6110SA is designed to be used with I2C bus. This patch adds the possibility to use SMBus operations to access the RTC. For this purpose the Kconfig switch RX6110SA_USE_SMBUS is added. It is not enabled per default so that I2C will be used. One can set this switch on board level to use SMBus instead. Change-Id: I4827ae2c544e8002399d94a1159acacd8176c5e9 Signed-off-by: Werner Zeh <werner.zeh(a)siemens.com> Reviewed-on: https://review.coreboot.org/19978 Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Tested-by: build bot (Jenkins) <no-reply(a)coreboot.org> --- M src/drivers/i2c/rx6110sa/Kconfig M src/drivers/i2c/rx6110sa/rx6110sa.c 2 files changed, 60 insertions(+), 37 deletions(-) Approvals: Aaron Durbin: Looks good to me, approved build bot (Jenkins): Verified diff --git a/src/drivers/i2c/rx6110sa/Kconfig b/src/drivers/i2c/rx6110sa/Kconfig index a5608f8..48654c6 100644 --- a/src/drivers/i2c/rx6110sa/Kconfig +++ b/src/drivers/i2c/rx6110sa/Kconfig @@ -3,3 +3,10 @@ default n help Enable support for external RTC chip RX6110 SA. + +config RX6110SA_USE_SMBUS + bool + default n + help + Select this option if the RTC RX6110SA is connected to a SMBus controller. + If not selected I2C controller is used instead. diff --git a/src/drivers/i2c/rx6110sa/rx6110sa.c b/src/drivers/i2c/rx6110sa/rx6110sa.c index 743b708..9d60bdb 100644 --- a/src/drivers/i2c/rx6110sa/rx6110sa.c +++ b/src/drivers/i2c/rx6110sa/rx6110sa.c @@ -14,6 +14,7 @@ */ #include <device/i2c.h> +#include <device/smbus.h> #include <device/device.h> #include <version.h> #include <console/console.h> @@ -24,17 +25,34 @@ #define I2C_BUS_NUM (dev->bus->secondary - 1) #define I2C_DEV_NUM (dev->path.i2c.device) +/* Function to write a register in the RTC with the given value. */ +static void rx6110sa_write(struct device *dev, uint8_t reg, uint8_t val) +{ + if (IS_ENABLED(CONFIG_RX6110SA_USE_SMBUS)) + smbus_write_byte(dev, reg, val); + else + i2c_writeb(I2C_BUS_NUM, I2C_DEV_NUM, reg, val); +} + +/* Function to read a register in the RTC. */ +static uint8_t rx6110sa_read(struct device *dev, uint8_t reg) +{ + uint8_t val = 0; + + if (IS_ENABLED(CONFIG_RX6110SA_USE_SMBUS)) + val = smbus_read_byte(dev, reg); + else + i2c_readb(I2C_BUS_NUM, I2C_DEV_NUM, reg, &val); + return val; +} + /* Set RTC date from coreboot build date. */ static void rx6110sa_set_build_date(struct device *dev) { - i2c_writeb(I2C_BUS_NUM, I2C_DEV_NUM, YEAR_REG, - coreboot_build_date.year); - i2c_writeb(I2C_BUS_NUM, I2C_DEV_NUM, MONTH_REG, - coreboot_build_date.month); - i2c_writeb(I2C_BUS_NUM, I2C_DEV_NUM, DAY_REG, - coreboot_build_date.day); - i2c_writeb(I2C_BUS_NUM, I2C_DEV_NUM, WEEK_REG, - (1 << coreboot_build_date.weekday)); + rx6110sa_write(dev, YEAR_REG, coreboot_build_date.year); + rx6110sa_write(dev, MONTH_REG, coreboot_build_date.month); + rx6110sa_write(dev, DAY_REG, coreboot_build_date.day); + rx6110sa_write(dev, WEEK_REG, (1 << coreboot_build_date.weekday)); } /* Set RTC date from user defined date (available in e.g. device tree). */ @@ -42,14 +60,10 @@ { struct drivers_i2c_rx6110sa_config *config = dev->chip_info; - i2c_writeb(I2C_BUS_NUM, I2C_DEV_NUM, YEAR_REG, - bin2bcd(config->user_year)); - i2c_writeb(I2C_BUS_NUM, I2C_DEV_NUM, MONTH_REG, - bin2bcd(config->user_month)); - i2c_writeb(I2C_BUS_NUM, I2C_DEV_NUM, DAY_REG, - bin2bcd(config->user_day)); - i2c_writeb(I2C_BUS_NUM, I2C_DEV_NUM, WEEK_REG, - (1 << config->user_weekday)); + rx6110sa_write(dev, YEAR_REG, bin2bcd(config->user_year)); + rx6110sa_write(dev, MONTH_REG, bin2bcd(config->user_month)); + rx6110sa_write(dev, DAY_REG, bin2bcd(config->user_day)); + rx6110sa_write(dev, WEEK_REG, (1 << config->user_weekday)); } static void rx6110sa_final(struct device *dev) @@ -57,12 +71,12 @@ uint8_t hour, minute, second, year, month, day; /* Read back current RTC date and time and print it to the console. */ - i2c_readb(I2C_BUS_NUM, I2C_DEV_NUM, HOUR_REG, &hour); - i2c_readb(I2C_BUS_NUM, I2C_DEV_NUM, MINUTE_REG, &minute); - i2c_readb(I2C_BUS_NUM, I2C_DEV_NUM, SECOND_REG, &second); - i2c_readb(I2C_BUS_NUM, I2C_DEV_NUM, YEAR_REG, &year); - i2c_readb(I2C_BUS_NUM, I2C_DEV_NUM, MONTH_REG, &month); - i2c_readb(I2C_BUS_NUM, I2C_DEV_NUM, DAY_REG, &day); + hour = rx6110sa_read(dev, HOUR_REG); + minute = rx6110sa_read(dev, MINUTE_REG); + second = rx6110sa_read(dev, SECOND_REG); + year = rx6110sa_read(dev, YEAR_REG); + month = rx6110sa_read(dev, MONTH_REG); + day = rx6110sa_read(dev, DAY_REG); printk(BIOS_INFO, "%s: Current date %02d.%02d.%02d %02d:%02d:%02d\n", dev->chip_ops->name, bcd2bin(month), bcd2bin(day), @@ -75,13 +89,13 @@ uint8_t reg; /* Do a dummy read first. */ - i2c_readb(I2C_BUS_NUM, I2C_DEV_NUM, SECOND_REG, &reg); + reg = rx6110sa_read(dev, SECOND_REG); /* * Check VLF-bit which indicates the RTC data loss, such as due to a * supply voltage drop. */ - i2c_readb(I2C_BUS_NUM, I2C_DEV_NUM, FLAG_REGISTER, &reg); + reg = rx6110sa_read(dev, FLAG_REGISTER); if (!(reg & VLF_BIT)) /* No voltage low detected, everything is well. */ @@ -91,24 +105,26 @@ * Voltage low detected, initialize RX6110 SA again. * Set first some registers to known state. */ - i2c_writeb(I2C_BUS_NUM, I2C_DEV_NUM, BATTERY_BACKUP_REG, 0x00); - i2c_writeb(I2C_BUS_NUM, I2C_DEV_NUM, RESERVED_BIT_REG, RTC_INIT_VALUE); - i2c_writeb(I2C_BUS_NUM, I2C_DEV_NUM, DIGITAL_REG, 0x00); - i2c_writeb(I2C_BUS_NUM, I2C_DEV_NUM, IRQ_CONTROL_REG, 0x00); + rx6110sa_write(dev, BATTERY_BACKUP_REG, 0x00); + rx6110sa_write(dev, RESERVED_BIT_REG, RTC_INIT_VALUE); + rx6110sa_write(dev, DIGITAL_REG, 0x00); + rx6110sa_write(dev, IRQ_CONTROL_REG, 0x00); /* Clear timer enable bit and set frequency of clock output. */ - i2c_readb(I2C_BUS_NUM, I2C_DEV_NUM, EXTENSION_REG, &reg); + + reg = rx6110sa_read(dev, EXTENSION_REG); reg &= ~(FSEL_MASK | TE_BIT); reg |= (config->cof_selection << 6); - i2c_writeb(I2C_BUS_NUM, I2C_DEV_NUM, EXTENSION_REG, reg); + rx6110sa_write(dev, EXTENSION_REG, reg); /* Clear voltage low detect bit. */ - i2c_readb(I2C_BUS_NUM, I2C_DEV_NUM, FLAG_REGISTER, &reg); + reg = rx6110sa_read(dev, FLAG_REGISTER); reg &= ~VLF_BIT; - i2c_writeb(I2C_BUS_NUM, I2C_DEV_NUM, FLAG_REGISTER, reg); + rx6110sa_write(dev, FLAG_REGISTER, reg); /* Before setting the clock stop oscillator. */ - i2c_writeb(I2C_BUS_NUM, I2C_DEV_NUM, CTRL_REG, STOP_BIT); + rx6110sa_write(dev, CTRL_REG, STOP_BIT); + if (config->set_user_date) { /* Set user date defined in device tree. */ printk(BIOS_DEBUG, "%s: Set to user date\n", @@ -120,11 +136,11 @@ dev->chip_ops->name); rx6110sa_set_build_date(dev); } - i2c_writeb(I2C_BUS_NUM, I2C_DEV_NUM, HOUR_REG, 1); - i2c_writeb(I2C_BUS_NUM, I2C_DEV_NUM, MINUTE_REG, 0); - i2c_writeb(I2C_BUS_NUM, I2C_DEV_NUM, SECOND_REG, 0); + rx6110sa_write(dev, HOUR_REG, 1); + rx6110sa_write(dev, MINUTE_REG, 0); + rx6110sa_write(dev, SECOND_REG, 0); /* Start oscillator again as the RTC is set up now. */ - i2c_writeb(I2C_BUS_NUM, I2C_DEV_NUM, CTRL_REG, 0x00); + rx6110sa_write(dev, CTRL_REG, 0x00); } static struct device_operations rx6110sa_ops = { -- To view, visit https://review.coreboot.org/19978 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: merged Gerrit-Change-Id: I4827ae2c544e8002399d94a1159acacd8176c5e9 Gerrit-PatchSet: 6 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: mc_tcu3: Remove all hwinfo files from mainboard directory
by Mario Scheithauer (Code Review) 31 May '17

31 May '17

Mario Scheithauer has posted comments on this change. ( https://review.coreboot.org/19982 ) Change subject: mc_tcu3: Remove all hwinfo files from mainboard directory ...................................................................... Patch Set 2: Code-Review+2 -- To view, visit https://review.coreboot.org/19982 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Ia3dcb2e0118527b37aed872740273c4fa7004aef Gerrit-PatchSet: 2 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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Change in coreboot[master]: mc_bdx1: Switch to RTC RX6110SA
by Mario Scheithauer (Code Review) 31 May '17

31 May '17

Mario Scheithauer has posted comments on this change. ( https://review.coreboot.org/19979 ) Change subject: mc_bdx1: Switch to RTC RX6110SA ...................................................................... Patch Set 5: Code-Review+2 -- To view, visit https://review.coreboot.org/19979 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I7c4911191cae254900f9a958da42ecd18497484c Gerrit-PatchSet: 5 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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Change in coreboot[master]: mainboard/google/poppy: Power down camera rails when suspending
by build bot (Jenkins) (Code Review) 31 May '17

31 May '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19953 ) Change subject: mainboard/google/poppy: Power down camera rails when suspending ...................................................................... Patch Set 2: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/54631/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/10344/ : SUCCESS -- To view, visit https://review.coreboot.org/19953 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Iba88fed972b847448e01fcfca8c7129d950244c2 Gerrit-PatchSet: 2 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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Change in coreboot[master]: mainboard/google/poppy: Power down camera rails when suspending
by Furquan Shaikh (Code Review) 31 May '17

31 May '17

Furquan Shaikh has posted comments on this change. ( https://review.coreboot.org/19953 ) Change subject: mainboard/google/poppy: Power down camera rails when suspending ...................................................................... Patch Set 1: (1 comment) https://review.coreboot.org/#/c/19953/1/src/mainboard/google/poppy/smihandl… File src/mainboard/google/poppy/smihandler.c: Line 33: gpio_set(EN_CAM_PMIC_RST_L, 0); > Should we hold it in reset prior to powering down? Yes, that makes sense. Updated the sequence and verified as well. -- To view, visit https://review.coreboot.org/19953 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: Iba88fed972b847448e01fcfca8c7129d950244c2 Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: Yes

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Change in coreboot[master]: mainboard/google/poppy: Power down camera rails when suspending
by Furquan Shaikh (Code Review) 31 May '17

31 May '17

Hello Aaron Durbin, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/19953 to look at the new patch set (#2). Change subject: mainboard/google/poppy: Power down camera rails when suspending ...................................................................... mainboard/google/poppy: Power down camera rails when suspending BUG=b:62147763 Change-Id: Iba88fed972b847448e01fcfca8c7129d950244c2 Signed-off-by: Furquan Shaikh <furquan(a)chromium.org> --- M src/mainboard/google/poppy/smihandler.c M src/mainboard/google/poppy/variants/baseboard/include/baseboard/gpio.h 2 files changed, 15 insertions(+), 0 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/53/19953/2 -- To view, visit https://review.coreboot.org/19953 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: newpatchset Gerrit-Change-Id: Iba88fed972b847448e01fcfca8c7129d950244c2 Gerrit-PatchSet: 2 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Furquan Shaikh <furquan(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org>

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Change in coreboot[master]: soc/intel/apollolake: Bring in delta for GLK SOC
by Hannah Williams (Code Review) 31 May '17

31 May '17

Hannah Williams has posted comments on this change. ( https://review.coreboot.org/19603 ) Change subject: soc/intel/apollolake: Bring in delta for GLK SOC ...................................................................... Patch Set 50: (1 comment) https://review.coreboot.org/#/c/19603/50/src/soc/intel/apollolake/romstage.c File src/soc/intel/apollolake/romstage.c: PS50, Line 347: #if !IS_ENABLED(CONFIG_SOC_INTEL_GLK) /* TODO */ > Please use a C if statement unless the preprocessor if is specifically need This field is not yet available in the GLK FSP -- To view, visit https://review.coreboot.org/19603 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I3e76726bb77f0277ab5776ae9d3d42b7eb389fe3 Gerrit-PatchSet: 50 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Aamir Bohra <aamir.bohra(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Andrey Petrov <andrey.petrov(a)gmail.com> Gerrit-Reviewer: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Brandon Breitenstein <brandon.breitenstein(a)intel.com> Gerrit-Reviewer: Brenton Dong <brenton.m.dong(a)intel.com> Gerrit-Reviewer: Cole Nelson <colex.nelson(a)intel.com> Gerrit-Reviewer: Han Lim Ng <nhlhanlim93(a)gmail.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Martin Roth <martinroth(a)google.com> Gerrit-Reviewer: Paul Menzel <paulepanter(a)users.sourceforge.net> Gerrit-Reviewer: Ravishankar Sarawadi <ravishankar.sarawadi(a)intel.com> Gerrit-Reviewer: Shaunak Saha <shaunak.saha(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Sumeet R Pawnikar <sumeet.r.pawnikar(a)intel.com> Gerrit-Reviewer: V Sowmya <v.sowmya(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: Yes

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Change in coreboot[master]: soc/intel/apollolake: Remove unused PCI ID from SOC header
by Subrata Banik (Code Review) 31 May '17

31 May '17

Subrata Banik has posted comments on this change. ( https://review.coreboot.org/19927 ) Change subject: soc/intel/apollolake: Remove unused PCI ID from SOC header ...................................................................... Patch Set 1: (1 comment) https://review.coreboot.org/#/c/19927/1/src/soc/intel/apollolake/include/so… File src/soc/intel/apollolake/include/soc/pci_ids.h: Line 26: #define PCI_DEVICE_ID_APOLLOLAKE_AUDIO 0x5a98 /* 00:0e.0 */ > Why isn't this whole file just removed? If you move these to the shared hea Done -- To view, visit https://review.coreboot.org/19927 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I3a86256641f4b877de32ca81dfdaef4e9d49334a Gerrit-PatchSet: 1 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: Aaron Durbin <adurbin(a)chromium.org> Gerrit-Reviewer: Balaji Manigandan <balaji.manigandan(a)intel.com> Gerrit-Reviewer: Barnali Sarkar <barnali.sarkar(a)intel.com> Gerrit-Reviewer: Hannah Williams <hannah.williams(a)intel.com> Gerrit-Reviewer: Subrata Banik <subrata.banik(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Reviewer: dhaval v sharma <dhaval.v.sharma(a)intel.com> Gerrit-HasComments: Yes

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Change in coreboot[master]: mc_bdx1: Switch to RTC RX6110SA
by build bot (Jenkins) (Code Review) 31 May '17

31 May '17

build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/19979 ) Change subject: mc_bdx1: Switch to RTC RX6110SA ...................................................................... Patch Set 5: Verified+1 Build Successful https://qa.coreboot.org/job/coreboot-gerrit/54629/ : SUCCESS https://qa.coreboot.org/job/coreboot-checkpatch/10343/ : SUCCESS -- To view, visit https://review.coreboot.org/19979 To unsubscribe, visit https://review.coreboot.org/settings Gerrit-MessageType: comment Gerrit-Change-Id: I7c4911191cae254900f9a958da42ecd18497484c Gerrit-PatchSet: 5 Gerrit-Project: coreboot Gerrit-Branch: master Gerrit-Owner: Werner Zeh <werner.zeh(a)siemens.com> Gerrit-Reviewer: Mario Scheithauer <mario.scheithauer(a)siemens.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-HasComments: No

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coreboot-gerrit May 2017