coreboot-gerrit May 2016

coreboot-gerrit@coreboot.org

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Patch merged into coreboot/master: google/ninja: Upstream AOpen Chromebox Commerical
by gerrit＠coreboot.org 31 May '16

31 May '16

the following patch was just integrated into master: commit a87fcabd2efe49c8035b76146401e190a0ea6593 Author: Matt DeVillier <matt.devillier(a)gmail.com> Date: Tue Oct 20 19:36:09 2015 -0500 google/ninja: Upstream AOpen Chromebox Commerical Migrate google/ninja (AOpen Chromebox Commerical) from Chromium tree to upstream, using google/rambi as a reference. original source: branch firmware-ninja-5216.383.B commit 582a393 [Ninja, Sumo: Add SPD source for Hynix H5TC4G63CFR-PBA] TEST=built and booted Linux on ninja with full functionality blobs required for working image: VGA BIOS (vgabios.bin) firmware descriptor (ifd.bin) Intel ME firmware (me.bin) MRC (mrc.elf) external reference code (refcode.elf) Change-Id: I0f1892c24c08fa2d53185b2cf8b6f5a9001b2397 Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com> Reviewed-on: https://review.coreboot.org/14950 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> See https://review.coreboot.org/14950 for details. -gerrit

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Patch merged into coreboot/master: commonlib/lz4: Avoid unaligned memory access on RISC-V
by gerrit＠coreboot.org 31 May '16

31 May '16

the following patch was just integrated into master: commit 4acb0e774220c0705a71689b6620c976297d417c Author: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Date: Fri May 27 09:05:02 2016 +0200 commonlib/lz4: Avoid unaligned memory access on RISC-V From the User-Level ISA Specification v2.0: "We do not mandate atomicity for misaligned accesses so simple implementations can just use a machine trap and software handler to handle misaligned accesses." (— http://riscv.org/specifications/) Spike traps on unaligned accesses. Change-Id: Ia57786916f4076cc08513f4e331c2deec9cfa785 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Reviewed-on: https://review.coreboot.org/14983 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> See https://review.coreboot.org/14983 for details. -gerrit

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Patch merged into coreboot/master: lib/hardwaremain: Add \n to "Boot failed" message
by gerrit＠coreboot.org 31 May '16

31 May '16

the following patch was just integrated into master: commit 0a54fb533d9b03ba4ad24bfc9180ee5803feef51 Author: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Date: Fri May 27 09:05:02 2016 +0200 lib/hardwaremain: Add \n to "Boot failed" message Change-Id: I106fccd725a5c944f4e8e0f196b31c9344f588c7 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Reviewed-on: https://review.coreboot.org/14984 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> See https://review.coreboot.org/14984 for details. -gerrit

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New patch to review for coreboot: ifwitool: Fix syntax issues with ifwitool
by Furquan Shaikh 31 May '16

31 May '16

Furquan Shaikh (furquan(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15022 -gerrit commit 7d0a47016a916bead3d94c10c6622922a3f465e5 Author: Furquan Shaikh <furquan(a)google.com> Date: Tue May 31 11:02:47 2016 -0700 ifwitool: Fix syntax issues with ifwitool Change-Id: Ie7a12a39116ee08f5e24c81c97695201169a63f7 Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- util/cbfstool/ifwitool.c | 47 ++++++++++++++++++++++++----------------------- 1 file changed, 24 insertions(+), 23 deletions(-) diff --git a/util/cbfstool/ifwitool.c b/util/cbfstool/ifwitool.c index 0359bc6..e783cd5 100644 --- a/util/cbfstool/ifwitool.c +++ b/util/cbfstool/ifwitool.c @@ -305,54 +305,54 @@ const struct subpart_info { struct dir_ops dir_ops; } subparts[MAX_SUBPARTS] = { /* OEM SMIP */ - [SMIP_TYPE] = {"SMIP", "SMIP", CONTAINS_DIR, {NULL}}, + [SMIP_TYPE] = {"SMIP", "SMIP", CONTAINS_DIR, {NULL} }, /* CSE RBE */ [CSE_RBE_TYPE] = {"RBEP", "CSE_RBE", CONTAINS_DIR | - MANDATORY_BPDT_ENTRY, {NULL}}, + MANDATORY_BPDT_ENTRY, {NULL} }, /* CSE BUP */ [CSE_BUP_TYPE] = {"FTPR", "CSE_BUP", CONTAINS_DIR | - MANDATORY_BPDT_ENTRY, {NULL}}, + MANDATORY_BPDT_ENTRY, {NULL} }, /* uCode */ - [UCODE_TYPE] = {"UCOD", "Microcode", CONTAINS_DIR, {NULL}}, + [UCODE_TYPE] = {"UCOD", "Microcode", CONTAINS_DIR, {NULL} }, /* IBB */ - [IBB_TYPE] = {"IBBP", "Bootblock", CONTAINS_DIR, {ibbp_dir_add}}, + [IBB_TYPE] = {"IBBP", "Bootblock", CONTAINS_DIR, {ibbp_dir_add} }, /* S-BPDT */ [S_BPDT_TYPE] = {"S_BPDT", "S-BPDT", AUTO_GENERATED | - MANDATORY_BPDT_ENTRY, {NULL}}, + MANDATORY_BPDT_ENTRY, {NULL} }, /* OBB */ [OBB_TYPE] = {"OBBP", "OEM boot block", CONTAINS_DIR | - NON_CRITICAL_SUBPART, {NULL}}, + NON_CRITICAL_SUBPART, {NULL} }, /* CSE Main */ [CSE_MAIN_TYPE] = {"NFTP", "CSE_MAIN", CONTAINS_DIR | - NON_CRITICAL_SUBPART, {NULL}}, + NON_CRITICAL_SUBPART, {NULL} }, /* ISH */ - [ISH_TYPE] = {"ISHP", "ISH", NON_CRITICAL_SUBPART, {NULL}}, + [ISH_TYPE] = {"ISHP", "ISH", NON_CRITICAL_SUBPART, {NULL} }, /* CSE IDLM */ [CSE_IDLM_TYPE] = {"DLMP", "CSE_IDLM", CONTAINS_DIR | - MANDATORY_BPDT_ENTRY, {NULL}}, + MANDATORY_BPDT_ENTRY, {NULL} }, /* IFP Override */ [IFP_OVERRIDE_TYPE] = {"IFP_OVERRIDE", "IFP_OVERRIDE", LIES_WITHIN_BPDT_4K | MANDATORY_BPDT_ENTRY, - {NULL}}, + {NULL} }, /* Debug Tokens */ - [DEBUG_TOKENS_TYPE] = {"DEBUG_TOKENS", "Debug Tokens", 0, {NULL}}, + [DEBUG_TOKENS_TYPE] = {"DEBUG_TOKENS", "Debug Tokens", 0, {NULL} }, /* UFS Phy Configuration */ [UFS_PHY_TYPE] = {"UFS_PHY", "UFS Phy", LIES_WITHIN_BPDT_4K | - MANDATORY_BPDT_ENTRY, {NULL}}, + MANDATORY_BPDT_ENTRY, {NULL} }, /* UFS GPP LUN ID */ [UFS_GPP_TYPE] = {"UFS_GPP", "UFS GPP", LIES_WITHIN_BPDT_4K | - MANDATORY_BPDT_ENTRY, {NULL}}, + MANDATORY_BPDT_ENTRY, {NULL} }, /* PMC */ - [PMC_TYPE] = {"PMCP", "PMC firmware", CONTAINS_DIR, {NULL}}, + [PMC_TYPE] = {"PMCP", "PMC firmware", CONTAINS_DIR, {NULL} }, /* IUNIT */ - [IUNIT_TYPE] = {"IUNP", "IUNIT", NON_CRITICAL_SUBPART, {NULL}}, + [IUNIT_TYPE] = {"IUNP", "IUNIT", NON_CRITICAL_SUBPART, {NULL} }, /* NVM Config */ - [NVM_CONFIG_TYPE] = {"NVM_CONFIG", "NVM Config", 0, {NULL}}, + [NVM_CONFIG_TYPE] = {"NVM_CONFIG", "NVM Config", 0, {NULL} }, /* UEP */ [UEP_TYPE] = {"UEP", "UEP", LIES_WITHIN_BPDT_4K | MANDATORY_BPDT_ENTRY, - {NULL}}, + {NULL} }, /* UFS Rate B Config */ - [UFS_RATE_B_TYPE] = {"UFS_RATE_B", "UFS Rate B Config", 0, {NULL}}, + [UFS_RATE_B_TYPE] = {"UFS_RATE_B", "UFS Rate B Config", 0, {NULL} }, }; struct ifwi_image { @@ -480,7 +480,8 @@ static void bpdt_print_header(struct bpdt_header *h, const char *name) printf("%-25s %-25d\n", "BPDT Version", h->bpdt_version); printf("%-25s 0x%-23x\n", "XOR checksum", h->xor_redundant_block); printf("%-25s 0x%-23x\n", "IFWI Version", h->ifwi_version); - printf("%-25s 0x%-23lx\n", "FIT Tool Version", h->fit_tool_version); + printf("%-25s 0x%-23llx\n", "FIT Tool Version", + (long long)h->fit_tool_version); } static void bpdt_print_entries(struct bpdt_entry *e, size_t count, @@ -519,7 +520,7 @@ static void bpdt_print_entries(struct bpdt_entry *e, size_t count, static void bpdt_validate_header(struct bpdt_header *h, const char *name) { - assert (h->signature == BPDT_SIGNATURE); + assert(h->signature == BPDT_SIGNATURE); if (h->bpdt_version != 1) { ERROR("Invalid header : %s\n", name); @@ -1406,7 +1407,7 @@ static enum ifwi_ret ibbp_dir_add(int type) { #define DUMMY_IBB_SIZE (4 * KiB) - assert (type == IBB_TYPE); + assert(type == IBB_TYPE); /* * Entry # 1 - IBBP.man @@ -1927,7 +1928,7 @@ int main(int argc, char **argv) c = '?'; } - switch(c) { + switch (c) { case 'n': param.subpart_name = optarg; break;

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Patch set updated for coreboot: Makefile: Add ifwitool to list of tools to be built
by Furquan Shaikh 31 May '16

31 May '16

Furquan Shaikh (furquan(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/15013 -gerrit commit 235c795b391edeb285b0448aec91e13909acacc7 Author: Furquan Shaikh <furquan(a)google.com> Date: Mon May 30 23:03:58 2016 -0700 Makefile: Add ifwitool to list of tools to be built Add ifwitool to list of tools to be built so that it can be used by the build system. Change-Id: Ifcfbfd87ad9b7ba3ea11cfbcf40894f3e0dae694 Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- Makefile.inc | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/Makefile.inc b/Makefile.inc index 574f2fe..19377c9 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -53,7 +53,7 @@ export objgenerated := $(obj)/generated ####################################################################### # root rule to resolve if in build mode (ie. configuration exists) real-target: $(obj)/config.h coreboot files_added -coreboot: build-dirs $(obj)/coreboot.rom $(obj)/cbfstool $(obj)/rmodtool +coreboot: build-dirs $(obj)/coreboot.rom $(obj)/cbfstool $(obj)/rmodtool $(obj)/ifwitool # This target can be used in site local to run scripts or additional # targets after the build completes by creating a Makefile.inc in the @@ -385,6 +385,7 @@ build-dirs: CBFSTOOL:=$(objutil)/cbfstool/cbfstool FMAPTOOL:=$(objutil)/cbfstool/fmaptool RMODTOOL:=$(objutil)/cbfstool/rmodtool +IFWITOOL:=$(objutil)/cbfstool/ifwitool $(obj)/cbfstool: $(CBFSTOOL) cp $< $@ @@ -395,6 +396,9 @@ $(obj)/fmaptool: $(FMAPTOOL) $(obj)/rmodtool: $(RMODTOOL) cp $< $@ +$(obj)/ifwitool: $(IFWITOOL) + cp $< $@ + _WINCHECK=$(shell uname -o 2> /dev/null) STACK= ifeq ($(_WINCHECK),Msys) @@ -512,7 +516,7 @@ gitconfig: include util/crossgcc/Makefile.inc .PHONY: tools -tools: $(objutil)/kconfig/conf $(CBFSTOOL) $(FMAPTOOL) $(RMODTOOL) $(objutil)/nvramtool/nvramtool $(ROMCC_BIN) $(objutil)/sconfig/sconfig $(IFDTOOL) $(IFDFAKE) $(CBOOTIMAGE) $(AMDFWTOOL) $(FUTILITY) +tools: $(objutil)/kconfig/conf $(CBFSTOOL) $(FMAPTOOL) $(RMODTOOL) $(IFWITOOL) $(objutil)/nvramtool/nvramtool $(ROMCC_BIN) $(objutil)/sconfig/sconfig $(IFDTOOL) $(IFDFAKE) $(CBOOTIMAGE) $(AMDFWTOOL) $(FUTILITY) ########################################################################### # Common recipes for all stages

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Patch set updated for coreboot: soc/intel/apollolake: add support for IFWI region
by Furquan Shaikh 31 May '16

31 May '16

Furquan Shaikh (furquan(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/14999 -gerrit commit 333265b20a2d5c7c53b99c484b750bccc71844ac Author: Furquan Shaikh <furquan(a)google.com> Date: Sat May 28 12:57:05 2016 -0700 soc/intel/apollolake: add support for IFWI region On apollolake, the boot media layout is different in that the traditional "BIOS" region contains another data structure with the boot assets such as CSE firmware, PMC microcode, CPU microcode, and boot firmware to name a few. This region is referred to as the IFWI. Add support for writing the IFWI to a specified FMAP region to accommodate such platforms. Change-Id: Ia61f12a77893c3dd3256a9bd4e0f5eca0065de26 Signed-off-by: Furquan Shaikh <furquan(a)google.com> --- src/soc/intel/apollolake/Kconfig | 21 +++++++++++++++++++++ src/soc/intel/apollolake/Makefile.inc | 18 ++++++++++++++++++ 2 files changed, 39 insertions(+) diff --git a/src/soc/intel/apollolake/Kconfig b/src/soc/intel/apollolake/Kconfig index d6c5ffc..7c21ed2 100644 --- a/src/soc/intel/apollolake/Kconfig +++ b/src/soc/intel/apollolake/Kconfig @@ -160,4 +160,25 @@ config LBP2_FILE_NAME help Name of file to store in the logical boot partition 2 region. +config NEED_IFWI + bool "Write content into IFWI region" + default n + help + Write the content from a file into IFWI region defined by + IFWI_FMAP_NAME. + +config IFWI_FMAP_NAME + string "Name of FMAP region to pull IFWI into" + depends on NEED_IFWI + default "IFWI" + help + Name of FMAP region to write IFWI. + +config IFWI_FILE_NAME + string "Path of file to write to IFWI region" + depends on NEED_IFWI + default "3rdparty/blobs/mainboard/$(CONFIG_MAINBOARD_DIR)/ifwi.bin" + help + Name of file to store in the IFWI region. + endif diff --git a/src/soc/intel/apollolake/Makefile.inc b/src/soc/intel/apollolake/Makefile.inc index 1ea21f6..29636e1 100644 --- a/src/soc/intel/apollolake/Makefile.inc +++ b/src/soc/intel/apollolake/Makefile.inc @@ -75,4 +75,22 @@ files_added:: $(CBFSTOOL) $(obj)/coreboot.rom write -r $(CONFIG_LBP2_FMAP_NAME) -f $(CONFIG_LBP2_FILE_NAME) --fill-upward endif +# Bootblock on Apollolake platform lies in the IFWI region. In order to place +# the bootblock at the right location in IFWI image - +# a. Using ifwitool: +# 1. Create IFWI image (ifwi.bin.tmp) from input image +# (CONFIG_IFWI_FILE_NAME). +# 2. Delete OBBP sub-partition, if present. +# 3. Replace IBBL directory entry in IBBP sub-partition with currently +# generated bootblock.bin. +# b. Using cbfstool: +# 1. Write ifwi.bin.tmp to coreboot.rom using CONFIG_IFWI_FMAP_NAME. +ifeq ($(CONFIG_NEED_IFWI),y) +files_added:: $(IFWITOOL) + $(IFWITOOL) $(CONFIG_IFWI_FILE_NAME) create -f $(objcbfs)/ifwi.bin.tmp + $(IFWITOOL) $(objcbfs)/ifwi.bin.tmp delete -n OBBP + $(IFWITOOL) $(objcbfs)/ifwi.bin.tmp replace -n IBBP -f $(objcbfs)/bootblock.bin -d -e IBBL + $(CBFSTOOL) $(obj)/coreboot.rom write -r $(CONFIG_IFWI_FMAP_NAME) -f $(objcbfs)/ifwi.bin.tmp --fill-upward +endif + endif

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Patch merged into coreboot/master: soc/intel/apollolake: Update SPI memory mapping constraints
by gerrit＠coreboot.org 31 May '16

31 May '16

the following patch was just integrated into master: commit 204af8157dd4d4d2b295159628419812ec6a2816 Author: Andrey Petrov <andrey.petrov(a)intel.com> Date: Thu May 26 15:29:15 2016 -0700 soc/intel/apollolake: Update SPI memory mapping constraints MMIO region of 256 KiB under 4 GiB is not decoded by SPI controller by hardware design. Current code incorrectly specifies size of that region to be 128 KiB. This change corrects the value to 256 KiB. Change-Id: Idcc67eb3565b800d835e75c0b765dd49d1656938 Signed-off-by: Andrey Petrov <andrey.petrov(a)intel.com> Reviewed-on: https://review.coreboot.org/14979 Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Tested-by: build bot (Jenkins) See https://review.coreboot.org/14979 for details. -gerrit

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Patch merged into coreboot/master: mb/gigabyte/ga-g41m-es2l: Update board_info.txt and add item to Kconfig
by gerrit＠coreboot.org 31 May '16

31 May '16

the following patch was just integrated into master: commit b28a411362828b5d64220e15b0be8143709e083a Author: Damien Zammit <damien(a)zamaudio.com> Date: Tue May 24 17:26:51 2016 +1000 mb/gigabyte/ga-g41m-es2l: Update board_info.txt and add item to Kconfig This adds the website URL to the board info and also enables the realtek nic reset function as per a previous patch. Change-Id: I2cda120c59b55f0dd2ffa78d397b16beb13d6843 Signed-off-by: Damien Zammit <damien(a)zamaudio.com> Reviewed-on: https://review.coreboot.org/14954 Tested-by: build bot (Jenkins) Reviewed-by: Jonathan Neuschäfer <j.neuschaefer(a)gmx.net> Reviewed-by: Martin Roth <martinroth(a)google.com> See https://review.coreboot.org/14954 for details. -gerrit

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Patch merged into coreboot/master: drivers/net/r8168: Add driver for realtek nic
by gerrit＠coreboot.org 31 May '16

31 May '16

the following patch was just integrated into master: commit e983f0cb4ba6bc86bdf75aa2d334cab36723eb02 Author: Damien Zammit <damien(a)zamaudio.com> Date: Sat May 21 02:24:19 2016 +1000 drivers/net/r8168: Add driver for realtek nic One thing that is vital to this patch is the MAC address setting in case the EEPROM/efuse is unconfigured. Linux now recognises the default MAC address on GA-G41M-ES2L which does rely on the default bios settings for the MAC address. Change-Id: I32e070b545b4c6369686a7087b7ff838d00764e3 Signed-off-by: Damien Zammit <damien(a)zamaudio.com> Reviewed-on: https://review.coreboot.org/14927 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth(a)google.com> See https://review.coreboot.org/14927 for details. -gerrit

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Patch merged into coreboot/master: mb/gigabyte/ga-g41m-es2l: Use x4x_late_init()
by gerrit＠coreboot.org 31 May '16

31 May '16

the following patch was just integrated into master: commit 2abd3f9e1ce054aef415d59c48dc5e763b2f613e Author: Damien Zammit <damien(a)zamaudio.com> Date: Sat May 21 01:56:53 2016 +1000 mb/gigabyte/ga-g41m-es2l: Use x4x_late_init() This patch adds DMI/EP init to the board and fixes a couple of minor things. Change-Id: I10d0f6ce747b60499680e4dc229b7fcbb16cc039 Signed-off-by: Damien Zammit <damien(a)zamaudio.com> Reviewed-on: https://review.coreboot.org/14926 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth(a)google.com> See https://review.coreboot.org/14926 for details. -gerrit

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coreboot-gerrit May 2016