Leroy P Leahy (leroy.p.leahy(a)intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13639
-gerrit
commit 4844e09a8a956b7261b4f62516f4d79c38cb14a2
Author: Lee Leahy <leroy.p.leahy(a)intel.com>
Date: Mon Feb 8 16:19:56 2016 -0800
console: Disable SQUELCH_EARLY_SMP if SMP is not selected
Add a "depends on SMP" to the value SQUELCH_EARLY_SMP Kconfig value to
disable its selection when SMP is not enabled.
TEST=Build for Galileo
Change-Id: Ia3aa1d2169ed793e1bb26538b74b12347453d5af
Signed-off-by: Lee Leahy <leroy.p.leahy(a)intel.com>
---
src/console/Kconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/console/Kconfig b/src/console/Kconfig
index 85b04ef..83adc4f 100644
--- a/src/console/Kconfig
+++ b/src/console/Kconfig
@@ -10,6 +10,7 @@ config BOOTBLOCK_CONSOLE
config SQUELCH_EARLY_SMP
bool "Squelch AP CPUs from early console."
default y
+ depends on SMP
help
When selected only the BSP CPU will output to early console.
Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13547
-gerrit
commit ac970779d3e483092a9e8cf6a31538199e55b216
Author: Patrick Georgi <pgeorgi(a)chromium.org>
Date: Mon Feb 1 15:26:26 2016 +0100
build system: Build Chrome EC firmware on request
With the Chrome EC's "board" name set in Kconfig, the build system will
build and add the EC firmware, too. Available for the EC and the USB
PD controller.
Change-Id: I017d3a44d6ab8a540fcd198b4b09c35e4b98a8cf
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
---
src/ec/google/chromeec/Kconfig | 25 +++++++++++++++++++++++++
src/ec/google/chromeec/Makefile.inc | 36 ++++++++++++++++++++++++++++++++++++
2 files changed, 61 insertions(+)
diff --git a/src/ec/google/chromeec/Kconfig b/src/ec/google/chromeec/Kconfig
index 2600593..59a9781 100644
--- a/src/ec/google/chromeec/Kconfig
+++ b/src/ec/google/chromeec/Kconfig
@@ -73,3 +73,28 @@ config EC_GOOGLE_CHROMEEC_SPI_CHIP
depends on EC_GOOGLE_CHROMEEC_SPI
hex
default 0
+
+config EC_EXTERNAL_FIRMWARE
+ depends on EC_GOOGLE_CHROMEEC
+ def_bool n
+ help
+ Disable building EC firmware if it's already built externally (and
+ added manually.)
+
+config EC_GOOGLE_CHROMEEC_BOARDNAME
+ depends on EC_GOOGLE_CHROMEEC && !EC_EXTERNAL_FIRMWARE
+ string "Chrome EC board name for EC"
+ default ""
+ help
+ The board name used in the Chrome EC code base to build
+ the EC firmware. If set, the coreboot build with also
+ build the EC firmware and add it to the image.
+
+config EC_GOOGLE_CHROMEEC_PD_BOARDNAME
+ depends on EC_GOOGLE_CHROMEEC_PD && !EC_EXTERNAL_FIRMWARE
+ string "Chrome EC board name for PD"
+ default ""
+ help
+ The board name used in the Chrome EC code base to build
+ the PD firmware. If set, the coreboot build with also
+ build the EC firmware and add it to the image.
diff --git a/src/ec/google/chromeec/Makefile.inc b/src/ec/google/chromeec/Makefile.inc
index ad9de9e..a49d4c6 100644
--- a/src/ec/google/chromeec/Makefile.inc
+++ b/src/ec/google/chromeec/Makefile.inc
@@ -26,4 +26,40 @@ smm-$(CONFIG_VBOOT_VERIFY_FIRMWARE) += vboot_storage.c
romstage-$(CONFIG_VBOOT_VERIFY_FIRMWARE) += vboot_storage.c
verstage-$(CONFIG_VBOOT_VERIFY_FIRMWARE) += vboot_storage.c
+# These are Chrome EC firmware images that a payload (such as depthcharge) can
+# use to update the EC. ecrw is the main embedded controller's firmware,
+# pdrw is for a USB PD controller.
+CONFIG_EC_GOOGLE_CHROMEEC_BOARDNAME := $(call strip_quotes,$(CONFIG_EC_GOOGLE_CHROMEEC_BOARDNAME))
+CONFIG_EC_GOOGLE_CHROMEEC_PD_BOARDNAME := $(call strip_quotes,$(CONFIG_EC_GOOGLE_CHROMEEC_PD_BOARDNAME))
+
+cbfs-files-$(if $(CONFIG_EC_GOOGLE_CHROMEEC_BOARDNAME),y) += ecrw
+ecrw-file := $(obj)/ecrw
+ecrw-name := ecrw
+ecrw-type := raw
+ecrw-options := -A sha256
+
+cbfs-files-$(if $(CONFIG_EC_GOOGLE_CHROMEEC_PD_BOARDNAME),y) += pdrw
+pdrw-file := $(obj)/ecrw
+pdrw-name := ecrw
+pdrw-type := raw
+pdrw-options := -A sha256
+
+$(obj)/ecrw:
+ $(MAKE) -C $(top)/3rdparty/chromeec \
+ out=$(abspath $(obj)/external/chromeec/$(CONFIG_EC_GOOGLE_CHROMEEC_BOARDNAME)) \
+ CROSS_COMPILE=$(subst -cpp,-,$(CPP_arm)) \
+ HOST_CROSS_COMPILE= \
+ BOARD=$(CONFIG_EC_GOOGLE_CHROMEEC_BOARDNAME) \
+ rw
+ cp $(obj)/external/chromeec/$(CONFIG_EC_GOOGLE_CHROMEEC_BOARDNAME)/RW/ec.RW.flat $@
+
+$(obj)/pdrw:
+ $(MAKE) -C $(top)/3rdparty/chromeec \
+ out=$(abspath $(obj)/external/chromeec/$(CONFIG_EC_GOOGLE_CHROMEEC_PD_BOARDNAME)) \
+ CROSS_COMPILE=$(subst -cpp,-,$(CPP_arm)) \
+ HOST_CROSS_COMPILE= \
+ BOARD=$(CONFIG_EC_GOOGLE_CHROMEEC_PD_BOARDNAME) \
+ rw
+ cp $(obj)/external/chromeec/$(CONFIG_EC_GOOGLE_CHROMEEC_PD_BOARDNAME)/RW/ec.RW.flat $@
+
endif
Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13547
-gerrit
commit 05ae0c2e67960a67cc94af6c0e90f93b21efa2d6
Author: Patrick Georgi <pgeorgi(a)chromium.org>
Date: Mon Feb 1 15:26:26 2016 +0100
build system: Build Chrome EC firmware on request
With the Chrome EC's "board" name set in Kconfig, the build system will
build and add the EC firmware, too. Available for the EC and the USB
PD controller.
Change-Id: I017d3a44d6ab8a540fcd198b4b09c35e4b98a8cf
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
---
src/ec/google/chromeec/Kconfig | 25 +++++++++++++++++++++++++
src/ec/google/chromeec/Makefile.inc | 33 +++++++++++++++++++++++++++++++++
2 files changed, 58 insertions(+)
diff --git a/src/ec/google/chromeec/Kconfig b/src/ec/google/chromeec/Kconfig
index 2600593..59a9781 100644
--- a/src/ec/google/chromeec/Kconfig
+++ b/src/ec/google/chromeec/Kconfig
@@ -73,3 +73,28 @@ config EC_GOOGLE_CHROMEEC_SPI_CHIP
depends on EC_GOOGLE_CHROMEEC_SPI
hex
default 0
+
+config EC_EXTERNAL_FIRMWARE
+ depends on EC_GOOGLE_CHROMEEC
+ def_bool n
+ help
+ Disable building EC firmware if it's already built externally (and
+ added manually.)
+
+config EC_GOOGLE_CHROMEEC_BOARDNAME
+ depends on EC_GOOGLE_CHROMEEC && !EC_EXTERNAL_FIRMWARE
+ string "Chrome EC board name for EC"
+ default ""
+ help
+ The board name used in the Chrome EC code base to build
+ the EC firmware. If set, the coreboot build with also
+ build the EC firmware and add it to the image.
+
+config EC_GOOGLE_CHROMEEC_PD_BOARDNAME
+ depends on EC_GOOGLE_CHROMEEC_PD && !EC_EXTERNAL_FIRMWARE
+ string "Chrome EC board name for PD"
+ default ""
+ help
+ The board name used in the Chrome EC code base to build
+ the PD firmware. If set, the coreboot build with also
+ build the EC firmware and add it to the image.
diff --git a/src/ec/google/chromeec/Makefile.inc b/src/ec/google/chromeec/Makefile.inc
index ad9de9e..afc7536 100644
--- a/src/ec/google/chromeec/Makefile.inc
+++ b/src/ec/google/chromeec/Makefile.inc
@@ -26,4 +26,37 @@ smm-$(CONFIG_VBOOT_VERIFY_FIRMWARE) += vboot_storage.c
romstage-$(CONFIG_VBOOT_VERIFY_FIRMWARE) += vboot_storage.c
verstage-$(CONFIG_VBOOT_VERIFY_FIRMWARE) += vboot_storage.c
+CONFIG_EC_GOOGLE_CHROMEEC_BOARDNAME := $(call strip_quotes,$(CONFIG_EC_GOOGLE_CHROMEEC_BOARDNAME))
+CONFIG_EC_GOOGLE_CHROMEEC_PD_BOARDNAME := $(call strip_quotes,$(CONFIG_EC_GOOGLE_CHROMEEC_PD_BOARDNAME))
+
+cbfs-files-$(if $(CONFIG_EC_GOOGLE_CHROMEEC_BOARDNAME),y) += ecrw
+ecrw-file := $(obj)/ecrw
+ecrw-name := ecrw
+ecrw-type := raw
+ecrw-options := -A sha256
+
+cbfs-files-$(if $(CONFIG_EC_GOOGLE_CHROMEEC_PD_BOARDNAME),y) += pdrw
+pdrw-file := $(obj)/ecrw
+pdrw-name := ecrw
+pdrw-type := raw
+pdrw-options := -A sha256
+
+$(obj)/ecrw:
+ $(MAKE) -C $(top)/3rdparty/chromeec \
+ out=$(abspath $(obj)/external/chromeec/$(CONFIG_EC_GOOGLE_CHROMEEC_BOARDNAME)) \
+ CROSS_COMPILE=$(subst -cpp,-,$(CPP_arm)) \
+ HOST_CROSS_COMPILE= \
+ BOARD=$(CONFIG_EC_GOOGLE_CHROMEEC_BOARDNAME) \
+ rw
+ cp $(obj)/external/chromeec/$(CONFIG_EC_GOOGLE_CHROMEEC_BOARDNAME)/RW/ec.RW.flat $@
+
+$(obj)/pdrw:
+ $(MAKE) -C $(top)/3rdparty/chromeec \
+ out=$(abspath $(obj)/external/chromeec/$(CONFIG_EC_GOOGLE_CHROMEEC_PD_BOARDNAME)) \
+ CROSS_COMPILE=$(subst -cpp,-,$(CPP_arm)) \
+ HOST_CROSS_COMPILE= \
+ BOARD=$(CONFIG_EC_GOOGLE_CHROMEEC_PD_BOARDNAME) \
+ rw
+ cp $(obj)/external/chromeec/$(CONFIG_EC_GOOGLE_CHROMEEC_PD_BOARDNAME)/RW/ec.RW.flat $@
+
endif
Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13634
-gerrit
commit 441533e64b0f0299c79b8e3a6805dd50f8176b4a
Author: Patrick Georgi <pgeorgi(a)chromium.org>
Date: Fri Feb 5 11:30:19 2016 +0100
chromebooks: Define GBB hardware IDs
This makes the test IDs the default.
[pg: need to add them all]
Change-Id: I25793962ac16f451f204dbba6ede6a64c847cfd5
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
---
src/mainboard/google/veyron/Kconfig | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/src/mainboard/google/veyron/Kconfig b/src/mainboard/google/veyron/Kconfig
index e873473..b58e470 100644
--- a/src/mainboard/google/veyron/Kconfig
+++ b/src/mainboard/google/veyron/Kconfig
@@ -91,4 +91,9 @@ config EC_GOOGLE_CHROMEEC_BOARDNAME
depends on CHROMEOS
default "jerry" if BOARD_GOOGLE_VEYRON_JERRY
+config GBB_HWID
+ string
+ depends on CHROMEOS
+ default "MINNIE TEST A-A 5151" if BOARD_GOOGLE_VEYRON_MINNIE
+
endif # BOARD_GOOGLE_VEYRON