the following patch was just integrated into master:
commit a1faa4cfc7914af44f02278c68414a5aedc8ccf9
Author: Aaron Durbin <adurbin(a)chromium.org>
Date: Fri Jan 22 15:43:43 2016 -0600
intel/skylake: implement vboot_platform_is_resuming()
To allow skylake platforms to run with verified memory init
code the chipset needs to implement vboot_platform_is_resuming()
so that the vboot code can make proper decisions.
BUG=chrome-os-partner:46049
BRANCH=glados
TEST=Suspended and resumed on chell. Also, tested with an EC build
which returns a bad hash to ensure that is properly caught.
Change-Id: I508a339c07dcc9e7c56a0df4201660827b3ae07a
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
Original-Commit-Id: a3e11789339bcd8fc8fc99b704c6a1110acf5302
Original-Change-Id: I40264019eb28e85795258112c720056a6a3fc523
Original-Signed-off-by: Aaron Durbin <adurbin(a)chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/323503
Original-Reviewed-by: Duncan Laurie <dlaurie(a)chromium.org>
Reviewed-on: https://review.coreboot.org/13578
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
See https://review.coreboot.org/13578 for details.
-gerrit
the following patch was just integrated into master:
commit 49b2383ddb14f479cd2a5d1e01b1378810e8108e
Author: Aaron Durbin <adurbin(a)chromium.org>
Date: Fri Jan 22 14:42:54 2016 -0600
google/chromeec: implement vboot_(save|retrieve)_hash API
For x86 systems which resume through the reset vector one needs to
ensure the the RW slot taken at resume time matches the one at
boot time. To that end, allow Chrome OS EC to supply the plumbing
to vboot for storing and retrieving the RW slots' hash digest
using the vstore backend.
BUG=chrome-os-partner:46049
BRANCH=glados
TEST=Suspended and resumed on chell. Also, tested with an EC build
which returns a bad hash to ensure that is properly caught.
Change-Id: Ib056f7e6b3386447ed1ff95c740ef5b4544f9049
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
Original-Commit-Id: 9c78546b1d6298a4c397a587c564df6d9d097e75
Original-Change-Id: I86c96a4092deab2dfa51b3043b9dba16b6a4c201
Original-Signed-off-by: Aaron Durbin <adurbin(a)chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/323502
Original-Reviewed-by: Patrick Georgi <pgeorgi(a)chromium.org>
Original-Reviewed-by: Duncan Laurie <dlaurie(a)chromium.org>
Reviewed-on: https://review.coreboot.org/13577
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
See https://review.coreboot.org/13577 for details.
-gerrit
the following patch was just integrated into master:
commit f55e7ddbd6635c89f9da020a3874d6722c32626c
Author: Julius Werner <jwerner(a)chromium.org>
Date: Mon Jan 25 18:35:52 2016 -0800
util/cbmem: Add new depthcharge timestamps
This patch adds strings for the timestamp changes and additions in the
Chrome OS bootloader (depthcharge). See http://crosreview.com/323783
for details and justification.
BRANCH=none
BUG=None
TEST=Booted Oak, confirmed that cbmem output includes new timestamps.
Change-Id: I9ad68edca660f4e4286e680316b4e14f1259d1bc
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
Original-Commit-Id: c1b1f6d669f62217ed701cd3561b9d14973d890a
Original-Change-Id: I7256ca62c69f2ab7279fd2656fbbfa610e04fc44
Original-Signed-off-by: Julius Werner <jwerner(a)chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/323871
Original-Reviewed-by: Aaron Durbin <adurbin(a)chromium.org>
Reviewed-on: https://review.coreboot.org/13576
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
See https://review.coreboot.org/13576 for details.
-gerrit
the following patch was just integrated into master:
commit 5dbefd9ff672dd9bbcbbf20441fcb7909137b584
Author: Aaron Durbin <adurbin(a)chromium.org>
Date: Fri Jan 22 16:33:57 2016 -0600
chromeos/vboot: allow platform to hook into vboot_reboot()
Sometimes it's necessary for the platform to perform clean up
tasks prior to reboot when employing vboot. For example, x86 systems
that resume and do vboot verification may need to clear their
sleep control register prior to doing a cold reset so that the
next boot doesn't appear to be a resume. Allow that hook by
introducing vboot_platform_prepare_reboot().
BUG=chrome-os-partner:46049
BRANCH=glados
TEST=Ensure vboot_platform_prepare_reboot() called from vboot_reboot().
Change-Id: I622c9181d9fa3048204e3df3223d5dd4b458abca
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
Original-Commit-Id: f31ffc40bde002dec398fd4dd9d2ee9d65df0d7b
Original-Change-Id: I97318cec34494a7fc4b1ecf2cb22715d20e730ff
Original-Signed-off-by: Aaron Durbin <adurbin(a)chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/323501
Original-Reviewed-by: Patrick Georgi <pgeorgi(a)chromium.org>
Original-Reviewed-by: Duncan Laurie <dlaurie(a)chromium.org>
Reviewed-on: https://review.coreboot.org/13575
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
See https://review.coreboot.org/13575 for details.
-gerrit
the following patch was just integrated into master:
commit 87c9faeb4c7a94b2de1b2cf44d8db1383909ccc2
Author: Aaron Durbin <adurbin(a)chromium.org>
Date: Fri Jan 22 15:26:04 2016 -0600
chromeos/vboot: provide support for x86 memory init verification
For x86 systems which resume through the reset vector one needs to
ensure the the RW slot taken at resume time matches the one at
boot time. The reason is that any assets pulled out of the boot
media need to match how the platform previously booted. To do
that one needs obtain the hash digest of the chosen slot, and it
needs to be saved in a secure place on the normal boot path. On
resume one needs to retrieve the hash digest back to compare it
with the chosen slot. If they don't match resuming won't be
possible.
BUG=chrome-os-partner:46049
BRANCH=glados
TEST=Suspended and resumed on chell. Also, tested with an EC build
which returns a bad hash to ensure that is properly caught.
CQ-DEPEND=CL:323460
Change-Id: I90ce26813b67f46913aa4026b42d9490a564bb6c
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
Original-Commit-Id: 01a42c0ecfc6d60d1d2e5e36a86781d91d5c47a9
Original-Change-Id: I6c6bdce7e06712bc06cc620a3d7a6a6250c59c95
Original-Signed-off-by: Aaron Durbin <adurbin(a)chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/323500
Original-Reviewed-by: Patrick Georgi <pgeorgi(a)chromium.org>
Original-Reviewed-by: Duncan Laurie <dlaurie(a)chromium.org>
Reviewed-on: https://review.coreboot.org/13574
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
See https://review.coreboot.org/13574 for details.
-gerrit
the following patch was just integrated into master:
commit 43e6d6a1247768bbf5c42664c1bdb7d478f05808
Author: Patrick Georgi <pgeorgi(a)chromium.org>
Date: Wed Feb 3 16:53:08 2016 +0100
3rdparty/vboot: update to current master
It provides a few extensions to the API that are required, such as
vb2api_check_hash_get_digest()
Change-Id: Ib4d8bdc29751f51f0f7532376175490a0ffd84b3
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
Reviewed-on: https://review.coreboot.org/13590
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
See https://review.coreboot.org/13590 for details.
-gerrit
the following patch was just integrated into master:
commit 9dca83c76220172ec7959f9c0b93ad415808d449
Author: Dhaval Sharma <dhaval.v.sharma(a)intel.com>
Date: Mon Jan 18 17:28:20 2016 +0530
intel/skylake: Display ME firmware status before os boot
Display ME firmware status before os boot. Specifically this
patch reads out the ME hfsts1 and hfsts2 status registers that provide
information about overall ME health before device gets disabled.
This change reused most of the code from bdw me_status implementation.
BUG=chrome-os-partner:47384
BRANCH=glados
TEST=Builds and Boots on FAB4 SKU2/3. Can observe me status table
Change-Id: Ia511c4f336d33a6f3b49a344bfbaea6ed227ffeb
Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org>
Original-Commit-Id: a9d0fb411c3921654f0fdcea2a3d4ee601987af2
Original-Change-Id: Ied7e2dcd9a1298a38dfe1eda9296b9ca8eccf6b1
Original-Credits-to: Duncan Laurie <dlaurie(a)chromium.org>
Original-Signed-off-by: Dhaval Sharma <dhaval.v.sharma(a)intel.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/323260
Original-Commit-Ready: dhaval v sharma <dhaval.v.sharma(a)intel.com>
Original-Tested-by: dhaval v sharma <dhaval.v.sharma(a)intel.com>
Original-Reviewed-by: Duncan Laurie <dlaurie(a)chromium.org>
Reviewed-on: https://review.coreboot.org/13573
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org>
See https://review.coreboot.org/13573 for details.
-gerrit
the following patch was just integrated into master:
commit 2ed7eb795cbcef16e7647d2ccb6052e7057456b5
Author: Lee Leahy <lpleahyjr(a)gmail.com>
Date: Fri Jan 1 18:08:48 2016 -0800
soc/intel/quark: Add minimal Quark SoC X1000 files
Add the files for minimal Quark X1000 SoC support:
* Declare pei_data structure
* Declare sleep states and chipset_power_state structure
* Specify top of memory
* Empty FspUpdVpd.h file
TEST=None
Change-Id: If741f84904394780e1f29bd6ddbd81514c3e21c9
Signed-off-by: Lee Leahy <leroy.p.leahy(a)intel.com>
Reviewed-on: https://review.coreboot.org/13439
Tested-by: build bot (Jenkins)
Reviewed-by: Martin Roth <martinroth(a)google.com>
See https://review.coreboot.org/13439 for details.
-gerrit