coreboot-gerrit December 2016

coreboot-gerrit@coreboot.org

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1140 discussions

Patch set updated for coreboot: soc/intel/apollolake: don't probe flash manually
by Aaron Durbin 15 Dec '16

15 Dec '16

Aaron Durbin (adurbin(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17867 -gerrit commit 2feb6c356ab2f7ab61255d26cf3ecbd906e601c4 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Wed Dec 14 12:32:35 2016 -0600 soc/intel/apollolake: don't probe flash manually Rely on boot_device_spi_flash() to provide the spi_flash object. There's no need to duplicate the probing logic. BUG=chrome-os-partner:56151 BRANCH=reef Change-Id: I91900a3dfad7ba92cbd3b0ace77b08db04cff0b6 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/soc/intel/apollolake/romstage.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/soc/intel/apollolake/romstage.c b/src/soc/intel/apollolake/romstage.c index 8c2a1a3..97be0f6 100644 --- a/src/soc/intel/apollolake/romstage.c +++ b/src/soc/intel/apollolake/romstage.c @@ -318,9 +318,9 @@ void mainboard_save_dimm_info(void) int get_sw_write_protect_state(void) { uint8_t status; - struct spi_flash *flash; + const struct spi_flash *flash; - flash = spi_flash_probe(CONFIG_BOOT_DEVICE_SPI_FLASH_BUS, 0); + flash = boot_device_spi_flash(); if (!flash) return 0;

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Patch merged into coreboot/master: google/reef: Remove VARIANT_DIR definition
by gerrit＠coreboot.org 15 Dec '16

15 Dec '16

the following patch was just integrated into master: commit d03391aa68f93b7d87370e9d63f3ec71a7f68dd0 Author: Martin Roth <martinroth(a)google.com> Date: Tue Dec 13 10:31:06 2016 -0700 google/reef: Remove VARIANT_DIR definition VARIANT_DIR is defined in coreboot/Makefile.inc, so doesn't need to be defined in each mainboard. Change-Id: Ic93957b710e4a9863774de7fcf3bd006696b6aa1 Signed-off-by: Martin Roth <martinroth(a)google.com> Reviewed-on: https://review.coreboot.org/17841 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber <nico.h(a)gmx.de> Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> See https://review.coreboot.org/17841 for details. -gerrit

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New patch to review for coreboot: google/eve: Enable native mode for UART pins in bootblock
by Duncan Laurie 15 Dec '16

15 Dec '16

Duncan Laurie (dlaurie(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17893 -gerrit commit 20e8d14b4b43d68ced7b6c30a74be03e2eca76cb Author: Duncan Laurie <dlaurie(a)chromium.org> Date: Wed Dec 14 16:57:37 2016 -0800 google/eve: Enable native mode for UART pins in bootblock Put the UART pins into native mode in bootblock so they are not floating when we try to communicate with H1 over I2C. Without a serial console enabled BIOS these pins were not configured until ramstage. BUG=chrome-os-partner:60935 TEST=Boot Eve board without serial console and H1 TPM enabled Change-Id: I30f3bf0bacc1bbd776b351a9c09748b0601c39bc Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org> --- src/mainboard/google/eve/gpio.h | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/mainboard/google/eve/gpio.h b/src/mainboard/google/eve/gpio.h index c7a5e46..34ae3a4 100644 --- a/src/mainboard/google/eve/gpio.h +++ b/src/mainboard/google/eve/gpio.h @@ -225,6 +225,10 @@ static const struct pad_config early_gpio_table[] = { /* I2C1_SCL */ PAD_CFG_NF(GPP_C19, NONE, DEEP, NF1), /* TPM */ /* UART2_CTS# */ PAD_CFG_GPI(GPP_C23, 20K_PU, DEEP), /* PCH_WP */ /* SATAXPCI0 */ PAD_CFG_GPI_APIC_INVERT(GPP_E0, NONE, PLTRST), /* TPM_INT_L */ + +/* Ensure UART pins are in native mode for H1 */ +/* UART2_RXD */ PAD_CFG_NF(GPP_C20, NONE, DEEP, NF1), /* SERVO */ +/* UART2_TXD */ PAD_CFG_NF(GPP_C21, NONE, DEEP, NF1), /* SERVO */ }; #endif

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Patch set updated for coreboot: drivers/i2c/hid: Add generic I2C HID driver
by Duncan Laurie 15 Dec '16

15 Dec '16

Duncan Laurie (dlaurie(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17856 -gerrit commit 369c16ed82a966d9b8dbab1a79c1b1bdc30902cd Author: Duncan Laurie <dlaurie(a)chromium.org> Date: Tue Dec 13 16:43:40 2016 -0800 drivers/i2c/hid: Add generic I2C HID driver Add a generic I2C-HID driver for these types of devices that do not need extra functionality. This allows a new device to be added without having to write a new driver. The i2c-hid PNP0C50 is automatically added as the _CID for the device in the ACPI Device. BUG=chrome-os-partner:58666 TEST=used on eve to describe a new i2c-hid touch controller Change-Id: I94e9531a72f9bf1d6b3ade362b88883b21b83d0a Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org> --- src/drivers/i2c/hid/Kconfig | 3 ++ src/drivers/i2c/hid/Makefile.inc | 1 + src/drivers/i2c/hid/chip.h | 28 +++++++++++++++++ src/drivers/i2c/hid/hid.c | 67 ++++++++++++++++++++++++++++++++++++++++ 4 files changed, 99 insertions(+) diff --git a/src/drivers/i2c/hid/Kconfig b/src/drivers/i2c/hid/Kconfig new file mode 100644 index 0000000..22531bb --- /dev/null +++ b/src/drivers/i2c/hid/Kconfig @@ -0,0 +1,3 @@ +config DRIVERS_I2C_HID + bool + select DRIVERS_I2C_GENERIC diff --git a/src/drivers/i2c/hid/Makefile.inc b/src/drivers/i2c/hid/Makefile.inc new file mode 100644 index 0000000..12162ac --- /dev/null +++ b/src/drivers/i2c/hid/Makefile.inc @@ -0,0 +1 @@ +ramstage-$(CONFIG_DRIVERS_I2C_HID) += hid.c diff --git a/src/drivers/i2c/hid/chip.h b/src/drivers/i2c/hid/chip.h new file mode 100644 index 0000000..7bce167 --- /dev/null +++ b/src/drivers/i2c/hid/chip.h @@ -0,0 +1,28 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2016 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#ifndef __DRIVERS_I2C_HID_CHIP_H__ +#define __DRIVERS_I2C_HID_CHIP_H__ + +#include <drivers/i2c/generic/chip.h> + +#define I2C_HID_CID "PNP0C50" + +struct drivers_i2c_hid_config { + struct drivers_i2c_generic_config generic; + uint8_t hid_desc_reg_offset; +}; + +#endif /* __I2C_HID_CHIP_H__ */ diff --git a/src/drivers/i2c/hid/hid.c b/src/drivers/i2c/hid/hid.c new file mode 100644 index 0000000..9eb56c2 --- /dev/null +++ b/src/drivers/i2c/hid/hid.c @@ -0,0 +1,67 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2016 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <arch/acpigen_dsm.h> +#include <device/device.h> +#include <stdint.h> +#include <string.h> +#include "chip.h" + +#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) +static void i2c_hid_fill_dsm(struct device *dev) +{ + struct drivers_i2c_hid_config *config = dev->chip_info; + struct dsm_i2c_hid_config dsm_config = { + .hid_desc_reg_offset = config->hid_desc_reg_offset, + }; + + acpigen_write_dsm_i2c_hid(&dsm_config); +} + +static void i2c_hid_fill_ssdt_generator(struct device *dev) +{ + struct drivers_i2c_hid_config *config = dev->chip_info; + config->generic.cid = I2C_HID_CID; + i2c_generic_fill_ssdt(dev, &i2c_hid_fill_dsm, &config->generic); +} + +static const char *i2c_hid_acpi_name(struct device *dev) +{ + static char name[5]; + snprintf(name, sizeof(name), "H%03.3X", dev->path.i2c.device); + name[4] = '\0'; + return name; +} +#endif + +static struct device_operations i2c_hid_ops = { + .read_resources = DEVICE_NOOP, + .set_resources = DEVICE_NOOP, + .enable_resources = DEVICE_NOOP, +#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) + .acpi_name = &i2c_hid_acpi_name, + .acpi_fill_ssdt_generator = &i2c_hid_fill_ssdt_generator, +#endif +}; + +static void i2c_hid_enable(struct device *dev) +{ + dev->ops = &i2c_hid_ops; +} + +struct chip_operations drivers_i2c_hid_ops = { + CHIP_NAME("I2C HID Device") + .enable_dev = &i2c_hid_enable +};

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Patch merged into coreboot/master: drivers/i2c: Pass in i2c_generic_config into i2c_generic_fill_ssdt
by gerrit＠coreboot.org 15 Dec '16

15 Dec '16

the following patch was just integrated into master: commit fdc1b2e6b44b2eec04ad9f67e4c7e63b64cd066f Author: Furquan Shaikh <furquan(a)chromium.org> Date: Tue Dec 13 21:50:32 2016 -0800 drivers/i2c: Pass in i2c_generic_config into i2c_generic_fill_ssdt Remove any assumptions required for the drivers using i2c_generic to have drivers_i2c_generic_config structure at the start of the driver config. Instead pass in a pointer to drivers_i2c_generic_config from the calling driver. Change-Id: I51dc4cad1c1f246b51891abf7115a7120e87b098 Signed-off-by: Furquan Shaikh <furquan(a)chromium.org> Reviewed-on: https://review.coreboot.org/17857 Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Tested-by: build bot (Jenkins) See https://review.coreboot.org/17857 for details. -gerrit

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Patch set updated for coreboot: skylake: Add target offset for throttling action
by Sumeet R Pawnikar 15 Dec '16

15 Dec '16

Sumeet R Pawnikar (sumeet.r.pawnikar(a)intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17889 -gerrit commit a207f8832861f8e1667d816cfd9686d40e0e933f Author: Sumeet Pawnikar <sumeet.r.pawnikar(a)intel.com> Date: Thu Dec 15 19:29:51 2016 +0530 skylake: Add target offset for throttling action This patch adds the offset as 10 degree C to adjust the thermal throttling action at prochot activation temperature from the default temperature target. Currently, Target Temperature Tjmax is 100 degree C. After setting Target Offset as 10 degree C, Pcode FW will start throttling action at 90 degree C [Tjmax-Offset]. If there is no Target Offset (i.e. default 0) than FW will start throttling action at 100 degree C. But, before that device will shutdown due to DPTF critical CPU temperature 99 degree C. BUG=chrome-os-partner:59397 BRANCH=None. TEST=Built for skylake platform and verified the target offset value before and after S3. Change-Id: Iacf64cbc40871bbec3bede65f196bf292e0149a6 Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar(a)intel.com> --- src/soc/intel/skylake/cpu.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/src/soc/intel/skylake/cpu.c b/src/soc/intel/skylake/cpu.c index 3ec8d2c..0458a93 100644 --- a/src/soc/intel/skylake/cpu.c +++ b/src/soc/intel/skylake/cpu.c @@ -206,6 +206,8 @@ static void configure_thermal_target(void) wrmsr(MSR_TEMPERATURE_TARGET, msr); } msr = rdmsr(MSR_TEMPERATURE_TARGET); + msr.lo &= ~(0xf << 24); /* Bits 27:24 */ + msr.lo |= 0xa << 24; /* set target offset as 10 degree C */ msr.lo &= ~0x7f; /* Bits 6:0 */ msr.lo |= 0xe6; /* setting 100ms thermal time window */ wrmsr(MSR_TEMPERATURE_TARGET, msr);

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New patch to review for coreboot: what-jenkins-does: Save a list of files not tested if supported
by Martin Roth 15 Dec '16

15 Dec '16

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17892 -gerrit commit 58599e5304ff0c246e07c734b12b08dfecfcd29e Author: Martin Roth <martinroth(a)google.com> Date: Thu Dec 15 08:20:00 2016 -0700 what-jenkins-does: Save a list of files not tested if supported If the filesystem saves access times, generate a list of files that were not used by the jenkins builds. This helps to determine which files are getting build tested and which are not. Change-Id: I505efb8ff43baec5983eb234618d2268c062544e Signed-off-by: Martin Roth <martinroth(a)google.com> --- Makefile.inc | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/Makefile.inc b/Makefile.inc index c5ce30f..86d0728 100644 --- a/Makefile.inc +++ b/Makefile.inc @@ -1054,6 +1054,7 @@ JENKINS_PAYLOAD?=none CPUS?=4 what-jenkins-does: util/lint/lint lint-stable --junit + touch .timestamp util/abuild/abuild -B -J $(if $(JENKINS_NOCCACHE),,-y) -c $(CPUS) -z -p $(JENKINS_PAYLOAD) -x -X $(top)/abuild-chromeos.xml util/abuild/abuild -B -J $(if $(JENKINS_NOCCACHE),,-y) -c $(CPUS) -z -p $(JENKINS_PAYLOAD) (cd payloads/libpayload; unset COREBOOT_BUILD_DIR; $(MAKE) $(if $(JENKINS_NOCCACHE),,CONFIG_LP_CCACHE=y) V=$(V) Q=$(Q) junit.xml) @@ -1061,3 +1062,10 @@ what-jenkins-does: $(MAKE) CPUS=$(CPUS) V=$(V) Q=$(Q) BLD_DIR=payloads/ BLD=nvramcui MFLAGS= MAKEFLAGS= MAKETARGET=all junit.xml $(MAKE) CPUS=$(CPUS) V=$(V) Q=$(Q) BLD_DIR=payloads/ BLD=coreinfo MFLAGS= MAKEFLAGS= MAKETARGET=defaultbuild junit.xml $(MAKE) CPUS=$(CPUS) V=$(V) Q=$(Q) BLD_DIR=util/ BLD=romcc MFLAGS= MAKEFLAGS= MAKETARGET=test junit.xml + if [ -z "$(find Makefile -type f ! -anewer .timestamp)" ]; then \ + find . -type f ! -anewer .timestamp | sed 's|./||' | grep '^src/\|^util\|^payloads' | grep -v '^payloads/external' > coreboot-builds/untested_files.txt; \ + printf "%s untested files\n" "wc -l < coreboot-builds/untested_files.txt"; \ + else \ + echo "Filesystem does not save file access times." > coreboot-builds/untested_files.txt; \ + fi + rm -f .timestamp

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New patch to review for coreboot: util/abuild: List boolean Kconfig options only tested at one setting
by Martin Roth 15 Dec '16

15 Dec '16

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17891 -gerrit commit 1d90f2c3c6f33468b7c4181b01d22718c3f40663 Author: Martin Roth <martinroth(a)google.com> Date: Wed Dec 14 10:20:53 2016 -0700 util/abuild: List boolean Kconfig options only tested at one setting To get a better idea of what Kconfig options aren't being tested, this will generate a list of which boolean symbols are always getting tested in either the enabled or disabled state. Save all Kconfig options, then build lists of all boolean options tested in the enabled and disabled states. Finally, compare the lists and generates a file containing all options that were tested only in one of the states. Change-Id: Id408785516e47d4c32ddedb268b8ad1601fcaa03 Signed-off-by: Martin Roth <martinroth(a)google.com> --- util/abuild/abuild | 8 ++++++++ 1 file changed, 8 insertions(+) diff --git a/util/abuild/abuild b/util/abuild/abuild index 93ceac5..c21b54f 100755 --- a/util/abuild/abuild +++ b/util/abuild/abuild @@ -271,6 +271,7 @@ function update_config yes "" 2>/dev/null | $MAKE oldconfig $silent "DOTCONFIG=${config_file}" "obj=${build_dir}" "objutil=$TARGET/sharedutils" &> "${build_dir}/config.log" ; \ CONFIG_OK=$? if [ $CONFIG_OK -eq 0 ]; then + cat "$build_dir/auto.conf" >> "$ALLCONFIGS" $MAKE savedefconfig $silent DEFCONFIG="${defconfig_file}" DOTCONFIG="${config_file}" obj="${build_dir}" objutil="$TARGET/sharedutils" &>> "${build_dir}/config.log" return $? else @@ -701,6 +702,7 @@ if [ "$customizing" = "" ]; then customizing="default configuration" fi +ALLCONFIGS="$TARGET/all_configs.txt" FAILED_BOARDS="$TOP/$TARGET/failed_boards" if [ "$recursive" = "false" ]; then @@ -827,6 +829,12 @@ fi junit '</testsuite>' if [ "$recursive" = "false" ]; then + # Generate a file to show what configs have been tested. + grep '^CONFIG_.*=y$' "$ALLCONFIGS" | sed 's/=.*//' | sort | uniq > "$TARGET/enabled_opts.txt" + grep '^# CONFIG_.* is not set$' "$ALLCONFIGS" | sed 's/# //' | sed 's/ .*//' | sort | uniq > "$TARGET/disabled_opts.txt" + + # Untabbed options are only tested enabled, tabbed options are only tested disabled. + comm "$TARGET/enabled_opts.txt" "$TARGET/disabled_opts.txt" -3 > "$TARGET/untested_opts.txt" # Print the list of failed boards if [ -f "$FAILED_BOARDS" ]; then

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New patch to review for coreboot: util/abuild: Print list of failed boards at the end of the abuild
by Martin Roth 15 Dec '16

15 Dec '16

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17890 -gerrit commit da0b6dc6186c958ed0d32a992aaec552c46ff5de Author: Martin Roth <martinroth(a)google.com> Date: Wed Dec 14 10:16:26 2016 -0700 util/abuild: Print list of failed boards at the end of the abuild When running abuild outside of jenkins, because all of the builds are printed intermixed, it's easy to miss when a board has failed the build by looking at the output. This saves a list of failed builds and prints the list at the end of the run. - Add a command line option to mark when abuild is being called recursively. - Add all failed builds to a list. - Print the list when a non-recursive abuild run exits. Change-Id: Icb40ed8083a57bbcde49297d2b0814f98dcbb6c8 Signed-off-by: Martin Roth <martinroth(a)google.com> --- util/abuild/abuild | 29 ++++++++++++++++++++++++++--- 1 file changed, 26 insertions(+), 3 deletions(-) diff --git a/util/abuild/abuild b/util/abuild/abuild index 7c4e29f..93ceac5 100755 --- a/util/abuild/abuild +++ b/util/abuild/abuild @@ -79,6 +79,9 @@ quiet=false # clang mode enabled by -sb option. scanbuild=false +# Mark whether abuild was called recursively +recursive=false + trap interrupt INT function interrupt @@ -359,6 +362,7 @@ function compile_target printf "failed\n" > compile.status printf "%s build FAILED after %ss!\nLog excerpt:\n" "$BUILD_NAME" "${duration}" tail -n $CONTEXT make.log 2> /dev/null || tail -$CONTEXT make.log + echo "$BUILD_NAME" >> "$FAILED_BOARDS" failed=1 fi cd "$CURR" || return $? @@ -424,6 +428,7 @@ function build_config tail -n $CONTEXT "$build_dir/config.log" 2> /dev/null || tail -$CONTEXT "$build_dir/config.log" junit "</testcase>" + echo "$BUILD_NAME" >> "$FAILED_BOARDS" return fi @@ -585,12 +590,12 @@ getoptbrand="$(getopt -V)" # shellcheck disable=SC2086 if [ "${getoptbrand:0:6}" == "getopt" ]; then # Detected GNU getopt that supports long options. - args=$(getopt -l version,verbose,quiet,help,all,target:,payloads:,cpus:,silent,junit,config,loglevel:,remove,prefix:,update,scan-build,ccache,blobs,clang,clean,outdir:,chromeos,xmlfile:,kconfig:,dir:,root: -o Vvqhat:p:c:sJCl:rP:uyBLzo:xX:K:d:R: -- "$@") || exit 1 + args=$(getopt -l version,verbose,quiet,help,all,target:,payloads:,cpus:,silent,junit,config,loglevel:,remove,prefix:,update,scan-build,ccache,blobs,clang,clean,outdir:,chromeos,xmlfile:,kconfig:,dir:,root:,recursive -o Vvqhat:p:c:sJCl:rP:uyBLzo:xX:K:d:R:I -- "$@") || exit 1 eval set -- $args retval=$? else # Detected non-GNU getopt - args=$(getopt Vvqhat:p:c:sJCl:rP:uyBLzo:xX:K:d:R: "$@") + args=$(getopt Vvqhat:p:c:sJCl:rP:uyBLzo:xX:K:d:R:I "$@") set -- $args retval=$? fi @@ -671,6 +676,7 @@ while true ; do configoptions="${configoptions}CONFIG_CHROMEOS=y\n" ;; -X|--xmlfile) shift; XMLFILE=$1; REAL_XMLFILE=$1; shift;; + -I|--recursive) shift; recursive=true;; -K|--kconfig) shift testclass="$(basename "$1" | tr '.' '_' )" customizing="${customizing}, $1 config" @@ -695,6 +701,12 @@ if [ "$customizing" = "" ]; then customizing="default configuration" fi +FAILED_BOARDS="$TOP/$TARGET/failed_boards" + +if [ "$recursive" = "false" ]; then + rm -f "$FAILED_BOARDS" +fi + USE_XARGS=0 if [ "$cpus" != "1" ]; then # Limit to 32 parallel builds for now. @@ -770,7 +782,7 @@ build_targets() fi rm -rf "$TARGET/temp" "$TMPCFG" # shellcheck disable=SC2086 - echo $targets | xargs -P ${cpus:-0} -n 1 "$0" $cmdline -t + echo $targets | xargs -P ${cpus:-0} -n 1 "$0" $cmdline -I -t } fi @@ -814,4 +826,15 @@ else fi junit '</testsuite>' +if [ "$recursive" = "false" ]; then + + # Print the list of failed boards + if [ -f "$FAILED_BOARDS" ]; then + printf "%s build(s) failed:\n" "$( wc -l < "$FAILED_BOARDS" )" + cat "$FAILED_BOARDS" + else + echo "All tested boards passed." + fi +fi + exit $failed

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Patch set updated for coreboot: util/abuild: Don't set XGCCPATH if it's in the environment
by Martin Roth 15 Dec '16

15 Dec '16

Martin Roth (martinroth(a)google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/17723 -gerrit commit 1dd1d744b9506f882644d04cbcfc53910cd0f983 Author: Martin Roth <martinroth(a)google.com> Date: Wed Nov 30 16:38:25 2016 -0700 util/abuild: Don't set XGCCPATH if it's in the environment Change-Id: I0fa231ca3d33300a671810e994c5be54ac10a18b Signed-off-by: Martin Roth <martinroth(a)google.com> --- util/abuild/abuild | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/util/abuild/abuild b/util/abuild/abuild index 7988fed..7c4e29f 100755 --- a/util/abuild/abuild +++ b/util/abuild/abuild @@ -31,8 +31,10 @@ export KCONFIG_OVERWRITECONFIG=1 # path to payload. Should be more generic PAYLOAD=/dev/null -# path to coreboot XGCC -XGCCPATH="${TOP}/util/crossgcc/xgcc/bin/" +# get path to coreboot XGCC if it's not already set +if [ -z "$XGCCPATH" ]; then + XGCCPATH="${TOP}/util/crossgcc/xgcc/bin/" +fi # Add XGCC to the path. if [ -d "$XGCCPATH" ] && [[ ":$PATH:" != *":$XGCCPATH:"* ]]; then

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coreboot-gerrit December 2016