Aaron Durbin (adurbin(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13479
-gerrit
commit 95b7a687ff5cdfd7157076d880f92427ee5467e1
Author: Aaron Durbin <adurbin(a)chromium.org>
Date: Tue Jan 26 17:08:56 2016 -0600
util/cbfstool: add 'compact' command
While assembling CBFS images within the RW slots on Chrome OS
machines the current approach is to 'cbfstool copy' from the
RO CBFS to each RW CBFS. Additional fixups are required such
as removing unneeded files from the RW CBFS (e.g. verstage)
as well as removing and adding back files with the proper
arguments (FSP relocation as well as romstage XIP relocation).
This ends up leaving holes in the RW CBFS. To speed up RW
CBFS slot hashing it's beneficial to pack all non-empty files
together at the beginning of the CBFS. Therefore, provide
the 'compact' command which bubbles all the empty entries to
the end of the CBFS.
Before:
Name Offset Type Size
cmos_layout.bin 0x0 cmos_layout 1164
dmic-2ch-48khz-16b.bin 0x500 raw 2920
dmic-2ch-48khz-32b.bin 0x10c0 raw 2920
nau88l25-2ch-48khz-24b.bin 0x1c80 raw 84
ssm4567-render-2ch-48khz-24b.bin 0x1d40 raw 84
ssm4567-capture-4ch-48khz-32b.bin 0x1e00 raw 84
vbt.bin 0x1ec0 optionrom 4096
spd.bin 0x2f00 spd 1536
config 0x3540 raw 6839
revision 0x5040 raw 606
font.bin 0x5300 raw 1919 (57892 after LZMA decompression)
vbgfx.bin 0x5ac0 raw 13048 (936784 after LZMA decompression)
locales 0x8e00 raw 2
locale_en.bin 0x8e40 raw 10742 (180754 after LZMA decompression)
u-boot.dtb 0xb880 mrc_cache 4081
(empty) 0xc8c0 null 44532
fallback/ramstage 0x17740 stage 86597
(empty) 0x2c9c0 null 54052
fallback/payload 0x39d80 payload 74309
cpu_microcode_blob.bin 0x4c000 microcode 94208
(empty) 0x63080 null 3657496
After:
Name Offset Type Size
cmos_layout.bin 0x0 cmos_layout 1164
dmic-2ch-48khz-16b.bin 0x500 raw 2920
dmic-2ch-48khz-32b.bin 0x10c0 raw 2920
nau88l25-2ch-48khz-24b.bin 0x1c80 raw 84
ssm4567-render-2ch-48khz-24b.bin 0x1d40 raw 84
ssm4567-capture-4ch-48khz-32b.bin 0x1e00 raw 84
vbt.bin 0x1ec0 optionrom 4096
spd.bin 0x2f00 spd 1536
config 0x3540 raw 6839
revision 0x5040 raw 606
font.bin 0x5300 raw 1919 (57892 after LZMA decompression)
vbgfx.bin 0x5ac0 raw 13048 (936784 after LZMA decompression)
locales 0x8e00 raw 2
locale_en.bin 0x8e40 raw 10742 (180754 after LZMA decompression)
u-boot.dtb 0xb880 mrc_cache 4081
fallback/ramstage 0xc8c0 stage 86597
fallback/payload 0x21b40 payload 74309
cpu_microcode_blob.bin 0x33dc0 microcode 94208
(empty) 0x4ae40 null 3756376
Change-Id: I8311172d71a2ccfccab384f8286cf9f21a17dec9
Signed-off-by: Aaron Durbin <adurbin(a)chromium.org>
---
util/cbfstool/cbfs_image.c | 83 ++++++++++++++++++++++++++++++++++++++++++++++
util/cbfstool/cbfs_image.h | 4 +++
util/cbfstool/cbfstool.c | 10 ++++++
3 files changed, 97 insertions(+)
diff --git a/util/cbfstool/cbfs_image.c b/util/cbfstool/cbfs_image.c
index 8425095..325b4b8 100644
--- a/util/cbfstool/cbfs_image.c
+++ b/util/cbfstool/cbfs_image.c
@@ -440,6 +440,89 @@ int cbfs_copy_instance(struct cbfs_image *image, struct buffer *dst)
return 0;
}
+static size_t cbfs_file_entry_size(const struct cbfs_file *f)
+{
+ return ntohl(f->offset) + ntohl(f->len);
+}
+
+int cbfs_compact_instance(struct cbfs_image *image)
+{
+ assert(image);
+
+ struct cbfs_file *prev;
+ struct cbfs_file *cur;
+
+ /* The prev entry will always be an empty entry. */
+ prev = NULL;
+
+ /*
+ * Note: this function does not honor alignment or fixed location files.
+ * It's behavior is akin to cbfs_copy_instance() in that it expects
+ * the caller to understand the ramifications of compacting a
+ * fragmented CBFS image.
+ */
+
+ for (cur = cbfs_find_first_entry(image);
+ cur && cbfs_is_valid_entry(image, cur);
+ cur = cbfs_find_next_entry(image, cur)) {
+ size_t prev_size;
+ size_t cur_size;
+ void *empty_file_and_data;
+ uint32_t type = htonl(cur->type);
+
+ /* Current entry is empty. Kepp track of it. */
+ if ((type == htonl(CBFS_COMPONENT_NULL)) ||
+ (type == htonl(CBFS_COMPONENT_DELETED))) {
+ prev = cur;
+ continue;
+ }
+
+ /* Need to ensure the previous entry is an empty one. */
+ if (prev == NULL)
+ continue;
+
+ /* At this point prev is an empty entry. Put the non-empty
+ * file in prev's location. Then add a new emptry entry. This
+ * essentialy bubbles empty entries to the end. */
+
+ prev_size = cbfs_file_entry_size(prev);
+ cur_size = cbfs_file_entry_size(cur);
+
+ /* Save empty file contents temporarily. */
+ empty_file_and_data = malloc(prev_size);
+ assert(empty_file_and_data);
+ memcpy(empty_file_and_data, prev, prev_size);
+
+ /* Copy the non-empty file over the empty file. */
+ memcpy(prev, cur, cur_size);
+
+ /*
+ * Get location of next file to copy in the empty one. Note
+ * that since prev was overwritten with the non-empty file
+ * it needs to be used to obtain the new current (which is
+ * the empty file).
+ */
+ cur = cbfs_find_next_entry(image, prev);
+
+ memcpy(cur, empty_file_and_data, prev_size);
+
+ free(empty_file_and_data);
+
+ /* Merge any potential empty entries together. */
+ cbfs_walk(image, cbfs_merge_empty_entry, NULL);
+
+ /*
+ * Since current switched to an empty file keep track of it.
+ * Even if any empty files were merged the empty entry still
+ * starts at previously calculated location.
+ */
+ prev = cur;
+ }
+
+
+ return 0;
+}
+
int cbfs_image_delete(struct cbfs_image *image)
{
if (image == NULL)
diff --git a/util/cbfstool/cbfs_image.h b/util/cbfstool/cbfs_image.h
index 38510d2..0d7877a 100644
--- a/util/cbfstool/cbfs_image.h
+++ b/util/cbfstool/cbfs_image.h
@@ -76,6 +76,10 @@ int cbfs_image_from_buffer(struct cbfs_image *out, struct buffer *in,
* Will not succeed on new-style images without a master header. */
int cbfs_copy_instance(struct cbfs_image *image, struct buffer *dst);
+/* Compact a fragmented CBFS image by placing all the non-empty files at the
+ * beginning of the image. Returns 0 on success, otherwise non-zero. */
+int cbfs_compact_instance(struct cbfs_image *image);
+
/* Releases the CBFS image. Returns 0 on success, otherwise non-zero. */
int cbfs_image_delete(struct cbfs_image *image);
diff --git a/util/cbfstool/cbfstool.c b/util/cbfstool/cbfstool.c
index 13a9956..af68385 100644
--- a/util/cbfstool/cbfstool.c
+++ b/util/cbfstool/cbfstool.c
@@ -1054,6 +1054,15 @@ static int cbfs_copy(void)
return cbfs_copy_instance(&src_image, param.image_region);
}
+static int cbfs_compact(void)
+{
+ struct cbfs_image image;
+ if (cbfs_image_from_buffer(&image, param.image_region,
+ param.headeroffset))
+ return 1;
+ return cbfs_compact_instance(&image);
+}
+
static const struct command commands[] = {
{"add", "H:r:f:n:t:c:b:a:vA:gh?", cbfs_add, true, true},
{"add-flat-binary", "H:r:f:n:l:e:c:b:vA:gh?", cbfs_add_flat_binary,
@@ -1064,6 +1073,7 @@ static const struct command commands[] = {
true, true},
{"add-int", "H:r:i:n:b:vgh?", cbfs_add_integer, true, true},
{"add-master-header", "H:r:vh?", cbfs_add_master_header, true, true},
+ {"compact", "r:h?", cbfs_compact, true, true},
{"copy", "r:R:h?", cbfs_copy, true, true},
{"create", "M:r:s:B:b:H:o:m:vh?", cbfs_create, true, true},
{"hashcbfs", "r:R:A:vh?", cbfs_hash, true, true},
Alexandru Gagniuc (mr.nuke.me(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13409
-gerrit
commit e02a488b47b4da011fdf0cd75df58ebc9fef7318
Author: Alexandru Gagniuc <alexandrux.gagniuc(a)intel.com>
Date: Fri Jan 15 14:52:20 2016 -0800
intel/apollolake_rvp: Take PCI-express devices out of reset
The reset signals for PCIe links are connected to GPIOs. Those need
to manually be set to the proper level before PCIe links will work.
Change-Id: I4fbf3d02516fbc651dda709b41bbab120372bee9
Signed-off-by: Alexandru Gagniuc <alexandrux.gagniuc(a)intel.com>
---
src/mainboard/intel/apollolake_rvp/mainboard.c | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/src/mainboard/intel/apollolake_rvp/mainboard.c b/src/mainboard/intel/apollolake_rvp/mainboard.c
index dc7bc1e..c11a080 100644
--- a/src/mainboard/intel/apollolake_rvp/mainboard.c
+++ b/src/mainboard/intel/apollolake_rvp/mainboard.c
@@ -14,10 +14,19 @@
#include <soc/gpio.h>
/* TODO: Move GPIO config to its own file once we get more GPIOs in the list */
+/*
+ * GPIOs:
+ * A tilde (~) before the name means that the signal uses inverted logic.
+ * PCIE RST signals route to the PWRGOOD(PCIe slot) or PERST0(M2 slot) inputs.
+ */
static const struct pad_config aplk_rvp_gpios[] = {
+ PAD_CFG_GPO(GPIO_13, 1, DEEP), /* ~PCIE_SLOT2_RST_N */
+ PAD_CFG_GPO(GPIO_15, 1, DEEP), /* ~WIFI_RST_GPIO_N */
PAD_CFG_GPO(GPIO_22, 1, DEEP), /* SATA Direct power */
+ PAD_CFG_GPO(GPIO_37, 1, DEEP), /* ~LAN_RST_N */
PAD_CFG_NF(GPIO_46, NATIVE, DEEP, NF1), /* UART2 RX*/
PAD_CFG_NF(GPIO_47, NATIVE, DEEP, NF1), /* UART2 TX*/
+ PAD_CFG_GPO(GPIO_152, 1, DEEP), /* ~PCIE_SLOT1_RST_N */
PAD_CFG_NF(GPIO_193, NATIVE, DEEP, NF1), /* PANEL0_VDDEN */
PAD_CFG_NF(GPIO_194, NATIVE, DEEP, NF1), /* PANEL0_BKLTEN */
PAD_CFG_NF(GPIO_195, NATIVE, DEEP, NF1), /* PANEL0_BKLTCTL */
Alexandru Gagniuc (mr.nuke.me(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/13401
-gerrit
commit 36a9b64405e35a06df753dbb4ac174ca9c178782
Author: Zhao, Lijian <lijian.zhao(a)intel.com>
Date: Thu Jan 7 16:22:55 2016 -0800
intel/apollolake_rvp: Provide stubs needed for CHROMEOS builds
Add mecessary stubs for required for CONFIG_CHROMEOS. Without those,
the coreboot build will break.
Note that MAINBOARD_HAS_CHROMEOS is not enabled at this time due to
missing dependencies in the soc/.
Change-Id: Ie4a1ce812e8fc8dc974fc55a7180a5ea433f146e
Signed-off-by: Zhao, Lijian <lijian.zhao(a)intel.com>
Signed-off-by: Alexandru Gagniuc <alexandrux.gagniuc(a)intel.com>
---
src/mainboard/intel/apollolake_rvp/Makefile.inc | 4 +++
src/mainboard/intel/apollolake_rvp/chromeos.c | 35 +++++++++++++++++++++++++
2 files changed, 39 insertions(+)
diff --git a/src/mainboard/intel/apollolake_rvp/Makefile.inc b/src/mainboard/intel/apollolake_rvp/Makefile.inc
index f3c87b2..52de59b 100755
--- a/src/mainboard/intel/apollolake_rvp/Makefile.inc
+++ b/src/mainboard/intel/apollolake_rvp/Makefile.inc
@@ -1 +1,5 @@
+
+romstage-$(CONFIG_CHROMEOS) += chromeos.c
+ramstage-$(CONFIG_CHROMEOS) += chromeos.c
+
ramstage-y += mainboard.c
diff --git a/src/mainboard/intel/apollolake_rvp/chromeos.c b/src/mainboard/intel/apollolake_rvp/chromeos.c
new file mode 100644
index 0000000..bef4210
--- /dev/null
+++ b/src/mainboard/intel/apollolake_rvp/chromeos.c
@@ -0,0 +1,35 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2015 Intel Corp.
+ * (Written by Lance Zhao <lijian.zhao(a)intel.com> for Intel Corp.)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ */
+
+#include <vendorcode/google/chromeos/chromeos.h>
+
+int get_lid_switch(void)
+{
+ /* Default to force open */
+ return 1;
+}
+
+/* The dev-switch is virtual */
+int get_developer_mode_switch(void)
+{
+ return 0;
+}
+
+int get_recovery_mode_switch(void)
+{
+ return 0;
+}
+
+int get_write_protect_state(void)
+{
+ return 0;
+}