coreboot-gerrit July 2015

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Patch set updated for coreboot: rk3288: Use timestamp region for pre-cbmem timestamps
by Patrick Georgi 02 Jul '15

02 Jul '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10740 -gerrit commit 26b3fdf60a5bbae3ec9ff6c61a516a926bffe78d Author: Furquan Shaikh <furquan(a)google.com> Date: Mon Nov 3 14:39:11 2014 -0800 rk3288: Use timestamp region for pre-cbmem timestamps BUG=None BRANCH=None TEST=Compiles successfully for veyron_pinky Original-Change-Id: I3862e9bf2c32085c921adae4c1dcdf88ff0f3ff3 Original-Signed-off-by: Furquan Shaikh <furquan(a)google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/227243 Original-Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Original-Commit-Queue: Furquan Shaikh <furquan(a)chromium.org> Original-Tested-by: Furquan Shaikh <furquan(a)chromium.org> (cherry picked from commit 0fabdbb05826160beb8ee8f89339b18a49e87ab8) Signed-off-by: Marc Jones <marc.jones(a)se-eng.com> Change-Id: I4504d29a43084d4bd406626899b25903200fa6d7 --- src/mainboard/google/veyron_brain/romstage.c | 14 +++----------- src/mainboard/google/veyron_danger/romstage.c | 14 +++----------- src/mainboard/google/veyron_jerry/romstage.c | 14 +++----------- src/mainboard/google/veyron_mickey/romstage.c | 14 +++----------- src/mainboard/google/veyron_mighty/romstage.c | 14 +++----------- src/mainboard/google/veyron_minnie/romstage.c | 14 +++----------- src/mainboard/google/veyron_pinky/romstage.c | 14 +++----------- src/mainboard/google/veyron_rialto/romstage.c | 14 +++----------- src/mainboard/google/veyron_romy/romstage.c | 14 +++----------- src/mainboard/google/veyron_speedy/romstage.c | 14 +++----------- src/soc/rockchip/rk3288/Kconfig | 1 + src/soc/rockchip/rk3288/bootblock.c | 3 +++ src/soc/rockchip/rk3288/include/soc/memlayout.ld | 1 + 13 files changed, 35 insertions(+), 110 deletions(-) diff --git a/src/mainboard/google/veyron_brain/romstage.c b/src/mainboard/google/veyron_brain/romstage.c index 9f7b1a5..3ea50b6 100644 --- a/src/mainboard/google/veyron_brain/romstage.c +++ b/src/mainboard/google/veyron_brain/romstage.c @@ -80,11 +80,7 @@ static void configure_l2ctlr(void) void main(void) { #if CONFIG_COLLECT_TIMESTAMPS - uint64_t start_romstage_time; - uint64_t before_dram_time; - uint64_t after_dram_time; - uint64_t base_time = timestamp_get(); - start_romstage_time = timestamp_get(); + timestamp_add_now(TS_START_ROMSTAGE); #endif console_init(); @@ -94,11 +90,11 @@ void main(void) /* vdd_log 1200mv is enough for ddr run 666Mhz */ regulate_vdd_log(1200); #if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = timestamp_get(); + timestamp_add_now(TS_BEFORE_INITRAM); #endif sdram_init(get_sdram_config()); #if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = timestamp_get(); + timestamp_add_now(TS_AFTER_INITRAM); #endif /* Now that DRAM is up, add mappings for it and DMA coherency buffer. */ @@ -110,10 +106,6 @@ void main(void) cbmem_initialize_empty(); #if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time); - timestamp_add(TS_AFTER_INITRAM, after_dram_time); timestamp_add_now(TS_END_ROMSTAGE); #endif diff --git a/src/mainboard/google/veyron_danger/romstage.c b/src/mainboard/google/veyron_danger/romstage.c index 80d9081..0328e95 100644 --- a/src/mainboard/google/veyron_danger/romstage.c +++ b/src/mainboard/google/veyron_danger/romstage.c @@ -81,11 +81,7 @@ static void configure_l2ctlr(void) void main(void) { #if CONFIG_COLLECT_TIMESTAMPS - uint64_t start_romstage_time; - uint64_t before_dram_time; - uint64_t after_dram_time; - uint64_t base_time = timestamp_get(); - start_romstage_time = timestamp_get(); + timestamp_add_now(TS_START_ROMSTAGE); #endif console_init(); @@ -98,11 +94,11 @@ void main(void) /* vdd_log 1200mv is enough for ddr run 666Mhz */ regulate_vdd_log(1200); #if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = timestamp_get(); + timestamp_add_now(TS_BEFORE_INITRAM); #endif sdram_init(get_sdram_config()); #if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = timestamp_get(); + timestamp_add_now(TS_AFTER_INITRAM); #endif /* Now that DRAM is up, add mappings for it and DMA coherency buffer. */ @@ -114,10 +110,6 @@ void main(void) cbmem_initialize_empty(); #if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time); - timestamp_add(TS_AFTER_INITRAM, after_dram_time); timestamp_add_now(TS_END_ROMSTAGE); #endif diff --git a/src/mainboard/google/veyron_jerry/romstage.c b/src/mainboard/google/veyron_jerry/romstage.c index e509a4a..06eabe0 100644 --- a/src/mainboard/google/veyron_jerry/romstage.c +++ b/src/mainboard/google/veyron_jerry/romstage.c @@ -86,11 +86,7 @@ static void sdmmc_power_off(void) void main(void) { #if CONFIG_COLLECT_TIMESTAMPS - uint64_t start_romstage_time; - uint64_t before_dram_time; - uint64_t after_dram_time; - uint64_t base_time = timestamp_get(); - start_romstage_time = timestamp_get(); + timestamp_add_now(TS_START_ROMSTAGE); #endif console_init(); @@ -103,11 +99,11 @@ void main(void) /* vdd_log 1200mv is enough for ddr run 666Mhz */ regulate_vdd_log(1200); #if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = timestamp_get(); + timestamp_add_now(TS_BEFORE_INITRAM); #endif sdram_init(get_sdram_config()); #if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = timestamp_get(); + timestamp_add_now(TS_AFTER_INITRAM); #endif /* Now that DRAM is up, add mappings for it and DMA coherency buffer. */ @@ -119,10 +115,6 @@ void main(void) cbmem_initialize_empty(); #if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time); - timestamp_add(TS_AFTER_INITRAM, after_dram_time); timestamp_add_now(TS_END_ROMSTAGE); #endif diff --git a/src/mainboard/google/veyron_mickey/romstage.c b/src/mainboard/google/veyron_mickey/romstage.c index 9f7b1a5..3ea50b6 100644 --- a/src/mainboard/google/veyron_mickey/romstage.c +++ b/src/mainboard/google/veyron_mickey/romstage.c @@ -80,11 +80,7 @@ static void configure_l2ctlr(void) void main(void) { #if CONFIG_COLLECT_TIMESTAMPS - uint64_t start_romstage_time; - uint64_t before_dram_time; - uint64_t after_dram_time; - uint64_t base_time = timestamp_get(); - start_romstage_time = timestamp_get(); + timestamp_add_now(TS_START_ROMSTAGE); #endif console_init(); @@ -94,11 +90,11 @@ void main(void) /* vdd_log 1200mv is enough for ddr run 666Mhz */ regulate_vdd_log(1200); #if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = timestamp_get(); + timestamp_add_now(TS_BEFORE_INITRAM); #endif sdram_init(get_sdram_config()); #if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = timestamp_get(); + timestamp_add_now(TS_AFTER_INITRAM); #endif /* Now that DRAM is up, add mappings for it and DMA coherency buffer. */ @@ -110,10 +106,6 @@ void main(void) cbmem_initialize_empty(); #if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time); - timestamp_add(TS_AFTER_INITRAM, after_dram_time); timestamp_add_now(TS_END_ROMSTAGE); #endif diff --git a/src/mainboard/google/veyron_mighty/romstage.c b/src/mainboard/google/veyron_mighty/romstage.c index e509a4a..06eabe0 100644 --- a/src/mainboard/google/veyron_mighty/romstage.c +++ b/src/mainboard/google/veyron_mighty/romstage.c @@ -86,11 +86,7 @@ static void sdmmc_power_off(void) void main(void) { #if CONFIG_COLLECT_TIMESTAMPS - uint64_t start_romstage_time; - uint64_t before_dram_time; - uint64_t after_dram_time; - uint64_t base_time = timestamp_get(); - start_romstage_time = timestamp_get(); + timestamp_add_now(TS_START_ROMSTAGE); #endif console_init(); @@ -103,11 +99,11 @@ void main(void) /* vdd_log 1200mv is enough for ddr run 666Mhz */ regulate_vdd_log(1200); #if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = timestamp_get(); + timestamp_add_now(TS_BEFORE_INITRAM); #endif sdram_init(get_sdram_config()); #if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = timestamp_get(); + timestamp_add_now(TS_AFTER_INITRAM); #endif /* Now that DRAM is up, add mappings for it and DMA coherency buffer. */ @@ -119,10 +115,6 @@ void main(void) cbmem_initialize_empty(); #if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time); - timestamp_add(TS_AFTER_INITRAM, after_dram_time); timestamp_add_now(TS_END_ROMSTAGE); #endif diff --git a/src/mainboard/google/veyron_minnie/romstage.c b/src/mainboard/google/veyron_minnie/romstage.c index 68ab661..ffdfdb0 100644 --- a/src/mainboard/google/veyron_minnie/romstage.c +++ b/src/mainboard/google/veyron_minnie/romstage.c @@ -87,11 +87,7 @@ static void sdmmc_power_off(void) void main(void) { #if CONFIG_COLLECT_TIMESTAMPS - uint64_t start_romstage_time; - uint64_t before_dram_time; - uint64_t after_dram_time; - uint64_t base_time = timestamp_get(); - start_romstage_time = timestamp_get(); + timestamp_add_now(TS_START_ROMSTAGE); #endif console_init(); @@ -104,11 +100,11 @@ void main(void) /* vdd_log 1200mv is enough for ddr run 666Mhz */ regulate_vdd_log(1200); #if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = timestamp_get(); + timestamp_add_now(TS_BEFORE_INITRAM); #endif sdram_init(get_sdram_config()); #if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = timestamp_get(); + timestamp_add_now(TS_AFTER_INITRAM); #endif /* Now that DRAM is up, add mappings for it and DMA coherency buffer. */ @@ -120,10 +116,6 @@ void main(void) cbmem_initialize_empty(); #if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time); - timestamp_add(TS_AFTER_INITRAM, after_dram_time); timestamp_add_now(TS_END_ROMSTAGE); #endif diff --git a/src/mainboard/google/veyron_pinky/romstage.c b/src/mainboard/google/veyron_pinky/romstage.c index b536391..5031ad9d 100644 --- a/src/mainboard/google/veyron_pinky/romstage.c +++ b/src/mainboard/google/veyron_pinky/romstage.c @@ -94,11 +94,7 @@ static void sdmmc_power_off(void) void main(void) { #if CONFIG_COLLECT_TIMESTAMPS - uint64_t start_romstage_time; - uint64_t before_dram_time; - uint64_t after_dram_time; - uint64_t base_time = timestamp_get(); - start_romstage_time = timestamp_get(); + timestamp_add_now(TS_START_ROMSTAGE); #endif console_init(); @@ -111,11 +107,11 @@ void main(void) /* vdd_log 1200mv is enough for ddr run 666Mhz */ regulate_vdd_log(1200); #if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = timestamp_get(); + timestamp_add_now(TS_BEFORE_INITRAM); #endif sdram_init(get_sdram_config()); #if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = timestamp_get(); + timestamp_add_now(TS_AFTER_INITRAM); #endif /* Now that DRAM is up, add mappings for it and DMA coherency buffer. */ @@ -127,10 +123,6 @@ void main(void) cbmem_initialize_empty(); #if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time); - timestamp_add(TS_AFTER_INITRAM, after_dram_time); timestamp_add_now(TS_END_ROMSTAGE); #endif diff --git a/src/mainboard/google/veyron_rialto/romstage.c b/src/mainboard/google/veyron_rialto/romstage.c index 68ab661..ffdfdb0 100644 --- a/src/mainboard/google/veyron_rialto/romstage.c +++ b/src/mainboard/google/veyron_rialto/romstage.c @@ -87,11 +87,7 @@ static void sdmmc_power_off(void) void main(void) { #if CONFIG_COLLECT_TIMESTAMPS - uint64_t start_romstage_time; - uint64_t before_dram_time; - uint64_t after_dram_time; - uint64_t base_time = timestamp_get(); - start_romstage_time = timestamp_get(); + timestamp_add_now(TS_START_ROMSTAGE); #endif console_init(); @@ -104,11 +100,11 @@ void main(void) /* vdd_log 1200mv is enough for ddr run 666Mhz */ regulate_vdd_log(1200); #if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = timestamp_get(); + timestamp_add_now(TS_BEFORE_INITRAM); #endif sdram_init(get_sdram_config()); #if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = timestamp_get(); + timestamp_add_now(TS_AFTER_INITRAM); #endif /* Now that DRAM is up, add mappings for it and DMA coherency buffer. */ @@ -120,10 +116,6 @@ void main(void) cbmem_initialize_empty(); #if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time); - timestamp_add(TS_AFTER_INITRAM, after_dram_time); timestamp_add_now(TS_END_ROMSTAGE); #endif diff --git a/src/mainboard/google/veyron_romy/romstage.c b/src/mainboard/google/veyron_romy/romstage.c index 9f7b1a5..3ea50b6 100644 --- a/src/mainboard/google/veyron_romy/romstage.c +++ b/src/mainboard/google/veyron_romy/romstage.c @@ -80,11 +80,7 @@ static void configure_l2ctlr(void) void main(void) { #if CONFIG_COLLECT_TIMESTAMPS - uint64_t start_romstage_time; - uint64_t before_dram_time; - uint64_t after_dram_time; - uint64_t base_time = timestamp_get(); - start_romstage_time = timestamp_get(); + timestamp_add_now(TS_START_ROMSTAGE); #endif console_init(); @@ -94,11 +90,11 @@ void main(void) /* vdd_log 1200mv is enough for ddr run 666Mhz */ regulate_vdd_log(1200); #if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = timestamp_get(); + timestamp_add_now(TS_BEFORE_INITRAM); #endif sdram_init(get_sdram_config()); #if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = timestamp_get(); + timestamp_add_now(TS_AFTER_INITRAM); #endif /* Now that DRAM is up, add mappings for it and DMA coherency buffer. */ @@ -110,10 +106,6 @@ void main(void) cbmem_initialize_empty(); #if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time); - timestamp_add(TS_AFTER_INITRAM, after_dram_time); timestamp_add_now(TS_END_ROMSTAGE); #endif diff --git a/src/mainboard/google/veyron_speedy/romstage.c b/src/mainboard/google/veyron_speedy/romstage.c index 68ab661..ffdfdb0 100644 --- a/src/mainboard/google/veyron_speedy/romstage.c +++ b/src/mainboard/google/veyron_speedy/romstage.c @@ -87,11 +87,7 @@ static void sdmmc_power_off(void) void main(void) { #if CONFIG_COLLECT_TIMESTAMPS - uint64_t start_romstage_time; - uint64_t before_dram_time; - uint64_t after_dram_time; - uint64_t base_time = timestamp_get(); - start_romstage_time = timestamp_get(); + timestamp_add_now(TS_START_ROMSTAGE); #endif console_init(); @@ -104,11 +100,11 @@ void main(void) /* vdd_log 1200mv is enough for ddr run 666Mhz */ regulate_vdd_log(1200); #if CONFIG_COLLECT_TIMESTAMPS - before_dram_time = timestamp_get(); + timestamp_add_now(TS_BEFORE_INITRAM); #endif sdram_init(get_sdram_config()); #if CONFIG_COLLECT_TIMESTAMPS - after_dram_time = timestamp_get(); + timestamp_add_now(TS_AFTER_INITRAM); #endif /* Now that DRAM is up, add mappings for it and DMA coherency buffer. */ @@ -120,10 +116,6 @@ void main(void) cbmem_initialize_empty(); #if CONFIG_COLLECT_TIMESTAMPS - timestamp_init(base_time); - timestamp_add(TS_START_ROMSTAGE, start_romstage_time); - timestamp_add(TS_BEFORE_INITRAM, before_dram_time); - timestamp_add(TS_AFTER_INITRAM, after_dram_time); timestamp_add_now(TS_END_ROMSTAGE); #endif diff --git a/src/soc/rockchip/rk3288/Kconfig b/src/soc/rockchip/rk3288/Kconfig index 3a4712e..1800b16 100644 --- a/src/soc/rockchip/rk3288/Kconfig +++ b/src/soc/rockchip/rk3288/Kconfig @@ -24,6 +24,7 @@ config SOC_ROCKCHIP_RK3288 select ARCH_VERSTAGE_ARMV7 select ARCH_ROMSTAGE_ARMV7 select ARCH_RAMSTAGE_ARMV7 + select HAS_PRECBMEM_TIMESTAMP_REGION select HAVE_MONOTONIC_TIMER select GENERIC_UDELAY select HAVE_UART_SPECIAL diff --git a/src/soc/rockchip/rk3288/bootblock.c b/src/soc/rockchip/rk3288/bootblock.c index d60c860..6ba3230 100644 --- a/src/soc/rockchip/rk3288/bootblock.c +++ b/src/soc/rockchip/rk3288/bootblock.c @@ -26,9 +26,12 @@ #include <soc/grf.h> #include <soc/timer.h> #include <symbols.h> +#include <timestamp.h> void bootblock_soc_init(void) { + timestamp_early_init(timestamp_get()); + rkclk_init(); mmu_init(); diff --git a/src/soc/rockchip/rk3288/include/soc/memlayout.ld b/src/soc/rockchip/rk3288/include/soc/memlayout.ld index cd484c8..0b75932 100644 --- a/src/soc/rockchip/rk3288/include/soc/memlayout.ld +++ b/src/soc/rockchip/rk3288/include/soc/memlayout.ld @@ -41,6 +41,7 @@ SECTIONS OVERLAP_VERSTAGE_ROMSTAGE(0xFF70C800, 41K) TTB_SUBTABLES(0xFF716C00, 1K) PRERAM_CBFS_CACHE(0xFF717000, 1K) + TIMESTAMP(0xFF717400, 0x180) STACK(0xFF717580, 3K - 0x180) SRAM_END(0xFF718000)

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Patch set updated for coreboot: timestamp: remove conditional #if CONFIG_COLLECT_TIMESTAMPS
by Patrick Georgi 02 Jul '15

02 Jul '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10742 -gerrit commit 51c1342e6d91e9a461809ce1f279c6dbf6f18a52 Author: Aaron Durbin <adurbin(a)chromium.org> Date: Thu Nov 6 09:58:07 2014 -0600 timestamp: remove conditional #if CONFIG_COLLECT_TIMESTAMPS Empty functions are provided when !CONFIG_COLLECT_TIMESTAMPS so stop guarding the compilation. BUG=None BRANCH=None TEST=Built Original-Change-Id: Ib0f23e1204e048a9b928568da02e9661f6aa0a35 Original-Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> Original-Reviewed-on: https://chromium-review.googlesource.com/228190 Original-Reviewed-by: Furquan Shaikh <furquan(a)chromium.org> Original-Reviewed-by: Julius Werner <jwerner(a)chromium.org> (cherry picked from commit 9aa69fd43d77f5f7acdc9f361016c595dd16104e) Signed-off-by: Marc Jones <marc.jones(a)se-eng.com> Change-Id: I14418c8ef3ccb57ac6fce05b422e1c21b1d38392 --- src/arch/x86/boot/acpi.c | 4 ---- src/mainboard/google/cosmos/romstage.c | 15 ++++----------- src/mainboard/google/veyron_brain/romstage.c | 11 +++-------- src/mainboard/google/veyron_danger/romstage.c | 11 +++-------- src/mainboard/google/veyron_jerry/romstage.c | 12 ++++-------- src/mainboard/google/veyron_mickey/romstage.c | 11 +++-------- src/mainboard/google/veyron_mighty/romstage.c | 11 +++-------- src/mainboard/google/veyron_minnie/romstage.c | 12 ++++-------- src/mainboard/google/veyron_pinky/romstage.c | 14 ++++++-------- src/mainboard/google/veyron_rialto/romstage.c | 11 +++-------- src/mainboard/google/veyron_romy/romstage.c | 11 +++-------- src/mainboard/google/veyron_speedy/romstage.c | 12 ++++-------- src/southbridge/intel/bd82x6x/bootblock.c | 3 +-- src/southbridge/intel/fsp_bd82x6x/bootblock.c | 3 +-- src/southbridge/intel/i82801gx/bootblock.c | 3 +-- src/southbridge/intel/lynxpoint/bootblock.c | 3 +-- 16 files changed, 44 insertions(+), 103 deletions(-) diff --git a/src/arch/x86/boot/acpi.c b/src/arch/x86/boot/acpi.c index cf33e40..134e437 100644 --- a/src/arch/x86/boot/acpi.c +++ b/src/arch/x86/boot/acpi.c @@ -34,9 +34,7 @@ #include <cpu/x86/lapic_def.h> #include <cpu/cpu.h> #include <cbfs.h> -#if CONFIG_COLLECT_TIMESTAMPS #include <timestamp.h> -#endif #include <romstage_handoff.h> /* FIXME: Kconfig doesn't support overridable defaults :-( */ @@ -1124,9 +1122,7 @@ void acpi_jump_to_wakeup(void *vector) /* Copy wakeup trampoline in place. */ memcpy((void *)WAKEUP_BASE, &__wakeup, __wakeup_size); -#if CONFIG_COLLECT_TIMESTAMPS timestamp_add_now(TS_ACPI_WAKE_JUMP); -#endif acpi_do_wakeup((u32)vector, acpi_backup_memory, CONFIG_RAMBASE, HIGH_MEMORY_SAVE); diff --git a/src/mainboard/google/cosmos/romstage.c b/src/mainboard/google/cosmos/romstage.c index 0988bee..e5fa67e 100644 --- a/src/mainboard/google/cosmos/romstage.c +++ b/src/mainboard/google/cosmos/romstage.c @@ -37,37 +37,30 @@ void main(void) { -#if CONFIG_COLLECT_TIMESTAMPS uint64_t start_romstage_time; uint64_t before_dram_time; uint64_t after_dram_time; uint64_t base_time = timestamp_get(); start_romstage_time = timestamp_get(); -#endif console_init(); -#if CONFIG_COLLECT_TIMESTAMPS before_dram_time = timestamp_get(); -#endif + sdram_init(); -#if CONFIG_COLLECT_TIMESTAMPS + after_dram_time = timestamp_get(); -#endif + mmu_init(); mmu_config_range(0, 4096, DCACHE_OFF); dcache_mmu_enable(); cbmem_initialize_empty(); -#if CONFIG_COLLECT_TIMESTAMPS + timestamp_init(base_time); timestamp_add(TS_START_ROMSTAGE, start_romstage_time); timestamp_add(TS_BEFORE_INITRAM, before_dram_time); timestamp_add(TS_AFTER_INITRAM, after_dram_time); -#endif - -#if CONFIG_COLLECT_TIMESTAMPS timestamp_add_now(TS_END_ROMSTAGE); -#endif run_ramstage(); } diff --git a/src/mainboard/google/veyron_brain/romstage.c b/src/mainboard/google/veyron_brain/romstage.c index 3ea50b6..f243235 100644 --- a/src/mainboard/google/veyron_brain/romstage.c +++ b/src/mainboard/google/veyron_brain/romstage.c @@ -79,9 +79,7 @@ static void configure_l2ctlr(void) void main(void) { -#if CONFIG_COLLECT_TIMESTAMPS timestamp_add_now(TS_START_ROMSTAGE); -#endif console_init(); configure_l2ctlr(); @@ -89,13 +87,12 @@ void main(void) /* vdd_log 1200mv is enough for ddr run 666Mhz */ regulate_vdd_log(1200); -#if CONFIG_COLLECT_TIMESTAMPS + timestamp_add_now(TS_BEFORE_INITRAM); -#endif + sdram_init(get_sdram_config()); -#if CONFIG_COLLECT_TIMESTAMPS + timestamp_add_now(TS_AFTER_INITRAM); -#endif /* Now that DRAM is up, add mappings for it and DMA coherency buffer. */ mmu_config_range((uintptr_t)_dram/MiB, @@ -105,9 +102,7 @@ void main(void) cbmem_initialize_empty(); -#if CONFIG_COLLECT_TIMESTAMPS timestamp_add_now(TS_END_ROMSTAGE); -#endif run_ramstage(); } diff --git a/src/mainboard/google/veyron_danger/romstage.c b/src/mainboard/google/veyron_danger/romstage.c index 0328e95..e9857b8 100644 --- a/src/mainboard/google/veyron_danger/romstage.c +++ b/src/mainboard/google/veyron_danger/romstage.c @@ -80,9 +80,7 @@ static void configure_l2ctlr(void) void main(void) { -#if CONFIG_COLLECT_TIMESTAMPS timestamp_add_now(TS_START_ROMSTAGE); -#endif console_init(); configure_l2ctlr(); @@ -93,13 +91,12 @@ void main(void) /* vdd_log 1200mv is enough for ddr run 666Mhz */ regulate_vdd_log(1200); -#if CONFIG_COLLECT_TIMESTAMPS + timestamp_add_now(TS_BEFORE_INITRAM); -#endif + sdram_init(get_sdram_config()); -#if CONFIG_COLLECT_TIMESTAMPS + timestamp_add_now(TS_AFTER_INITRAM); -#endif /* Now that DRAM is up, add mappings for it and DMA coherency buffer. */ mmu_config_range((uintptr_t)_dram/MiB, @@ -109,9 +106,7 @@ void main(void) cbmem_initialize_empty(); -#if CONFIG_COLLECT_TIMESTAMPS timestamp_add_now(TS_END_ROMSTAGE); -#endif run_ramstage(); } diff --git a/src/mainboard/google/veyron_jerry/romstage.c b/src/mainboard/google/veyron_jerry/romstage.c index 06eabe0..fb6e631 100644 --- a/src/mainboard/google/veyron_jerry/romstage.c +++ b/src/mainboard/google/veyron_jerry/romstage.c @@ -85,9 +85,7 @@ static void sdmmc_power_off(void) void main(void) { -#if CONFIG_COLLECT_TIMESTAMPS timestamp_add_now(TS_START_ROMSTAGE); -#endif console_init(); configure_l2ctlr(); @@ -98,13 +96,12 @@ void main(void) /* vdd_log 1200mv is enough for ddr run 666Mhz */ regulate_vdd_log(1200); -#if CONFIG_COLLECT_TIMESTAMPS + timestamp_add_now(TS_BEFORE_INITRAM); -#endif + sdram_init(get_sdram_config()); -#if CONFIG_COLLECT_TIMESTAMPS + timestamp_add_now(TS_AFTER_INITRAM); -#endif /* Now that DRAM is up, add mappings for it and DMA coherency buffer. */ mmu_config_range((uintptr_t)_dram/MiB, @@ -114,9 +111,8 @@ void main(void) cbmem_initialize_empty(); -#if CONFIG_COLLECT_TIMESTAMPS + timestamp_add_now(TS_END_ROMSTAGE); -#endif run_ramstage(); } diff --git a/src/mainboard/google/veyron_mickey/romstage.c b/src/mainboard/google/veyron_mickey/romstage.c index 3ea50b6..f243235 100644 --- a/src/mainboard/google/veyron_mickey/romstage.c +++ b/src/mainboard/google/veyron_mickey/romstage.c @@ -79,9 +79,7 @@ static void configure_l2ctlr(void) void main(void) { -#if CONFIG_COLLECT_TIMESTAMPS timestamp_add_now(TS_START_ROMSTAGE); -#endif console_init(); configure_l2ctlr(); @@ -89,13 +87,12 @@ void main(void) /* vdd_log 1200mv is enough for ddr run 666Mhz */ regulate_vdd_log(1200); -#if CONFIG_COLLECT_TIMESTAMPS + timestamp_add_now(TS_BEFORE_INITRAM); -#endif + sdram_init(get_sdram_config()); -#if CONFIG_COLLECT_TIMESTAMPS + timestamp_add_now(TS_AFTER_INITRAM); -#endif /* Now that DRAM is up, add mappings for it and DMA coherency buffer. */ mmu_config_range((uintptr_t)_dram/MiB, @@ -105,9 +102,7 @@ void main(void) cbmem_initialize_empty(); -#if CONFIG_COLLECT_TIMESTAMPS timestamp_add_now(TS_END_ROMSTAGE); -#endif run_ramstage(); } diff --git a/src/mainboard/google/veyron_mighty/romstage.c b/src/mainboard/google/veyron_mighty/romstage.c index 06eabe0..5ccbe3e 100644 --- a/src/mainboard/google/veyron_mighty/romstage.c +++ b/src/mainboard/google/veyron_mighty/romstage.c @@ -85,9 +85,7 @@ static void sdmmc_power_off(void) void main(void) { -#if CONFIG_COLLECT_TIMESTAMPS timestamp_add_now(TS_START_ROMSTAGE); -#endif console_init(); configure_l2ctlr(); @@ -98,13 +96,12 @@ void main(void) /* vdd_log 1200mv is enough for ddr run 666Mhz */ regulate_vdd_log(1200); -#if CONFIG_COLLECT_TIMESTAMPS + timestamp_add_now(TS_BEFORE_INITRAM); -#endif + sdram_init(get_sdram_config()); -#if CONFIG_COLLECT_TIMESTAMPS + timestamp_add_now(TS_AFTER_INITRAM); -#endif /* Now that DRAM is up, add mappings for it and DMA coherency buffer. */ mmu_config_range((uintptr_t)_dram/MiB, @@ -114,9 +111,7 @@ void main(void) cbmem_initialize_empty(); -#if CONFIG_COLLECT_TIMESTAMPS timestamp_add_now(TS_END_ROMSTAGE); -#endif run_ramstage(); } diff --git a/src/mainboard/google/veyron_minnie/romstage.c b/src/mainboard/google/veyron_minnie/romstage.c index ffdfdb0..07170b9 100644 --- a/src/mainboard/google/veyron_minnie/romstage.c +++ b/src/mainboard/google/veyron_minnie/romstage.c @@ -86,9 +86,7 @@ static void sdmmc_power_off(void) void main(void) { -#if CONFIG_COLLECT_TIMESTAMPS timestamp_add_now(TS_START_ROMSTAGE); -#endif console_init(); configure_l2ctlr(); @@ -99,13 +97,13 @@ void main(void) /* vdd_log 1200mv is enough for ddr run 666Mhz */ regulate_vdd_log(1200); -#if CONFIG_COLLECT_TIMESTAMPS + timestamp_add_now(TS_BEFORE_INITRAM); -#endif + sdram_init(get_sdram_config()); -#if CONFIG_COLLECT_TIMESTAMPS + timestamp_add_now(TS_AFTER_INITRAM); -#endif + /* Now that DRAM is up, add mappings for it and DMA coherency buffer. */ mmu_config_range((uintptr_t)_dram/MiB, @@ -115,9 +113,7 @@ void main(void) cbmem_initialize_empty(); -#if CONFIG_COLLECT_TIMESTAMPS timestamp_add_now(TS_END_ROMSTAGE); -#endif run_ramstage(); } diff --git a/src/mainboard/google/veyron_pinky/romstage.c b/src/mainboard/google/veyron_pinky/romstage.c index 5031ad9d..492c0f0 100644 --- a/src/mainboard/google/veyron_pinky/romstage.c +++ b/src/mainboard/google/veyron_pinky/romstage.c @@ -93,9 +93,7 @@ static void sdmmc_power_off(void) void main(void) { -#if CONFIG_COLLECT_TIMESTAMPS timestamp_add_now(TS_START_ROMSTAGE); -#endif console_init(); configure_l2ctlr(); @@ -106,13 +104,13 @@ void main(void) /* vdd_log 1200mv is enough for ddr run 666Mhz */ regulate_vdd_log(1200); -#if CONFIG_COLLECT_TIMESTAMPS + timestamp_add_now(TS_BEFORE_INITRAM); -#endif + sdram_init(get_sdram_config()); -#if CONFIG_COLLECT_TIMESTAMPS + timestamp_add_now(TS_AFTER_INITRAM); -#endif + /* Now that DRAM is up, add mappings for it and DMA coherency buffer. */ mmu_config_range((uintptr_t)_dram/MiB, @@ -122,9 +120,9 @@ void main(void) cbmem_initialize_empty(); -#if CONFIG_COLLECT_TIMESTAMPS + timestamp_add_now(TS_END_ROMSTAGE); -#endif + run_ramstage(); } diff --git a/src/mainboard/google/veyron_rialto/romstage.c b/src/mainboard/google/veyron_rialto/romstage.c index ffdfdb0..9cdacc3 100644 --- a/src/mainboard/google/veyron_rialto/romstage.c +++ b/src/mainboard/google/veyron_rialto/romstage.c @@ -86,9 +86,7 @@ static void sdmmc_power_off(void) void main(void) { -#if CONFIG_COLLECT_TIMESTAMPS timestamp_add_now(TS_START_ROMSTAGE); -#endif console_init(); configure_l2ctlr(); @@ -99,13 +97,12 @@ void main(void) /* vdd_log 1200mv is enough for ddr run 666Mhz */ regulate_vdd_log(1200); -#if CONFIG_COLLECT_TIMESTAMPS + timestamp_add_now(TS_BEFORE_INITRAM); -#endif + sdram_init(get_sdram_config()); -#if CONFIG_COLLECT_TIMESTAMPS + timestamp_add_now(TS_AFTER_INITRAM); -#endif /* Now that DRAM is up, add mappings for it and DMA coherency buffer. */ mmu_config_range((uintptr_t)_dram/MiB, @@ -115,9 +112,7 @@ void main(void) cbmem_initialize_empty(); -#if CONFIG_COLLECT_TIMESTAMPS timestamp_add_now(TS_END_ROMSTAGE); -#endif run_ramstage(); } diff --git a/src/mainboard/google/veyron_romy/romstage.c b/src/mainboard/google/veyron_romy/romstage.c index 3ea50b6..f243235 100644 --- a/src/mainboard/google/veyron_romy/romstage.c +++ b/src/mainboard/google/veyron_romy/romstage.c @@ -79,9 +79,7 @@ static void configure_l2ctlr(void) void main(void) { -#if CONFIG_COLLECT_TIMESTAMPS timestamp_add_now(TS_START_ROMSTAGE); -#endif console_init(); configure_l2ctlr(); @@ -89,13 +87,12 @@ void main(void) /* vdd_log 1200mv is enough for ddr run 666Mhz */ regulate_vdd_log(1200); -#if CONFIG_COLLECT_TIMESTAMPS + timestamp_add_now(TS_BEFORE_INITRAM); -#endif + sdram_init(get_sdram_config()); -#if CONFIG_COLLECT_TIMESTAMPS + timestamp_add_now(TS_AFTER_INITRAM); -#endif /* Now that DRAM is up, add mappings for it and DMA coherency buffer. */ mmu_config_range((uintptr_t)_dram/MiB, @@ -105,9 +102,7 @@ void main(void) cbmem_initialize_empty(); -#if CONFIG_COLLECT_TIMESTAMPS timestamp_add_now(TS_END_ROMSTAGE); -#endif run_ramstage(); } diff --git a/src/mainboard/google/veyron_speedy/romstage.c b/src/mainboard/google/veyron_speedy/romstage.c index ffdfdb0..07170b9 100644 --- a/src/mainboard/google/veyron_speedy/romstage.c +++ b/src/mainboard/google/veyron_speedy/romstage.c @@ -86,9 +86,7 @@ static void sdmmc_power_off(void) void main(void) { -#if CONFIG_COLLECT_TIMESTAMPS timestamp_add_now(TS_START_ROMSTAGE); -#endif console_init(); configure_l2ctlr(); @@ -99,13 +97,13 @@ void main(void) /* vdd_log 1200mv is enough for ddr run 666Mhz */ regulate_vdd_log(1200); -#if CONFIG_COLLECT_TIMESTAMPS + timestamp_add_now(TS_BEFORE_INITRAM); -#endif + sdram_init(get_sdram_config()); -#if CONFIG_COLLECT_TIMESTAMPS + timestamp_add_now(TS_AFTER_INITRAM); -#endif + /* Now that DRAM is up, add mappings for it and DMA coherency buffer. */ mmu_config_range((uintptr_t)_dram/MiB, @@ -115,9 +113,7 @@ void main(void) cbmem_initialize_empty(); -#if CONFIG_COLLECT_TIMESTAMPS timestamp_add_now(TS_END_ROMSTAGE); -#endif run_ramstage(); } diff --git a/src/southbridge/intel/bd82x6x/bootblock.c b/src/southbridge/intel/bd82x6x/bootblock.c index 4df6bb5..18532df 100644 --- a/src/southbridge/intel/bd82x6x/bootblock.c +++ b/src/southbridge/intel/bd82x6x/bootblock.c @@ -86,9 +86,8 @@ static void set_spi_speed(void) static void bootblock_southbridge_init(void) { -#if CONFIG_COLLECT_TIMESTAMPS store_initial_timestamp(); -#endif + enable_spi_prefetch(); enable_port80_on_lpc(); set_spi_speed(); diff --git a/src/southbridge/intel/fsp_bd82x6x/bootblock.c b/src/southbridge/intel/fsp_bd82x6x/bootblock.c index 46aa58f..8f6ddbc 100644 --- a/src/southbridge/intel/fsp_bd82x6x/bootblock.c +++ b/src/southbridge/intel/fsp_bd82x6x/bootblock.c @@ -87,9 +87,8 @@ static void set_spi_speed(void) static void bootblock_southbridge_init(void) { -#if CONFIG_COLLECT_TIMESTAMPS store_initial_timestamp(); -#endif + enable_spi_prefetch(); enable_port80_on_lpc(); set_spi_speed(); diff --git a/src/southbridge/intel/i82801gx/bootblock.c b/src/southbridge/intel/i82801gx/bootblock.c index 64c4410..dde1ae9 100644 --- a/src/southbridge/intel/i82801gx/bootblock.c +++ b/src/southbridge/intel/i82801gx/bootblock.c @@ -47,9 +47,8 @@ static void enable_spi_prefetch(void) static void bootblock_southbridge_init(void) { -#if CONFIG_COLLECT_TIMESTAMPS store_initial_timestamp(); -#endif + enable_spi_prefetch(); /* Enable RCBA */ diff --git a/src/southbridge/intel/lynxpoint/bootblock.c b/src/southbridge/intel/lynxpoint/bootblock.c index 6727173..8c2133b 100644 --- a/src/southbridge/intel/lynxpoint/bootblock.c +++ b/src/southbridge/intel/lynxpoint/bootblock.c @@ -87,9 +87,8 @@ static void set_spi_speed(void) static void bootblock_southbridge_init(void) { -#if CONFIG_COLLECT_TIMESTAMPS store_initial_timestamp(); -#endif + map_rcba(); enable_spi_prefetch(); enable_port80_on_lpc();

1 0

Patch set updated for coreboot: timestamp: Make timestamp library more flexible and intelligent
by Patrick Georgi 02 Jul '15

02 Jul '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10735 -gerrit commit 28b81406d937301672473fba98860e20eb95f924 Author: Furquan Shaikh <furquan(a)google.com> Date: Wed Oct 15 15:17:49 2014 -0700 timestamp: Make timestamp library more flexible and intelligent Add support for: 1) Using timestamps in bootblock and verstage 2) Allowing the timestamps to be stashed into _timestamp region so that they can be used across multiple stages 3) Performing operations over the timestamps in _timestamp region Instead of having two separate APIs for stashing and adding timestamps, let the timestamp library decide on its own where to save depending on timestamp cache status. Now the sequence of operations would be something like: timestamp_init / timestamp_early_init : Set the base time timestamp_add / timestamp_add_now cbmem_initialize : It internally calls timestamp_sync timestamp_add / timestamp_add_now BUG=chrome-os-partner:32973 BRANCH=None TEST=Compiles successfully for ryu and samus. cbmem -t on ryu works fine. Original-Change-Id: Ie5ffda3112d626068bd1904afcc5a09bc4916d16 Original-Signed-off-by: Furquan Shaikh <furquan(a)google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/224024 Original-Reviewed-by: Furquan Shaikh <furquan(a)chromium.org> Original-Commit-Queue: Furquan Shaikh <furquan(a)chromium.org> Original-Tested-by: Furquan Shaikh <furquan(a)chromium.org> (cherry picked from commit 2f6b472984f4971ece172b789aab3bc82afa8a9d) Signed-off-by: Marc Jones <marc.jones(a)se-eng.com> Change-Id: I4d2ffc99277be6c248c8c70149dc14334a1f536a --- src/arch/x86/Makefile.inc | 3 +- src/arch/x86/init/romstage.ld | 5 + src/include/timestamp.h | 25 ++++ src/lib/timestamp.c | 276 +++++++++++++++++++++++++++++++----------- 4 files changed, 234 insertions(+), 75 deletions(-) diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index f502bbe..dcb9ff0 100644 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -225,7 +225,8 @@ $(objgenerated)/romstage_null.ld: $(obj)/config.h $$(filter %.ld,$$(romstage-src rm -f $@ printf "ROMSTAGE_BASE = 0x0;\n" > $@.tmp printf '$(foreach ldscript,$(^),#include "$(ldscript)"\n)' >> $@.tmp - $(CC_romstage) $(PREPROCESS_ONLY) $@.tmp > $@ + $(CC_romstage) $(PREPROCESS_ONLY) $(CPPFLAGS_common) $@.tmp > $@ + $(objgenerated)/romstage.ld: $(objgenerated)/romstage_null.ld $(objcbfs)/base_xip.txt @printf " GEN $(subst $(obj)/,,$(@))\n" diff --git a/src/arch/x86/init/romstage.ld b/src/arch/x86/init/romstage.ld index 7b9cb6a..db1c8ee 100644 --- a/src/arch/x86/init/romstage.ld +++ b/src/arch/x86/init/romstage.ld @@ -53,6 +53,11 @@ SECTIONS .car.data . (NOLOAD) : { _car_data_start = .; *(.car.global_data); +#if IS_ENABLED(CONFIG_HAS_PRECBMEM_TIMESTAMP_REGION) + _timestamp = .; + . = . + 0x100; + _etimestamp = .; +#endif _car_data_end = .; /* The preram cbmem console area comes last to take advantage * of a zero-sized array to hold the memconsole contents. diff --git a/src/include/timestamp.h b/src/include/timestamp.h index a248ea4..0a13209 100644 --- a/src/include/timestamp.h +++ b/src/include/timestamp.h @@ -89,10 +89,35 @@ enum timestamp_id { }; #if CONFIG_COLLECT_TIMESTAMPS && (CONFIG_EARLY_CBMEM_INIT || !defined(__PRE_RAM__)) +/* + * Order of usage of timestamp library is: + * Call timestamp_early_init / timestamp_init to set base time before any + * timestamp_add function is called. timestamp_early_init also ensures that the + * cache is valid in _timestamp region. + * After this, timestamp_add / timestamp_add_now can be used to record + * timestamps. Sync will be automatically taken care of by cbmem_initialize. + */ +/* + * Initialize the cache to a valid state and set the base time. + * This function is used before DRAM is set up so that the timestamp cache can + * be initialized in _timestamp region. + * Both, timestamp_init and timestamp_early_init reset the cbmem state to + * "timestamp table reset required". Thus, whenever a timestamp_add or + * timestamp_sync is done to add new entries into the cbmem timestamp table, it + * first resets the table to 0 entries. + */ +void timestamp_early_init(uint64_t base); +/* Initialize the base time for timestamps and mark cache as valid. */ void timestamp_init(uint64_t base); +/* + * Add a new timestamp. Depending on cbmem is available or not, this timestamp + * will be stored to cbmem / timestamp cache. + */ void timestamp_add(enum timestamp_id id, uint64_t ts_time); +/* Calls timestamp_add with current timestamp. */ void timestamp_add_now(enum timestamp_id id); #else +#define timestamp_early_init(base) #define timestamp_init(base) #define timestamp_add(id, time) #define timestamp_add_now(id) diff --git a/src/lib/timestamp.c b/src/lib/timestamp.c index 0c41ea2..91c7117 100644 --- a/src/lib/timestamp.c +++ b/src/lib/timestamp.c @@ -17,10 +17,12 @@ * Foundation, Inc. */ +#include <assert.h> #include <stddef.h> #include <stdint.h> #include <console/console.h> #include <cbmem.h> +#include <symbols.h> #include <timer.h> #include <timestamp.h> #include <arch/early_variables.h> @@ -29,27 +31,87 @@ #define MAX_TIMESTAMPS 60 -static struct timestamp_table* ts_table_p CAR_GLOBAL = NULL; -static uint64_t ts_basetime CAR_GLOBAL = 0; +#define MAX_TIMESTAMP_CACHE 16 -static void timestamp_stash(enum timestamp_id id, uint64_t ts_time); +struct __attribute__((__packed__)) timestamp_cache { + uint16_t cache_state; + uint16_t cbmem_state; + struct timestamp_table table; + struct timestamp_entry entries[MAX_TIMESTAMP_CACHE]; +}; -static void timestamp_real_init(uint64_t base) +#define USE_TIMESTAMP_REGION \ + (IS_ENABLED(CONFIG_HAS_PRECBMEM_TIMESTAMP_REGION) && \ + defined(__PRE_RAM__)) + +#define USE_LOCAL_TIMESTAMP_CACHE (!defined(__PRE_RAM__)) + +#define HAS_CBMEM (ENV_ROMSTAGE || ENV_RAMSTAGE) + +#if USE_LOCAL_TIMESTAMP_CACHE +static struct timestamp_cache timestamp_cache __attribute__((unused)); +#endif + +enum { + TIMESTAMP_CACHE_UNINITIALIZED = 0, + TIMESTAMP_CACHE_INITIALIZED, + TIMESTAMP_CACHE_NOT_NEEDED, +}; + +enum { + TIMESTAMP_CBMEM_RESET_NOT_REQD = 0, + TIMESTAMP_CBMEM_RESET_REQD, +}; + +static void timestamp_cache_init(struct timestamp_cache *ts_cache, + uint64_t base, uint16_t cbmem_state) +{ + ts_cache->table.num_entries = 0; + ts_cache->table.max_entries = MAX_TIMESTAMP_CACHE; + ts_cache->table.base_time = base; + ts_cache->cache_state = TIMESTAMP_CACHE_INITIALIZED; + ts_cache->cbmem_state = cbmem_state; +} + +static struct timestamp_cache *timestamp_cache_get(void) +{ + struct timestamp_cache *ts_cache = NULL; + +#if IS_ENABLED(CONFIG_HAS_PRECBMEM_TIMESTAMP_REGION) + if (_timestamp_size < sizeof(*ts_cache)) + BUG(); + ts_cache = car_get_var_ptr((void *)_timestamp); +#elif USE_LOCAL_TIMESTAMP_CACHE + ts_cache = &timestamp_cache; +#endif + + if (ts_cache && ts_cache->cache_state == TIMESTAMP_CACHE_UNINITIALIZED) + timestamp_cache_init(ts_cache, 0, + TIMESTAMP_CBMEM_RESET_NOT_REQD); + + return ts_cache; +} + +static struct timestamp_table *timestamp_alloc_cbmem_table(void) { struct timestamp_table* tst; + tst = cbmem_find(CBMEM_ID_TIMESTAMP); + if (tst != NULL) + return tst; + printk(BIOS_ERR, "creating new cbmem entry for timestamps\n\n\n"); tst = cbmem_add(CBMEM_ID_TIMESTAMP, sizeof(struct timestamp_table) + MAX_TIMESTAMPS * sizeof(struct timestamp_entry)); if (!tst) - return; + return NULL; - tst->base_time = base; + tst->base_time = 0; tst->max_entries = MAX_TIMESTAMPS; tst->num_entries = 0; - car_set_var(ts_table_p, tst); + return tst; } /* Determine if one should proceed into timestamp code. This is for protecting @@ -64,112 +126,178 @@ static int timestamp_should_run(void) return 1; } -void timestamp_add(enum timestamp_id id, uint64_t ts_time) +static struct timestamp_table *timestamp_table_get(void) { - struct timestamp_entry *tse; - struct timestamp_table *ts_table = NULL; + MAYBE_STATIC struct timestamp_table *ts_table = NULL; + struct timestamp_cache *ts_cache; if (!timestamp_should_run()) - return; + return NULL; - ts_table = car_get_var(ts_table_p); - if (!ts_table) { - timestamp_stash(id, ts_time); - return; + ts_cache = timestamp_cache_get(); + + if (ts_cache == NULL) { +#if HAS_CBMEM + ts_table = cbmem_find(CBMEM_ID_TIMESTAMP); +#endif + return ts_table; } - if (ts_table->num_entries == ts_table->max_entries) + + if (ts_cache->cache_state != TIMESTAMP_CACHE_NOT_NEEDED) + return &ts_cache->table; + +#if HAS_CBMEM + if (ts_cache->cbmem_state == TIMESTAMP_CBMEM_RESET_REQD) { + ts_table = timestamp_alloc_cbmem_table(); + ts_cache->cbmem_state = TIMESTAMP_CBMEM_RESET_NOT_REQD; + } + + if (!ts_table) + ts_table = cbmem_find(CBMEM_ID_TIMESTAMP); +#endif + + return ts_table; +} + +static void timestamp_add_table_entry(struct timestamp_table *ts_table, + enum timestamp_id id, uint64_t ts_time) +{ + struct timestamp_entry *tse; + + if (ts_table->num_entries == ts_table->max_entries) { + printk(BIOS_ERR, "ERROR: Timestamp table full\n"); return; + } tse = &ts_table->entries[ts_table->num_entries++]; tse->entry_id = id; tse->entry_stamp = ts_time - ts_table->base_time; } -void timestamp_add_now(enum timestamp_id id) +void timestamp_early_init(uint64_t base) { - timestamp_add(id, timestamp_get()); + struct timestamp_cache *ts_cache; + ts_cache = timestamp_cache_get(); + if (ts_cache == NULL) + BUG(); + timestamp_cache_init(ts_cache, base, TIMESTAMP_CBMEM_RESET_REQD); } -#define MAX_TIMESTAMP_CACHE 8 -struct timestamp_cache { - enum timestamp_id id; - uint64_t time; -} timestamp_cache[MAX_TIMESTAMP_CACHE] CAR_GLOBAL; +void timestamp_init(uint64_t base) +{ + struct timestamp_cache *ts_cache; + struct timestamp_table *tst; + + if (!timestamp_should_run()) + return; -static int timestamp_entries CAR_GLOBAL = 0; + ts_cache = timestamp_cache_get(); -/** - * timestamp_stash() allows to temporarily cache timestamps. - * This is needed when timestamping before the CBMEM area - * is initialized. The function timestamp_do_sync() is used to - * write the timestamps to the CBMEM area and this is done as - * part of CAR migration for romstage, and in ramstage main(). - */ + if (!ts_cache) { + printk(BIOS_ERR, "ERROR: No timestamp cache to init\n"); + return; + } -static void timestamp_stash(enum timestamp_id id, uint64_t ts_time) -{ - struct timestamp_cache *ts_cache = car_get_var(timestamp_cache); - int ts_entries = car_get_var(timestamp_entries); + /* the table is already used, so we shouldn't reset its base */ + if (ts_cache->cache_state == TIMESTAMP_CACHE_NOT_NEEDED) + return; + + ts_cache->cbmem_state = TIMESTAMP_CBMEM_RESET_REQD; + + tst = timestamp_table_get(); - if (ts_entries >= MAX_TIMESTAMP_CACHE) { - printk(BIOS_ERR, "ERROR: failed to add timestamp to cache\n"); + if (!tst) { + printk(BIOS_ERR, "ERROR: No timestamp table to init\n"); return; } - ts_cache[ts_entries].id = id; - ts_cache[ts_entries].time = ts_time; - car_set_var(timestamp_entries, ++ts_entries); + + tst->base_time = base; } -static void timestamp_do_sync(void) +void timestamp_add(enum timestamp_id id, uint64_t ts_time) { - struct timestamp_cache *ts_cache = car_get_var(timestamp_cache); - int ts_entries = car_get_var(timestamp_entries); + struct timestamp_table *ts_table; + + ts_table = timestamp_table_get(); + + if (!ts_table) { + printk(BIOS_ERR, "ERROR: No timestamp table found\n"); + return; + } - int i; - for (i = 0; i < ts_entries; i++) - timestamp_add(ts_cache[i].id, ts_cache[i].time); - car_set_var(timestamp_entries, 0); + timestamp_add_table_entry(ts_table, id, ts_time); } -void timestamp_init(uint64_t base) +void timestamp_add_now(enum timestamp_id id) +{ + timestamp_add(id, timestamp_get()); +} + +/* moves timestamp data from cache to cbmem region */ +static void timestamp_reinit(int is_recovery) { + uint32_t i; + + struct timestamp_cache *ts_cache; + struct timestamp_table *ts_cache_table; + struct timestamp_table *ts_cbmem_table = NULL; + if (!timestamp_should_run()) return; -#ifdef __PRE_RAM__ - /* Copy of basetime, it is too early for CBMEM. */ - car_set_var(ts_basetime, base); -#else - struct timestamp_table *tst = NULL; + ts_cache = timestamp_cache_get(); - /* Locate and use an already existing table. */ - if (!IS_ENABLED(CONFIG_LATE_CBMEM_INIT)) - tst = cbmem_find(CBMEM_ID_TIMESTAMP); + /* No timestamp cache found */ + if (ts_cache == NULL) { + printk(BIOS_ERR, "ERROR: No timestamp cache found\n"); + return; + } + + ts_cache_table = &ts_cache->table; + + ts_cbmem_table = cbmem_find(CBMEM_ID_TIMESTAMP); - if (tst) { - car_set_var(ts_table_p, tst); + if ((ts_cache->cbmem_state == TIMESTAMP_CBMEM_RESET_REQD) || + (ts_cbmem_table == NULL)) + ts_cbmem_table = timestamp_alloc_cbmem_table(); + + if (ts_cbmem_table == NULL) { + printk(BIOS_ERR, "ERROR: No timestamp table allocated\n"); return; } - /* Copy of basetime, may be too early for CBMEM. */ - car_set_var(ts_basetime, base); - timestamp_real_init(base); -#endif -} + if (ts_cbmem_table == ts_cache_table) { + printk(BIOS_ERR, "ERROR: Table error to sync timestamps\n"); + return; + } -static void timestamp_reinit(int is_recovery) -{ - if (!timestamp_should_run()) + if (ts_cache->cache_state == TIMESTAMP_CACHE_NOT_NEEDED) { + printk(BIOS_INFO, "Timestamp cache already synced\n"); return; + } -#ifdef __PRE_RAM__ - timestamp_real_init(car_get_var(ts_basetime)); -#else - if (!car_get_var(ts_table_p)) - timestamp_init(car_get_var(ts_basetime)); -#endif - if (car_get_var(ts_table_p)) - timestamp_do_sync(); + ts_cache->cache_state = TIMESTAMP_CACHE_NOT_NEEDED; + ts_cache->cbmem_state = TIMESTAMP_CBMEM_RESET_NOT_REQD; + + /* + * There can be two cases for timestamp sync: + * 1. Newly added cbmem_table will have base_time of 0. Thus, no + * adjusments are needed for the timestamps being added from cache to + * cbmem table. + * 2. Timestamps added to cache before ramstage: In this case, the + * base_time in cache table would be 0 and add_table_entry will take + * care of subtracting the appropriate base_time. + */ + for (i = 0; i < ts_cache_table->num_entries; i++) { + struct timestamp_entry *tse = &ts_cache_table->entries[i]; + timestamp_add_table_entry(ts_cbmem_table, tse->entry_id, + tse->entry_stamp); + } + + ts_cache_table->num_entries = 0; + /* Freshly added cbmem table has base_time 0. Inherit cache base_time */ + if (ts_cbmem_table->base_time == 0) + ts_cbmem_table->base_time = ts_cache_table->base_time; } /* Call timestamp_reinit CBMEM init hooks. */

1 0

Patch set updated for coreboot: documentation: Add documentation for timestamp library
by Patrick Georgi 02 Jul '15

02 Jul '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10741 -gerrit commit 2c8fb1b28bd92245a9d606458eecae40d102278d Author: Furquan Shaikh <furquan(a)google.com> Date: Fri Nov 14 11:57:00 2014 -0800 documentation: Add documentation for timestamp library BUG=chrome-os-partner:32973 BRANCH=None TEST=None Original-Change-Id: I4b184ffad6fcd93d63343a9bca34ad013e9d4263 Original-Signed-off-by: Furquan Shaikh <furquan(a)google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/229861 Original-Tested-by: Furquan Shaikh <furquan(a)chromium.org> Original-Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Original-Commit-Queue: Furquan Shaikh <furquan(a)chromium.org> (cherry picked from commit 97e2a3ebd9552c2a91d9ea62be515059428631cb) Signed-off-by: Marc Jones <marc.jones(a)se-eng.com> Change-Id: I6ea7237f2fa749ce3a493f378f9937e642f3b678 --- Documentation/timestamp_library.txt | 445 ++++++++++++++++++++++++++++++++++++ 1 file changed, 445 insertions(+) diff --git a/Documentation/timestamp_library.txt b/Documentation/timestamp_library.txt new file mode 100644 index 0000000..b157c6f --- /dev/null +++ b/Documentation/timestamp_library.txt @@ -0,0 +1,445 @@ +=========================== Table of Contents ================================== +Introduction + +Data structures used + cache_state + cbmem_state + table + entries + +Internal Functions + timestamp_cache_init + timestamp_cache_get + timestamp_alloc_cbmem_table + timestamp_table_get + timestamp_add_table_entry + +Function APIs + timestamp_early_init + timestamp_init + timestamp_add + timestamp_add_now + timestamp_sync + +Use / Test Cases + Case 1: Timestamp Region Exists + Case 2: No timestamp region, fresh boot, cbmem_initialize called after + timestamp_init + Case 3: No timestamp region, fresh boot, cbmem_initialize called before + timestamp_init + Case 4: No timestamp region, resume, cbmem_initialize called after + timestamp_init + Case 5: No timestamp region, resume, cbmem_initialize called before + timestamp_init + + +============================== Introduction ==================================== + + The aim of timestamp library is to make it easier for different boards +to save timestamps in cbmem / stash (until cbmem is brought up) by providing a +simple API to initialize, add and sync timestamps. In order to make the +timestamps persistent and accessible from the kernel, we need to ensure that all +the saved timestamps end up in cbmem area under the CBMEM_ID_TIMESTAMP +tag. However, until the cbmem area is available, the timestamps can be saved to +board/SOC-defined _timestamp region or in a local stage-specific stash. The work +of identifying the right location for storing timestamps is done by the library +and is not exposed to the user. + + Working of timestamp library from a user perspective can be outlined in +the following steps: +1. Initialize the _timestamp cache (if any used) +2. Initialize the base time and reset cbmem timestamp area +3. Start adding timestamps + + Steps 1) and 2) above can be performed in a single API call as explained +in later sections. Behind the scenes, the timestamp library takes care of: +1. Identifying the correct location for storing timestamps (cbmem or _timestamp +region or local stash). +2. Once cbmem is up, ensure that all timestamps are synced from _timestamp +region or local stash into the cbmem area. +3. Add a new cbmem timestamp area based on whether a reset of cbmem timestamp +region is required / not. + +========================== Data structures used ================================ + + The main structure that maintains information about the timestamp cache +is: +struct __attribute__((__packed__)) timestamp_cache { + uint16_t cache_state; + uint16_t cbmem_state; + struct timestamp_table table; + struct timestamp_entry entries[MAX_TIMESTAMP_CACHE]; +}; + +1. cache_state + The state of the cache is maintained by cache_state attribute which can +be any one of the following: + +enum { + TIMESTAMP_CACHE_UNINITIALIZED = 0, + TIMESTAMP_CACHE_INITIALIZED, + TIMESTAMP_CACHE_NOT_NEEDED, +}; + + By default, if the cache is stored in local stash (bss area), then it +will be reset to uninitialized state. However, if the cache is stored in +_timestamp region, then it might have garbage in any of the attributes. Thus, if +_timestamp region is being used by any board, it is important to call +timestamp_early_init which provides the initialization of timestamp cache. + + Once the cache is initialized, its state is set to +cache_initialized. Henceforth, the calls to cache i.e. timestamp_add know that +the state reflected is valid and timestamps can be directly saved in the cache. + + When cbmem area is up (i.e. call to cbmem_initialize), we do not need to +store the timestamps in local stash / _timestamp area anymore. Thus, the cache +state is set to cache_not_needed, which allows timestamp_add to store all +timestamps directly into cbmem area. + + +2. cbmem_state + This attribute indicates if we need to reset the timestamp area in +cbmem. This needs to be done for fresh boot (when there is no timestamp area +allocated in cbmem) or during resume (to clean out timestamps from earlier +boot). This can be set to any one of the following values: + +enum { + TIMESTAMP_CBMEM_RESET_NOT_REQD = 0, + TIMESTAMP_CBMEM_RESET_REQD, +}; + + If _timestamp region is being used, the call to timestamp_early_init +sets this field to reset_reqd. If this region is not being used, then instead +the call to timestamp_init sets this field to reset_reqd. Thus, when cbmem +initialization is complete, the timestamp library ensures that the cbmem +timestamp area is properly set as per the value of this attribute and resets +this field to reset_not_reqd. In case of resume path, this field would be set +accordingly by timestamp_early_init / timestamp_init thus ensuring that +timestamps from earlier boot dont float around into current boot logs. Also, +during early ramstage, when cbmem is not yet up, local stash would be used which +is in the bss area and thus this field is set to reset_not_reqd (unless +timestamp_init is called before or after cbmem_intiialize). Hence, when ramstage +brings up cbmem and syncs timestamps, the cbmem timestamp area is not reset. If +ramstage is the first stage where timestamp_init is called, then the cbmem area +is accordingly reset in timestamp_sync or timestamp_init based on the order in +which calls are made. Details are explained in the use cases towards the end. + + +3. table + This field is represented by a structure which provides overall +information about the entries in the timestamp area: + +struct timestamp_table { + uint64_t base_time; + uint32_t max_entries; + uint32_t num_entries; + struct timestamp_entry entries[0]; /* Variable number of entries */ +} __attribute__((packed)); + + It indicates the base time for all timestamp entries, maximum number of +entries that can be stored, total number of entries that currently exist and an +entry structure to hold variable number of entries. + + +4. entries + This field holds the details of each timestamp entry, upto a maximum of +MAX_TIMESTAMP_CACHE which is defined as 16 entries. Each entry is defined by: + +struct timestamp_entry { + uint32_t entry_id; + uint64_t entry_stamp; +} __attribute__((packed)); + + entry_id holds the timestamp id corresponding to this entry and +entry_stamp holds the actual timestamp. + + + For timestamps stored in the cbmem area, a timestamp_table is allocated +with space for MAX_TIMESTAMPS equal to 30. Thus, the cbmem area holds base_time, +max_entries (which is 30), current number of entries and the actual entries +represented by timestamp_entry. + + +========================== Internal Functions ================================== + +1. timestamp_cache_init + Initializes the timestamp cache to a known state by setting num_entries +to 0, base_entries to MAX_TIMESTAMP_CACHE, base_time to caller-provided base, +cache_state to TIMESTAMP_CACHE_INITIALIZED and cbmem_state to caller-provided +state. + + +2. timestamp_cache_get + This function returns a pointer to timestamp cache. It basically +identifies what cache to use based on following parameters: +a. If __PRE_RAM__ is true i.e. we are in pre-ramstage step and _timestamp region +is provided, use _timestamp region. +b. Otherwise use local stash + + If using _timestamp region, it ensures that the size of the region is +big enough to hold all of timestamp_cache structure and MAX_TIMESTAMP_CACHE +timestamp entries. Once the location of cache is decided, it checks to see if +cache is not yet initialized, and calls timestamp_cache_init if required. + + +3. timestamp_alloc_cbmem_table + This function exists only in romstage and ramstage since only these two +stages access cbmem area. It allocates a new table for MAX_TIMESTAMPS number of +entries in the cbmem area using CBMEM_ID_TIMESTAMP tag. It also resets the +base_time and num_entries to 0. + + +4. timestamp_table_get + This function returns a pointer to the timestamp table. Based on the +value of cache_state in timestamp_cache, it provides a pointer either to the +cache (in stash or _timestamp region) or the cbmem timestamp table. If a pointer +to the cbmem timestamp table is returned, it checks to see if cbmem_state +indicates a reset of the cbmem timestamp area. If required, it makes a call to +timestamp_alloc_cbmem_table. + + +5. timestamp_add_table_entry + This function adds a new entry to the timestamp table obtained by making +a call to timestamp_table_get. It sets the id based on user-provided id and the +stamp is set to user-provided time - table base time. This is to normalize all +the timestamps. + + +============================= Function APIs ==================================== + +1. timestamp_early_init + It is essential to call this function only if _timestamp region is being +used. This should be the first call made to the timestamp library. Since +_timestamp region can contain arbitary values in the different fields of the +cache, this function initializes the fields properly by calling +timestamp_cache_init with the cache pointer, user-provided base time and +cbmem_state as TIMESTAMP_CBMEM_RESET_REQD. This will provide an indication that +cbmem timestamp area needs to be added (in case of fresh boot) or reset to 0 +entries(in case of resume). + + +2. timestamp_init + It is essential to call this function before any call to timestamp_add +is made. In case of _timestamp region being used, only a call to +timestamp_early_init is required. In all other cases, it is essential to call +timestamp_init to set the cbmem_state to TIMESTAMP_CBMEM_RESET_REQD. This will +provide an indication that cbmem timestamp area needs to be added (in case of +fresh boot) or reset to 0 entries(in case of resume). + + +3. timestamp_add + This function accepts from user a timestamp id and time to record in the +timestamp table. Based on the table provided by timestamp_table_get, it stores +the entry in the appropriate table in cbmem or _timestamp region or local +stash. + + +4. timestamp_add_now + This function calls timestamp_add with user-provided id and current +time. + + +5. timestamp_sync + This is one of the most important functions required to ensure the +proper functioning of the timestamp library across cbmem, _timestamp region and +local stash with minimal interference for the user. It is important to note that +this function is called only by cbmem_initialize to ensure that once the cbmem +area is ready, we automatically sync all the timestamps saved in the cache to +cbmem area. Thus, the user never has to call the timestamp_sync function. + + This function checks to see if the cache state indicates that a cbmem +reset of timestamp area is required or no timestamp area exists in cbmem at +all. In that case, it allocates a new cbmem area by calling +timestamp_alloc_cbmem_table. + + Otherwise, it uses cbmem_find to use the timestamp area in cbmem. It +then uses timestamp_add_table_entry to move all the entries from cache to cbmem +area. Here, two cases can occur with respect to the base time subtraction: + +a. Newly added cbmem table will have a base time of 0. Thus, no adjustments are +required for the timestamps being added from cache to cbmem table. + +b. Timestamps added to cache before ramstage: In this case, the base time in +cache table will be 0 and timestamp_add_table_entry will take care of +subtracting the correct base_time. Finally, it resets the timestamp cache to: + + cache_state: TIMESTAMP_CACHE_NOT_NEEDED + cbmem_state: TIMESTAMP_CBMEM_RESET_NOT_REQD + num_entries: 0 + + Also, the base_time in cbmem table is update if it is currently zero +indicating that it needs to inherit base time from cache table since +cbmem table might be newly allocated. + + +============================= Use / Test Cases ================================= + + The following cases have been considered while designing the timestamp +library. It is important to ensure that any changes made to this library satisfy +each of the following use cases: + +Case 1: Timestamp Region Exists (Fresh Boot / Resume) + + +1. timestamp_early_init is called to setup the cache state and cbmem_state is +set to reset_reqd. These properties are set in the timestamp cache which is part +of _timestamp region. + +2. <Any number of timestamp_add / timestamp_add_now> : All saved in _timestamp +region + +3. Once cbmem_initiliaze is complete, it calls timestamp_sync, which checks the +_timestamp region to check the cbmem_state field. Since it says reset_reqd, a +new area for timestamp is setup in cbmem by calling cbmem_add. The value of +cbmem_state is set to reset_not_reqd in _timestamp region cache. + +4. After entering ramstage, the local stash acts as the timestamp cache. Since +it is in BSS area, the cache_state field is set to uninitialized and cbmem_state +field is set to reset_not_reqd. + +5. On any call to timestamp_add / timestamp_add_now, it initializes the cache +and sets cache_state field to initialized whereas cbmem_state is still set to +reset_not_reqd. + +6. Once cbmem_initiliaze is complete, it calls timestamp_sync, which checks the +local stash to check the cbmem_state field. Since it says reset_not_reqd, it +uses cbmem_find to find already allocated timestamp area in cbmem. If none is +found, it allocates a new one. + +7. <Any number of calls to timestamp_add / timestamp_add_now> : All saved in +cbmem + + +Case 2: No timestamp region, fresh boot, cbmem_initialize called after +timestamp_init + +1. Since timestamp_init is called before cbmem_initialize, it will set the cache +field attributes to: cache_state as initialized and cbmem_state as +reset_reqd. This ensures that timestamp_sync sets up a new cbmem area for +timestamps. + +2. < Any number of calls to timestamp_add / timestamp_add_now> : All saved in +stash + +3. Once cbmem_initiliaze is complete, it calls timestamp_sync, which checks the +stash cache to check the cbmem_state field. Since it says reset_reqd, a new area +for timestamp is setup in cbmem by calling cbmem_add. The value of cbmem_state +is set to reset_not_reqd in stash cache. + +4. After entering ramstage, a new local stash acts as the timestamp cache. Since +it is in BSS area, the cache_state field is set to uninitialized and cbmem_state +field is set to reset_not_reqd. + +5. On any call to timestamp_add / timestamp_add_now, it initializes the cache +and sets cache_state field to initialized whereas cbmem_state is still set to +reset_not_reqd. + +6. Once cbmem_initiliaze is complete, it calls timestamp_sync, which checks the +local stash to check the cbmem_state field. Since it says reset_not_reqd, it +uses cbmem_find to find already allocated timestamp area in cbmem. If none is +found, it allocates a new one. + +7. <Any number of calls to timestamp_add / timestamp_add_now> : All saved in +cbmem + + +Case 3: No timestamp region, fresh boot, cbmem_initialize called before +timestamp_init + +1. Since cbmem_initialize is called before timestamp_init, it will call +timestamp_sync which checks local stash to check for cbmem_state field. Since, +cbmem_state says no_reset_reqd, it uses cbmem_find to look for a timestamp area +in cbmem. Since, it is a fresh boot, none will be found and it uses cbmem_add to +create a new area on cbmem. + +2. timestamp_init is called, which sets local cache state to reset required. It +then calls timestamp_table_get which sees that cache_state is cache_not_needed +and cbmem_state is reset_reqd. Thus, it calls timestamp_alloc_cbmem_table to +reset the cbmem area which is as good as no change in the state of cbmem +area. Then, the cbmem_state is set to reset_not_reqd. + +3. <Any number of calls to timestamp_add / timestamp_add_now> : All saved in +cbmem + +4. After entering ramstage, a new local stash acts as the timestamp cache. Since +it is in BSS area, the cache_state field is set to uninitialized and cbmem_state +field is set to reset_not_reqd. + +5. On any call to timestamp_add / timestamp_add_now, it initializes the cache +and sets cache_state field to initialized whereas cbmem_state is still set to +reset_not_reqd. + +6. Once cbmem_initiliaze is complete, it calls timestamp_sync, which checks the +local stash to check the cbmem_state field. Since it says reset_not_reqd, it +uses cbmem_find to find already allocated timestamp area in cbmem. If none is +found, it allocates a new one. + +7. <Any number of calls to timestamp_add / timestamp_add_now> : All saved in +cbmem + + +Case 4: No timestamp region, resume, cbmem_initialize called after +timestamp_init + +1. Since timestamp_init is called before cbmem_initialize, it will set the cache +field attributes to: cache_state as initialized and cbmem_state as reset_reqd. + +2. < Any number of calls to timestamp_add / timestamp_add_now> : All saved in +stash + +3. Once cbmem_initiliaze is complete, it calls timestamp_sync, which checks the +stash cache to check the cbmem_state field. Since it says reset_reqd, +timestamp_sync resets cbmem area to num_entries=0, thus flushing timestamps from +earlier boot. The value of cbmem_state is set to reset_not_reqd in stash cache. + +4. After entering ramstage, a new local stash acts as the timestamp cache. Since +it is in BSS area, the cache_state field is set to uninitialized and cbmem_state +field is set to reset_not_reqd. + +5. On any call to timestamp_add / timestamp_add_now, it initializes the cache +and sets cache_state field to initialized whereas cbmem_state is still set to +reset_not_reqd. + +6. Once cbmem_initiliaze is complete, it calls timestamp_sync, which checks the +local stash to check the cbmem_state field. Since it says reset_not_reqd, it +uses cbmem_find to find already allocated timestamp area in cbmem. If none is +found, it allocates a new one. + +7. <Any number of calls to timestamp_add / timestamp_add_now> : All saved in +cbmem + + +Case 5: No timestamp region, resume, cbmem_initialize called before +timestamp_init + +1. Since cbmem_initialize is called before timestamp_init, it will call +timestamp_sync which checks local stash to check for cbmem_state field. Since, +cbmem_state says no_reset_reqd, it uses cbmem_find to look for a timestamp area +in cbmem. Since, it is resume, it will find the older cbmem timestamp area from +earlier boot. However, nothing is added to cbmem area since timestamp_add / +timestamp_add_now is expected to be used only after call to timestamp_init. + +2. timestamp_init is called, which sets local cache state to reset required. It +then calls timestamp_table_get which sees that cache_state is cache_not_needed +and cbmem_state is reset_reqd. Thus, it calls timestamp_alloc_cbmem_table to +reset the cbmem area which sets num_entries to 0. Thus, flushing timestamps from +earlier boot. Then, the cbmem_state is set to reset_not_reqd. + +3. <Any number of calls to timestamp_add / timestamp_add_now> : All saved in +cbmem + +4. After entering ramstage, a new local stash acts as the timestamp cache. Since +it is in BSS area, the cache_state field is set to uninitialized and cbmem_state +field is set to reset_not_reqd. + +5. On any call to timestamp_add / timestamp_add_now, it initializes the cache +and sets cache_state field to initialized whereas cbmem_state is still set to +reset_not_reqd. + +6. Once cbmem_initiliaze is complete, it calls timestamp_sync, which checks the +local stash to check the cbmem_state field. Since it says reset_not_reqd, it +uses cbmem_find to find already allocated timestamp area in cbmem. If none is +found, it allocates a new one. + +7. <Any number of calls to timestamp_add / timestamp_add_now> : All saved in +cbmem

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New patch to review for coreboot: util/ectool: don't dump the whole ram when writing to it
by Alexander Couzens 02 Jul '15

02 Jul '15

Alexander Couzens (lynxis(a)fe80.eu) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10767 -gerrit commit a7fe2da5a38649aa6d59e308dd6a1ac331909ec1 Author: Alexander Couzens <lynxis(a)fe80.eu> Date: Thu Jul 2 19:48:22 2015 +0200 util/ectool: don't dump the whole ram when writing to it Change-Id: Ib2f417ff91862c71de32b3f8929d2017a725ea47 Signed-off-by: Alexander Couzens <lynxis(a)fe80.eu> --- util/ectool/ectool.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/util/ectool/ectool.c b/util/ectool/ectool.c index 307c1f5..1631deb 100644 --- a/util/ectool/ectool.c +++ b/util/ectool/ectool.c @@ -124,7 +124,7 @@ int main(int argc, char *argv[]) } /* preserve default - dump_ram if nothing selected */ - if (!dump_ram && !dump_idx && !dump_query) { + if (!dump_ram && !dump_idx && !dump_query && !write_addr) { dump_ram = 1; }

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Patch merged into coreboot/master: tegra124: verified boot fixups
by gerrit＠coreboot.org 02 Jul '15

02 Jul '15

the following patch was just integrated into master: commit 417f16bc750761997905989be5b812f3d71b27e2 Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Wed Jul 1 16:34:07 2015 -0700 tegra124: verified boot fixups This patch fixes up verified boot (vboot2) configuration of all tegra 124 bases boards in the tree. Change-Id: I81f2e83821cbfdbe2a55095543e7447efdde494e Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Reviewed-on: http://review.coreboot.org/10761 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones(a)se-eng.com> See http://review.coreboot.org/10761 for details. -gerrit

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Patch set updated for coreboot: haswell: Use _timestamp region
by Patrick Georgi 02 Jul '15

02 Jul '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10737 -gerrit commit 04e2ea719b786ebd5cb3cffddc2fed0ac912cc65 Author: Furquan Shaikh <furquan(a)google.com> Date: Wed Oct 29 10:48:57 2014 -0700 haswell: Use _timestamp region Use timestamp region instead of storing timestamps in local variables before cbmem is up. BUG=None BRANCH=None TEST=cbmem -t reports correct timestamps on falco and peppy (for both normal boot and suspend/resume). Original-Change-Id: If5883721553090f51c0bfcb5677aad55c54f82b3 Original-Signed-off-by: Furquan Shaikh <furquan(a)google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/226362 Original-Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Original-Commit-Queue: Furquan Shaikh <furquan(a)chromium.org> Original-Tested-by: Furquan Shaikh <furquan(a)chromium.org> (cherry picked from commit 61dbca0b181335d187d742c4a63472f2f2cc9a1b) Signed-off-by: Marc Jones <marc.jones(a)se-eng.com> Change-Id: Ibb98f32f24bac1d3560eb257bf0d9f4310a5828f --- src/cpu/intel/haswell/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/src/cpu/intel/haswell/Kconfig b/src/cpu/intel/haswell/Kconfig index 779f1d6..2ed1c61 100644 --- a/src/cpu/intel/haswell/Kconfig +++ b/src/cpu/intel/haswell/Kconfig @@ -27,6 +27,7 @@ config CPU_SPECIFIC_OPTIONS select CPU_INTEL_FIRMWARE_INTERFACE_TABLE select PARALLEL_CPU_INIT select PARALLEL_MP + select HAS_PRECBMEM_TIMESTAMP_REGION config BOOTBLOCK_CPU_INIT string

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Patch set updated for coreboot: t132: Add timestamp collection support in t132
by Patrick Georgi 02 Jul '15

02 Jul '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10736 -gerrit commit f98abad1bf5a0d7080b6bb298d3dba71c5cbfd63 Author: Furquan Shaikh <furquan(a)google.com> Date: Mon Oct 13 14:50:08 2014 -0700 t132: Add timestamp collection support in t132 Add a region TIMESTAMP to store all the timestamps starting from bootblock to end of romstage. At the end of romstage take all the timestamps in TIMESTAMP region and put it into cbmem BUG=chrome-os-partner:32973 BRANCH=None TEST=Compiles successfully and cbmem -t prints all timestamps Original-Change-Id: I856564de80589bede660ca6bc1275193f8a2fa4b Original-Signed-off-by: Furquan Shaikh <furquan(a)google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/223110 Original-Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Original-Tested-by: Furquan Shaikh <furquan(a)chromium.org> Original-Commit-Queue: Furquan Shaikh <furquan(a)chromium.org> (cherry picked from commit b8ccf5731df9ca149a2a0661362e7745515bfe5e) Signed-off-by: Marc Jones <marc.jones(a)se-eng.com> Change-Id: I266e46ed691ebe5f0a20ed28b89e6e74399487a1 --- src/soc/nvidia/tegra132/Kconfig | 1 + src/soc/nvidia/tegra132/bootblock.c | 4 ++++ src/soc/nvidia/tegra132/include/soc/memlayout_vboot2.ld | 1 + src/soc/nvidia/tegra132/romstage.c | 5 +++++ src/soc/nvidia/tegra132/verstage.c | 2 ++ 5 files changed, 13 insertions(+) diff --git a/src/soc/nvidia/tegra132/Kconfig b/src/soc/nvidia/tegra132/Kconfig index a5df92a..ee3b80e 100644 --- a/src/soc/nvidia/tegra132/Kconfig +++ b/src/soc/nvidia/tegra132/Kconfig @@ -15,6 +15,7 @@ config SOC_NVIDIA_TEGRA132 select SMP select ARM64_USE_SECURE_MONITOR select GENERIC_GPIO_LIB + select HAS_PRECBMEM_TIMESTAMP_REGION if SOC_NVIDIA_TEGRA132 diff --git a/src/soc/nvidia/tegra132/bootblock.c b/src/soc/nvidia/tegra132/bootblock.c index b19cf49..bb8a393 100644 --- a/src/soc/nvidia/tegra132/bootblock.c +++ b/src/soc/nvidia/tegra132/bootblock.c @@ -26,6 +26,7 @@ #include <soc/clock.h> #include <soc/nvidia/tegra/apbmisc.h> #include <soc/power.h> +#include <timestamp.h> #define BCT_OFFSET_IN_BIT 0x50 #define ODMDATA_OFFSET_IN_BCT 0x6A8 @@ -57,6 +58,9 @@ void __attribute__((weak)) bootblock_mainboard_early_init(void) void main(void) { + timestamp_early_init(0); + timestamp_add_now(TS_START_BOOTBLOCK); + // enable JTAG at the earliest stage enable_jtag(); diff --git a/src/soc/nvidia/tegra132/include/soc/memlayout_vboot2.ld b/src/soc/nvidia/tegra132/include/soc/memlayout_vboot2.ld index 2fba8ef..0f98fd2 100644 --- a/src/soc/nvidia/tegra132/include/soc/memlayout_vboot2.ld +++ b/src/soc/nvidia/tegra132/include/soc/memlayout_vboot2.ld @@ -36,6 +36,7 @@ SECTIONS PRERAM_CBFS_CACHE(0x40002000, 72K) VBOOT2_WORK(0x40014000, 16K) STACK(0x40018000, 2K) + TIMESTAMP(0x40018800, 2K) BOOTBLOCK(0x40019000, 22K) VERSTAGE(0x4001e800, 58K) ROMSTAGE(0x4002d000, 76K) diff --git a/src/soc/nvidia/tegra132/romstage.c b/src/soc/nvidia/tegra132/romstage.c index 6476e06..ae295c0 100644 --- a/src/soc/nvidia/tegra132/romstage.c +++ b/src/soc/nvidia/tegra132/romstage.c @@ -31,6 +31,7 @@ #include <soc/sdram_configs.h> #include <soc/romstage.h> #include <timer.h> +#include <timestamp.h> void __attribute__((weak)) romstage_mainboard_init(void) { @@ -39,6 +40,8 @@ void __attribute__((weak)) romstage_mainboard_init(void) void romstage(void) { + timestamp_add_now(TS_START_ROMSTAGE); + console_init(); exception_init(); @@ -52,6 +55,8 @@ void romstage(void) printk(BIOS_INFO, "T132 romstage: sdram_init done\n"); #endif + timestamp_add_now(TS_AFTER_INITRAM); + /* * Trust Zone needs to be initialized after the DRAM initialization * because carveout registers are programmed during DRAM init. diff --git a/src/soc/nvidia/tegra132/verstage.c b/src/soc/nvidia/tegra132/verstage.c index b70028a..d6eba9a 100644 --- a/src/soc/nvidia/tegra132/verstage.c +++ b/src/soc/nvidia/tegra132/verstage.c @@ -24,6 +24,7 @@ #include <console/console.h> #include <soc/verstage.h> #include <program_loading.h> +#include <timestamp.h> void __attribute__((weak)) verstage_mainboard_init(void) { @@ -33,6 +34,7 @@ void __attribute__((weak)) verstage_mainboard_init(void) static void verstage(void) { console_init(); + timestamp_add_now(TS_START_VBOOT); exception_init(); verstage_mainboard_init();

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Patch set updated for coreboot: broadwell: Use _timestamp region
by Patrick Georgi 02 Jul '15

02 Jul '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10739 -gerrit commit b77375c422db036e5e13a2de7515a0bdf7ad0d93 Author: Furquan Shaikh <furquan(a)google.com> Date: Wed Oct 29 16:50:35 2014 -0700 broadwell: Use _timestamp region Use timestamp region instead of storing timestamps in local data structures before cbmem is up BUG=None BRANCH=None TEST=Compiles successfully for Auron and Samus. cbmem -t reports correct timestamps on auron(for both normal boot and suspend/resume) Original-Change-Id: Ib70a3632c2034963c819c1bb90a3cdb2d7d9c355 Original-Signed-off-by: Furquan Shaikh <furquan(a)google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/226420 Original-Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Original-Commit-Queue: Furquan Shaikh <furquan(a)chromium.org> Original-Tested-by: Furquan Shaikh <furquan(a)chromium.org> (cherry picked from commit e2ac6132aa874c13cd8e9333b8e1413ce8359852) Signed-off-by: Marc Jones <marc.jones(a)se-eng.com> Change-Id: I70f608fc50b2cf180554f817c9aaf833257d7d80 --- src/soc/intel/broadwell/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/src/soc/intel/broadwell/Kconfig b/src/soc/intel/broadwell/Kconfig index 6ad9113..f37ffd8 100644 --- a/src/soc/intel/broadwell/Kconfig +++ b/src/soc/intel/broadwell/Kconfig @@ -23,6 +23,7 @@ config CPU_SPECIFIC_OPTIONS select HAVE_SMI_HANDLER select HAVE_HARD_RESET select HAVE_USBDEBUG + select HAS_PRECBMEM_TIMESTAMP_REGION select IOAPIC select MMCONF_SUPPORT select MMCONF_SUPPORT_DEFAULT

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Patch set updated for coreboot: baytrail: Use _timestamp region
by Patrick Georgi 02 Jul '15

02 Jul '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10738 -gerrit commit 8e3db7bfd963b4535cb012563d9591ba3b033b42 Author: Furquan Shaikh <furquan(a)google.com> Date: Wed Oct 29 17:37:25 2014 -0700 baytrail: Use _timestamp region Use timestamp region instead of storing timestamps in local data structures before cbmem is up. BUG=None BRANCH=None TEST=cbmem -t reports correct timestamps on rambi(for both normal boot and suspend/resume). Original-Change-Id: I4cce22514041edc7808278d45eac4370a2bf0810 Original-Signed-off-by: Furquan Shaikh <furquan(a)google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/226421 Original-Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Original-Commit-Queue: Furquan Shaikh <furquan(a)chromium.org> Original-Tested-by: Furquan Shaikh <furquan(a)chromium.org> (cherry picked from commit 58e212498ffc0ac32e8ad60e0e59caf1aa81c8d8) Signed-off-by: Marc Jones <marc.jones(a)se-eng.com> Change-Id: I8cc686327c7bacf28aa97f001b4fd6c0f4aeb585 --- src/soc/intel/baytrail/Kconfig | 1 + 1 file changed, 1 insertion(+) diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig index 5754c15..b394a57 100644 --- a/src/soc/intel/baytrail/Kconfig +++ b/src/soc/intel/baytrail/Kconfig @@ -17,6 +17,7 @@ config CPU_SPECIFIC_OPTIONS select SUPPORT_CPU_UCODE_IN_CBFS select HAVE_SMI_HANDLER select HAVE_HARD_RESET + select HAS_PRECBMEM_TIMESTAMP_REGION select MMCONF_SUPPORT select MMCONF_SUPPORT_DEFAULT select RELOCATABLE_MODULES

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coreboot-gerrit July 2015