coreboot-gerrit July 2015

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Patch set updated for coreboot: timestamp: add generic cache region
by Patrick Georgi 07 Jul '15

07 Jul '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10790 -gerrit commit 35d00b9d1743773cbe494819a874b5244d1ffbda Author: Aaron Durbin <adurbin(a)chromium.org> Date: Fri Jul 3 17:04:21 2015 -0500 timestamp: add generic cache region In order to accommodate tracking timestamps in all the __PRE_RAM__ stages (bootblock, verstage, romstage, etc) of a platform one needs to provide a way to specify a persistent region of SRAM or cache-as-ram to store the timestamps until cbmem comes online. Provide that infrastructure. Based on original patches from chromium.org: Original-Change-Id: I4d78653c0595523eeeb02115423e7fecceea5e1e Original-Signed-off-by: Furquan Shaikh <furquan(a)google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/223348 Original-Reviewed-by: Aaron Durbin <adurbin(a)chromium.org> Original-Reviewed-by: Patrick Georgi <pgeorgi(a)chromium.org> Original-Tested-by: Furquan Shaikh <furquan(a)chromium.org> Original-Commit-Queue: Furquan Shaikh <furquan(a)chromium.org> Original-Change-Id: Ie5ffda3112d626068bd1904afcc5a09bc4916d16 Original-Signed-off-by: Furquan Shaikh <furquan(a)google.com> Original-Reviewed-on: https://chromium-review.googlesource.com/224024 Original-Reviewed-by: Furquan Shaikh <furquan(a)chromium.org> Original-Commit-Queue: Furquan Shaikh <furquan(a)chromium.org> Original-Tested-by: Furquan Shaikh <furquan(a)chromium.org> Change-Id: I8779526136e89ae61a6f177ce5c74a6530469ae1 Signed-off-by: Aaron Durbin <adurbin(a)chromium.org> --- src/Kconfig | 9 ++ src/arch/x86/Makefile.inc | 3 +- src/arch/x86/init/romstage.ld | 5 + src/include/memlayout.h | 3 + src/include/symbols.h | 4 + src/include/timestamp.h | 13 +++ src/lib/timestamp.c | 261 +++++++++++++++++++++++++++++------------- 7 files changed, 218 insertions(+), 80 deletions(-) diff --git a/src/Kconfig b/src/Kconfig index 269f7d2..84523a2 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -200,6 +200,15 @@ config COLLECT_TIMESTAMPS Make coreboot create a table of timer-ID/timer-value pairs to allow measuring time spent at different phases of the boot process. +config HAS_PRECBMEM_TIMESTAMP_REGION + bool "Timestamp region exists for pre-cbmem timestamps" + default y if ARCH_ROMSTAGE_X86_32 && CACHE_AS_RAM + depends on COLLECT_TIMESTAMPS + help + A separate region is maintained to allow storing of timestamps before + cbmem comes up. This is useful for storing timestamps across different + stage boundaries. + config USE_BLOBS bool "Allow use of binary-only repository" default n diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index f502bbe..dcb9ff0 100644 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -225,7 +225,8 @@ $(objgenerated)/romstage_null.ld: $(obj)/config.h $$(filter %.ld,$$(romstage-src rm -f $@ printf "ROMSTAGE_BASE = 0x0;\n" > $@.tmp printf '$(foreach ldscript,$(^),#include "$(ldscript)"\n)' >> $@.tmp - $(CC_romstage) $(PREPROCESS_ONLY) $@.tmp > $@ + $(CC_romstage) $(PREPROCESS_ONLY) $(CPPFLAGS_common) $@.tmp > $@ + $(objgenerated)/romstage.ld: $(objgenerated)/romstage_null.ld $(objcbfs)/base_xip.txt @printf " GEN $(subst $(obj)/,,$(@))\n" diff --git a/src/arch/x86/init/romstage.ld b/src/arch/x86/init/romstage.ld index 7b9cb6a..951ca65 100644 --- a/src/arch/x86/init/romstage.ld +++ b/src/arch/x86/init/romstage.ld @@ -52,6 +52,11 @@ SECTIONS . = CONFIG_DCACHE_RAM_BASE; .car.data . (NOLOAD) : { _car_data_start = .; +#if IS_ENABLED(CONFIG_HAS_PRECBMEM_TIMESTAMP_REGION) + _timestamp = .; + . = . + 0x100; + _etimestamp = .; +#endif *(.car.global_data); _car_data_end = .; /* The preram cbmem console area comes last to take advantage diff --git a/src/include/memlayout.h b/src/include/memlayout.h index 2771f2f..a529628 100644 --- a/src/include/memlayout.h +++ b/src/include/memlayout.h @@ -47,6 +47,9 @@ #define DRAM_START(addr) SYMBOL(dram, addr) +#define TIMESTAMP(addr, size) \ + REGION(timestamp, addr, size, 8) + #define PRERAM_CBMEM_CONSOLE(addr, size) \ REGION(preram_cbmem_console, addr, size, 4) diff --git a/src/include/symbols.h b/src/include/symbols.h index 9102e82..3fbf819 100644 --- a/src/include/symbols.h +++ b/src/include/symbols.h @@ -28,6 +28,10 @@ extern u8 _esram[]; extern u8 _dram[]; +extern u8 _timestamp[]; +extern u8 _etimestamp[]; +#define _timestamp_size (_etimestamp - _timestamp) + extern u8 _preram_cbmem_console[]; extern u8 _epreram_cbmem_console[]; #define _preram_cbmem_console_size \ diff --git a/src/include/timestamp.h b/src/include/timestamp.h index a248ea4..54d69ce 100644 --- a/src/include/timestamp.h +++ b/src/include/timestamp.h @@ -89,8 +89,21 @@ enum timestamp_id { }; #if CONFIG_COLLECT_TIMESTAMPS && (CONFIG_EARLY_CBMEM_INIT || !defined(__PRE_RAM__)) +/* + * timestamp_init() needs to be called once for each of these cases: + * 1. __PRE_RAM__ (bootblock, romstage, verstage, etc) and + * 2. !__PRE_RAM__ (ramstage) + * The latter is taken care of by the generic coreboot infrastructure so + * it's up to the chipset/arch to call timestamp_init() in *one* of + * the __PRE_RAM__ stages. If multiple calls are made timestamps will be lost. + */ void timestamp_init(uint64_t base); +/* + * Add a new timestamp. Depending on cbmem is available or not, this timestamp + * will be stored to cbmem / timestamp cache. + */ void timestamp_add(enum timestamp_id id, uint64_t ts_time); +/* Calls timestamp_add with current timestamp. */ void timestamp_add_now(enum timestamp_id id); #else #define timestamp_init(base) diff --git a/src/lib/timestamp.c b/src/lib/timestamp.c index 0c41ea2..51e63b2 100644 --- a/src/lib/timestamp.c +++ b/src/lib/timestamp.c @@ -17,10 +17,12 @@ * Foundation, Inc. */ +#include <assert.h> #include <stddef.h> #include <stdint.h> #include <console/console.h> #include <cbmem.h> +#include <symbols.h> #include <timer.h> #include <timestamp.h> #include <arch/early_variables.h> @@ -29,12 +31,65 @@ #define MAX_TIMESTAMPS 60 -static struct timestamp_table* ts_table_p CAR_GLOBAL = NULL; -static uint64_t ts_basetime CAR_GLOBAL = 0; +#define MAX_TIMESTAMP_CACHE 16 -static void timestamp_stash(enum timestamp_id id, uint64_t ts_time); +struct __attribute__((__packed__)) timestamp_cache { + int cache_state; + struct timestamp_table table; + /* The struct timestamp_table has a 0 length array as its last field. + * The following 'entries' array serves as the storage space for the + * cache. */ + struct timestamp_entry entries[MAX_TIMESTAMP_CACHE]; +}; -static void timestamp_real_init(uint64_t base) +#if (IS_ENABLED(CONFIG_HAS_PRECBMEM_TIMESTAMP_REGION) && defined(__PRE_RAM__)) +#define USE_TIMESTAMP_REGION 1 +#else +#define USE_TIMESTAMP_REGION 0 +#endif + +/* The cache location will sit in BSS when in ramstage. */ +#define TIMESTAMP_CACHE_IN_BSS ENV_RAMSTAGE + +#define HAS_CBMEM (ENV_ROMSTAGE || ENV_RAMSTAGE) + +/* Storage of cache entries during ramstage prior to cbmem coming online. */ +static struct timestamp_cache timestamp_cache; + +enum { + TIMESTAMP_CACHE_UNINITIALIZED = 0, + TIMESTAMP_CACHE_INITIALIZED, + TIMESTAMP_CACHE_NOT_NEEDED, +}; + +static void timestamp_cache_init(struct timestamp_cache *ts_cache, + uint64_t base) +{ + ts_cache->table.num_entries = 0; + ts_cache->table.max_entries = MAX_TIMESTAMP_CACHE; + ts_cache->table.base_time = base; + ts_cache->cache_state = TIMESTAMP_CACHE_INITIALIZED; +} + +static struct timestamp_cache *timestamp_cache_get(void) +{ + struct timestamp_cache *ts_cache = NULL; + + if (TIMESTAMP_CACHE_IN_BSS) { + ts_cache = &timestamp_cache; + } else if (USE_TIMESTAMP_REGION) { + if (_timestamp_size < sizeof(*ts_cache)) + BUG(); + ts_cache = car_get_var_ptr((void *)_timestamp); + } + + if (ts_cache && ts_cache->cache_state == TIMESTAMP_CACHE_UNINITIALIZED) + timestamp_cache_init(ts_cache, 0); + + return ts_cache; +} + +static struct timestamp_table *timestamp_alloc_cbmem_table(void) { struct timestamp_table* tst; @@ -43,13 +98,13 @@ static void timestamp_real_init(uint64_t base) MAX_TIMESTAMPS * sizeof(struct timestamp_entry)); if (!tst) - return; + return NULL; - tst->base_time = base; + tst->base_time = 0; tst->max_entries = MAX_TIMESTAMPS; tst->num_entries = 0; - car_set_var(ts_table_p, tst); + return tst; } /* Determine if one should proceed into timestamp code. This is for protecting @@ -64,117 +119,165 @@ static int timestamp_should_run(void) return 1; } -void timestamp_add(enum timestamp_id id, uint64_t ts_time) +static struct timestamp_table *timestamp_table_get(void) { - struct timestamp_entry *tse; - struct timestamp_table *ts_table = NULL; + MAYBE_STATIC struct timestamp_table *ts_table = NULL; + struct timestamp_cache *ts_cache; if (!timestamp_should_run()) - return; + return NULL; - ts_table = car_get_var(ts_table_p); - if (!ts_table) { - timestamp_stash(id, ts_time); - return; + if (ts_table != NULL) + return ts_table; + + ts_cache = timestamp_cache_get(); + + if (ts_cache == NULL) { + if (HAS_CBMEM) + ts_table = cbmem_find(CBMEM_ID_TIMESTAMP); + return ts_table; } - if (ts_table->num_entries == ts_table->max_entries) + + /* Cache is required. */ + if (ts_cache->cache_state != TIMESTAMP_CACHE_NOT_NEEDED) + return &ts_cache->table; + + /* Cache shouldn't be used but there's no backing store. */ + if (!HAS_CBMEM) + return NULL; + + ts_table = cbmem_find(CBMEM_ID_TIMESTAMP); + + return ts_table; +} + +static void timestamp_add_table_entry(struct timestamp_table *ts_table, + enum timestamp_id id, uint64_t ts_time) +{ + struct timestamp_entry *tse; + + if (ts_table->num_entries == ts_table->max_entries) { + printk(BIOS_ERR, "ERROR: Timestamp table full\n"); return; + } tse = &ts_table->entries[ts_table->num_entries++]; tse->entry_id = id; tse->entry_stamp = ts_time - ts_table->base_time; } -void timestamp_add_now(enum timestamp_id id) +void timestamp_add(enum timestamp_id id, uint64_t ts_time) { - timestamp_add(id, timestamp_get()); -} - -#define MAX_TIMESTAMP_CACHE 8 -struct timestamp_cache { - enum timestamp_id id; - uint64_t time; -} timestamp_cache[MAX_TIMESTAMP_CACHE] CAR_GLOBAL; - -static int timestamp_entries CAR_GLOBAL = 0; - -/** - * timestamp_stash() allows to temporarily cache timestamps. - * This is needed when timestamping before the CBMEM area - * is initialized. The function timestamp_do_sync() is used to - * write the timestamps to the CBMEM area and this is done as - * part of CAR migration for romstage, and in ramstage main(). - */ + struct timestamp_table *ts_table; -static void timestamp_stash(enum timestamp_id id, uint64_t ts_time) -{ - struct timestamp_cache *ts_cache = car_get_var(timestamp_cache); - int ts_entries = car_get_var(timestamp_entries); + ts_table = timestamp_table_get(); - if (ts_entries >= MAX_TIMESTAMP_CACHE) { - printk(BIOS_ERR, "ERROR: failed to add timestamp to cache\n"); + if (!ts_table) { + printk(BIOS_ERR, "ERROR: No timestamp table found\n"); return; } - ts_cache[ts_entries].id = id; - ts_cache[ts_entries].time = ts_time; - car_set_var(timestamp_entries, ++ts_entries); + + timestamp_add_table_entry(ts_table, id, ts_time); } -static void timestamp_do_sync(void) +void timestamp_add_now(enum timestamp_id id) { - struct timestamp_cache *ts_cache = car_get_var(timestamp_cache); - int ts_entries = car_get_var(timestamp_entries); - - int i; - for (i = 0; i < ts_entries; i++) - timestamp_add(ts_cache[i].id, ts_cache[i].time); - car_set_var(timestamp_entries, 0); + timestamp_add(id, timestamp_get()); } void timestamp_init(uint64_t base) { + struct timestamp_cache *ts_cache; + if (!timestamp_should_run()) return; -#ifdef __PRE_RAM__ - /* Copy of basetime, it is too early for CBMEM. */ - car_set_var(ts_basetime, base); -#else - struct timestamp_table *tst = NULL; - - /* Locate and use an already existing table. */ - if (!IS_ENABLED(CONFIG_LATE_CBMEM_INIT)) - tst = cbmem_find(CBMEM_ID_TIMESTAMP); + ts_cache = timestamp_cache_get(); - if (tst) { - car_set_var(ts_table_p, tst); + if (!ts_cache) { + printk(BIOS_ERR, "ERROR: No timestamp cache to init\n"); return; } - /* Copy of basetime, may be too early for CBMEM. */ - car_set_var(ts_basetime, base); - timestamp_real_init(base); -#endif + timestamp_cache_init(ts_cache, base); } -static void timestamp_reinit(int is_recovery) +static void timestamp_sync_cache_to_cbmem(int is_recovery) { + uint32_t i; + struct timestamp_cache *ts_cache; + struct timestamp_table *ts_cache_table; + struct timestamp_table *ts_cbmem_table = NULL; + if (!timestamp_should_run()) return; -#ifdef __PRE_RAM__ - timestamp_real_init(car_get_var(ts_basetime)); -#else - if (!car_get_var(ts_table_p)) - timestamp_init(car_get_var(ts_basetime)); -#endif - if (car_get_var(ts_table_p)) - timestamp_do_sync(); + ts_cache = timestamp_cache_get(); + + /* No timestamp cache found */ + if (ts_cache == NULL) { + printk(BIOS_ERR, "ERROR: No timestamp cache found\n"); + return; + } + + ts_cache_table = &ts_cache->table; + + /* cbmem is being recovered. */ + if (is_recovery) { + /* x86 resume path expects timestamps to be reset. */ + if (IS_ENABLED(CONFIG_ARCH_ROMSTAGE_X86_32) && ENV_ROMSTAGE) + ts_cbmem_table = timestamp_alloc_cbmem_table(); + else { + /* Find existing table in cbmem. */ + ts_cbmem_table = cbmem_find(CBMEM_ID_TIMESTAMP); + /* No existing timestamp table. */ + if (ts_cbmem_table == NULL) + ts_cbmem_table = timestamp_alloc_cbmem_table(); + } + } else + /* First time sync. Add new table. */ + ts_cbmem_table = timestamp_alloc_cbmem_table(); + + if (ts_cbmem_table == NULL) { + printk(BIOS_ERR, "ERROR: No timestamp table allocated\n"); + return; + } + + /* + * There's no need to worry about the base_time fields being out of + * sync because the following configurations are used/supported: + * + * 1. CONFIG_HAS_PRECBMEM_TIMESTAMP_REGION is enabled. This + * implies CONFIG_EARLY_CBMEM_INIT so once cbmem comes + * online we sync the timestamps to the cbmem storage while + * running in romstage. In ramstage the cbmem area is + * recovered and utilized. + * + * 2. CONFIG_LATE_CBMEM_INIT (!CONFIG_EARLY_CBMEM_INIT) is + * being used. That means the only cache that exists is + * in ramstage. Once cbmem comes online in ramstage those + * values are sync'd over. + * + * Any other combinations will result in inconsistent base_time + * values including bizarre timestamp values. + */ + for (i = 0; i < ts_cache_table->num_entries; i++) { + struct timestamp_entry *tse = &ts_cache_table->entries[i]; + timestamp_add_table_entry(ts_cbmem_table, tse->entry_id, + tse->entry_stamp); + } + + /* Freshly added cbmem table has base_time 0. Inherit cache base_time */ + if (ts_cbmem_table->base_time == 0) + ts_cbmem_table->base_time = ts_cache_table->base_time; + + /* Cache no longer required. */ + ts_cache_table->num_entries = 0; + ts_cache->cache_state = TIMESTAMP_CACHE_NOT_NEEDED; } -/* Call timestamp_reinit CBMEM init hooks. */ -ROMSTAGE_CBMEM_INIT_HOOK(timestamp_reinit) -RAMSTAGE_CBMEM_INIT_HOOK(timestamp_reinit) +ROMSTAGE_CBMEM_INIT_HOOK(timestamp_sync_cache_to_cbmem) +RAMSTAGE_CBMEM_INIT_HOOK(timestamp_sync_cache_to_cbmem) /* Provide default timestamp implementation using monotonic timer. */ uint64_t __attribute__((weak)) timestamp_get(void)

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Patch merged into coreboot/master: Unconditionally compile romstage with -Wa, --divide
by gerrit＠coreboot.org 07 Jul '15

07 Jul '15

the following patch was just integrated into master: commit 4c8fa2aad28fa5290478317a99e1323ade714677 Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Tue Jul 7 00:32:47 2015 +0200 Unconditionally compile romstage with -Wa,--divide The option --divide is required by our assembler to ensure that '/' is not parsed as a comment sign but as a division, because some of the cache as ram code is using divisions. The --divide parameter has been part of the GNU as since binutils 2.17. Hence, compile romstage (which contains cache as ram init) with -Wa,--divide unconditionally instead of probing for it and adding it to all compiler invocations (because that is causing random trouble with clang when compiling the SMM code and calling gcc with --divide instead of -Wa,--divide) Change-Id: Ideefb2a243dc1d657ba415a99c1f8ab1d93800e0 Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Reviewed-on: http://review.coreboot.org/10817 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> See http://review.coreboot.org/10817 for details. -gerrit

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New patch to review for coreboot: blobs: move marker
by Stefan Reinauer 07 Jul '15

07 Jul '15

Stefan Reinauer (stefan.reinauer(a)coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10824 -gerrit commit fd24af5b2dd32b43ccf63cc1201c9d7c748abf84 Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Tue Jul 7 17:32:17 2015 +0200 blobs: move marker Makes the following changes available: 61d663e blobs: Fix assembler code to allow dropping -Wa,--divide a6c34a6 AMD Steppe Eagle: add PlatformMemoryConfiguration.h 95b8050 AMD FT3b binary PI: Fix Windows 7 graphics driver hang c7c816e AMD Kern: remove PspSecureOs_prod_CZ.sbin Change-Id: Ie8ce8278f72c998b91717658a6fc1d0948c7c50a Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> --- 3rdparty/blobs | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/3rdparty/blobs b/3rdparty/blobs index 34b0926..61d663e 160000 --- a/3rdparty/blobs +++ b/3rdparty/blobs @@ -1 +1 @@ -Subproject commit 34b09265063c19ea5d61bd5a2f057b47b5aa2232 +Subproject commit 61d663e39bc96530900c3232ccea7365ab9dad0b

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New patch to review for coreboot: smbios: fix copy&paste error
by Patrick Georgi 07 Jul '15

07 Jul '15

Patrick Georgi (pgeorgi(a)google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/10823 -gerrit commit 0375456ca595616a444f0fd498ea2d2a03240542 Author: Patrick Georgi <pgeorgi(a)chromium.org> Date: Tue Jul 7 17:29:43 2015 +0200 smbios: fix copy&paste error While extending the SMBIOS code to write a proper maximum structure size, the call to elog_smbios_write_type15() was botched. Fix the name and arguments. Change-Id: I4c93490b09ddf4da240ff8f2bd8f8cc3f2abd96e Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> --- src/arch/x86/boot/smbios.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/arch/x86/boot/smbios.c b/src/arch/x86/boot/smbios.c index fc5ac66..a1f05da 100644 --- a/src/arch/x86/boot/smbios.c +++ b/src/arch/x86/boot/smbios.c @@ -553,7 +553,7 @@ unsigned long smbios_write_tables(unsigned long current) update_max(len, max_struct_size, smbios_write_type4(&current, handle++)); update_max(len, max_struct_size, smbios_write_type11(&current, &handle)); #if CONFIG_ELOG - update_max(len, max_struct_size, smbios_write_type15(&current, &handle)); + update_max(len, max_struct_size, elog_smbios_write_type15(&current, handle++)); #endif update_max(len, max_struct_size, smbios_write_type17(&current, &handle)); update_max(len, max_struct_size, smbios_write_type32(&current, handle++));

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Patch merged into coreboot/master: T210: UTMIP: Correct UTMIP PLL programming as per Mark Kuo
by gerrit＠coreboot.org 07 Jul '15

07 Jul '15

the following patch was just integrated into master: commit faa76f5548297ce246b84fe9a1aa6cbff2ff9fdb Author: Tom Warren <twarren(a)nvidia.com> Date: Tue Jun 30 10:22:12 2015 -0700 T210: UTMIP: Correct UTMIP PLL programming as per Mark Kuo BUG=chrome-os-partner:39603 BRANCH=none TEST=Built OK for Smaug. Change-Id: Iba170d8ad6f1dff111421fd61f71da19de57efaa Signed-off-by: Patrick Georgi <pgeorgi(a)chromium.org> Original-Commit-Id: 1bf1c1442dacf45bac5d55b05ada99a2c96f2e45 Original-Change-Id: Iecf04691a637b56e2f2287ab7d4d0cdda0382421 Original-Signed-off-by: Tom Warren <twarren(a)nvidia.com> Original-Reviewed-on: https://chromium-review.googlesource.com/282720 Original-Reviewed-by: Andrew Bresticker <abrestic(a)chromium.org> Original-Reviewed-by: Mark Kuo <mkuo(a)nvidia.com> Reviewed-on: http://review.coreboot.org/10814 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> See http://review.coreboot.org/10814 for details. -gerrit

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Patch merged into coreboot/master: amd/lamar: drop unused value from mainboard_intr_data[]
by gerrit＠coreboot.org 07 Jul '15

07 Jul '15

the following patch was just integrated into master: commit fd5398fcddb0391f8fcee4382f70c41c3c44ae1e Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Tue Jul 7 02:11:21 2015 +0200 amd/lamar: drop unused value from mainboard_intr_data[] This value is overwritten in the next line. Change-Id: I622c35b8d78f6b01f2532dd8b40db15b2e888f58 Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Reviewed-on: http://review.coreboot.org/10822 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> See http://review.coreboot.org/10822 for details. -gerrit

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Patch merged into coreboot/master: buildgcc: update IASL to version 20150619
by gerrit＠coreboot.org 07 Jul '15

07 Jul '15

the following patch was just integrated into master: commit adf61e2926441c673ff1943ad962fd8641a9f56c Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Tue Jul 7 00:41:42 2015 +0200 buildgcc: update IASL to version 20150619 Change-Id: Ic0cb6826bb624e905b9c715f17a7629bc7b751c5 Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Reviewed-on: http://review.coreboot.org/10818 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> See http://review.coreboot.org/10818 for details. -gerrit

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Patch merged into coreboot/master: xcompile: Fix compiler invocation in testcc
by gerrit＠coreboot.org 07 Jul '15

07 Jul '15

the following patch was just integrated into master: commit 8ef928af4ed7dd0a42f40017aa4afb6a86575511 Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Tue Jul 7 00:26:59 2015 +0200 xcompile: Fix compiler invocation in testcc While for GCC targets the compiler is just defined as a single binary, for clang it is defined as a binary and some options, e.g.: clang -target i386-elf -ccc-gcc-name i386-elf-gcc When executing the compiler with "$1", the shell will look for a binary with the above name (instead of just clang) and always fail detection of any CFLAGS. By adding -c we prevent the compiler from failing because it can't link a user space program (when what we're looking for, is whether a specific compiler flag can be used to compile a coreboot object file) Change-Id: I1e9ff32fe40efbe3224c69785f31bc277f21d21b Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Reviewed-on: http://review.coreboot.org/10816 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> See http://review.coreboot.org/10816 for details. -gerrit

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Patch merged into coreboot/master: buildgcc: work around bug in --print-librt-file-name
by gerrit＠coreboot.org 07 Jul '15

07 Jul '15

the following patch was just integrated into master: commit e9e6e3d93c67c0e5df1b32fe37b1956624503c97 Author: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Date: Tue Jul 7 00:20:42 2015 +0200 buildgcc: work around bug in --print-librt-file-name Running "clang -target i386-elf --print-librt-file-name" prints [..]/bin/../lib/clang/3.6.1/lib/libclang_rt.builtins-i386.a However, the correct path is [..]/lib/linux/libclang_rt.builtins-i386.a on a Linux host. Hence, create symbolic links to make sure that our build system finds the file where it expects it. Change-Id: I21ef5c4a690d83c326717ca55c5ace558257a0ec Signed-off-by: Stefan Reinauer <stefan.reinauer(a)coreboot.org> Reviewed-on: http://review.coreboot.org/10815 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> See http://review.coreboot.org/10815 for details. -gerrit

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Patch merged into coreboot/master: mainboard/msi/ms7135: remove bogus MADT IRQ override for timer
by gerrit＠coreboot.org 07 Jul '15

07 Jul '15

the following patch was just integrated into master: commit a660bc192167f86abb4a2b52cdd675bd5ef5fc03 Author: Jonathan A. Kollasch <jakllsch(a)kollasch.net> Date: Tue Jun 23 09:43:46 2015 -0500 mainboard/msi/ms7135: remove bogus MADT IRQ override for timer Stops Linux from complaining: [0.097286] ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=0 pin2=0 [0.100005] ..MP-BIOS bug: 8254 timer not connected to IO-APIC [0.100005] ...trying to set up timer (IRQ0) through the 8259A ... [0.100005] ..... (found apic 0 pin 0) ... [0.143507] ....... works. Change-Id: Ic09a6940f80e3da2c1f3c0ef04fb50a4096b7943 Signed-off-by: Jonathan A. Kollasch <jakllsch(a)kollasch.net> Reviewed-on: http://review.coreboot.org/10642 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi(a)google.com> See http://review.coreboot.org/10642 for details. -gerrit

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coreboot-gerrit July 2015