the following patch was just integrated into master:
commit c06af9eb8b662f23a7f93ff781f7a5b5edefbb9c
Author: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
Date: Thu Jul 3 12:11:05 2014 +0300
Drop redundant select CACHE_AS_RAM
The few remaining boards without CAR override this with
select ROMCC.
Change-Id: Ifd5223e67f6a2dadb47846bdaab40b1be763cf69
Signed-off-by: Kyösti Mälkki <kyosti.malkki(a)gmail.com>
Reviewed-on: http://review.coreboot.org/6172
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan(a)alterapraxis.com>
Reviewed-by: Paul Menzel <paulepanter(a)users.sourceforge.net>
Reviewed-by: Patrick Georgi <patrick(a)georgi-clan.de>
See http://review.coreboot.org/6172 for details.
-gerrit
the following patch was just integrated into master:
commit 8aeab56b102be493b7a592d45bb3646f8230e7be
Author: Paul Menzel <paulepanter(a)users.sourceforge.net>
Date: Thu Jun 5 08:50:17 2014 +0200
lenovo/x60/i915.c: Use define for `BSM`
Although it builds without any further changes, including the header
src/northbridge/intel/i945/i945.h
where `BSM` is defined, would be useful. Unfortunately that conflicts
with the already included header `southbridge/intel/bd82x6x/pch.h`,
so it is left as is.
Change-Id: I7c0a795338c34038169e082446907987364a0e88
Signed-off-by: Paul Menzel <paulepanter(a)users.sourceforge.net>
Reviewed-on: http://review.coreboot.org/5932
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin(a)google.com>
See http://review.coreboot.org/5932 for details.
-gerrit
the following patch was just integrated into master:
commit 9238c11be4f8e0909b0ad1ecfdebf891337bb1a0
Author: Duncan Laurie <dlaurie(a)chromium.org>
Date: Fri Apr 19 11:03:40 2013 -0700
intel/lynxpoint: Build intermediate step to add Lynx Point ME image
This is needed to successfully build fox_wtm2 from external repo.
BUG=chrome-os-partner:18638
BRANCH=none
TEST=manual: successfully compile coreboot for fox_wtm2 and
create an image with chromeos-bootimage/cros_bundle_firmware
Change-Id: Iaa4e9983faa1d86c2b29d8fd4f577be035497e38
Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/48676
Reviewed-by: Aaron Durbin <adurbin(a)chromium.org>
Reviewed-on: http://review.coreboot.org/4132
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick(a)georgi-clan.de>
See http://review.coreboot.org/4132 for details.
-gerrit
the following patch was just integrated into master:
commit 88c873a07ecff2c6f5ec04d178251315cf01e06a
Author: Duncan Laurie <dlaurie(a)chromium.org>
Date: Mon Sep 16 13:51:08 2013 -0700
intel/lynxpoint: xhci: Port reset changes on suspend/resume
Some USB3 devices are not showing up after suspend/resume cycles.
In particular if a device uses a lower power state like U2 it may
take longer to come up and the firmware needs to wait after sending
a warm port reset.
In addition skipping port reset to connected ports in the way into
suspend was causing problems so instead send all ports a reset
before suspend.
BUG=chrome-os-partner:22402
BRANCH=falco,peppy,leon,wolf
TEST=manual:
Suspend/resume with ADATA HE720 HDD (and other devices) both
connected at suspend and connecting while in suspend and ensure
that the devices always show up in the kernel.
Change-Id: Ib7b15dc65792742b4ceb7dcfc4b2c83192eafcc2
Signed-off-by: Duncan Laurie <dlaurie(a)chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/169548
Reviewed-by: Aaron Durbin <adurbin(a)chromium.org>
Reviewed-on: http://review.coreboot.org/6015
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick(a)georgi-clan.de>
See http://review.coreboot.org/6015 for details.
-gerrit
the following patch was just integrated into master:
commit 779e178353a1adb6e6bee8fcad688bcbceb172cf
Author: Stefan Reinauer <reinauer(a)chromium.org>
Date: Mon Oct 7 16:29:54 2013 -0700
intel/lynxpoint: Export pch_enable_lpc() for Super I/O systems
In order to enable a Super I/O in non Chrome EC systems we
need to make pch_enable_lpc() available to the mainboard
romstage.c
BUG=none
BRANCH=none
TEST=boot ChromeOS on Beltino
Change-Id: I34e7d23012e1852c69e82ba7cdc81a05751846de
Signed-off-by: Stefan Reinauer <reinauer(a)google.com>
Signed-off-by: Stefan Reinauer <reinauer(a)chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/172180
Reviewed-by: Duncan Laurie <dlaurie(a)chromium.org>
Reviewed-by: Aaron Durbin <adurbin(a)chromium.org>
Commit-Queue: Stefan Reinauer <reinauer(a)chromium.org>
Reviewed-on: http://review.coreboot.org/6019
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick(a)georgi-clan.de>
See http://review.coreboot.org/6019 for details.
-gerrit