coreboot-gerrit January 2014

coreboot-gerrit@coreboot.org

1 participants
1801 discussions

New patch to review for coreboot: 4a7aa66 libpayload: Bring keyboard_wait_write() back
by Patrick Georgi 10 Jan '14

10 Jan '14

Patrick Georgi (patrick(a)georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4649 -gerrit commit 4a7aa6610e08b3dbac7b5018ec08cd9192be83f6 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Fri Jan 10 20:40:59 2014 +0100 libpayload: Bring keyboard_wait_write() back Code is using it... Change-Id: I6894b45cbbf70c8e7ce37ce18d93cadf0ea9fbfc Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> --- payloads/libpayload/drivers/keyboard.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/payloads/libpayload/drivers/keyboard.c b/payloads/libpayload/drivers/keyboard.c index 0175bc7..ddedbd3 100644 --- a/payloads/libpayload/drivers/keyboard.c +++ b/payloads/libpayload/drivers/keyboard.c @@ -258,6 +258,16 @@ int keyboard_getchar(void) return ret; } +static int keyboard_wait_write(void) +{ + int retries = 10000; + + while(retries-- && (inb(0x64) & 0x02)) + udelay(50); + + return (retries <= 0) ? -1 : 0; +} + /** * Set keyboard layout * @param country string describing the keyboard layout language.

1 0

New patch to review for filo: 73484d6 drop hexdump() declaration
by Patrick Georgi 10 Jan '14

10 Jan '14

Patrick Georgi (patrick(a)georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4648 -gerrit commit 73484d659450e7cb8a44ee3c47003c187b947793 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Fri Jan 10 20:23:22 2014 +0100 drop hexdump() declaration Change-Id: I2a2691a33cde3b06111b92d63b81f4e5c2bd3f53 Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> --- include/lib.h | 2 -- 1 file changed, 2 deletions(-) diff --git a/include/lib.h b/include/lib.h index e007423..4f1b645 100644 --- a/include/lib.h +++ b/include/lib.h @@ -25,8 +25,6 @@ unsigned long long simple_strtoull(const char *cp,char **endp,unsigned int base); unsigned long long strtoull_with_suffix(const char *cp,char **endp,unsigned int base); -void hexdump(const void *p, unsigned int len); - long long simple_strtoll(const char *cp,char **endp,unsigned int base); #define abort() halt()

1 0

New patch to review for coreboot: 1ccfb10 filo payload: Fix the build
by Patrick Georgi 10 Jan '14

10 Jan '14

Patrick Georgi (patrick(a)georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4647 -gerrit commit 1ccfb10152371ac6deebba4926cbcf28fd3b6b61 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Fri Jan 10 20:30:16 2014 +0100 filo payload: Fix the build Also strip down the config that's set since these are actually SeaBIOS options, not FILO... Change-Id: I5dbe6255996f9e115699ff2a83fb3450533520ee Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> --- payloads/external/FILO/Makefile.inc | 15 ++++++--------- 1 file changed, 6 insertions(+), 9 deletions(-) diff --git a/payloads/external/FILO/Makefile.inc b/payloads/external/FILO/Makefile.inc index 311b3c8..72f86bc 100644 --- a/payloads/external/FILO/Makefile.inc +++ b/payloads/external/FILO/Makefile.inc @@ -1,5 +1,5 @@ -TAG-$(CONFIG_FILO_MASTER)= -NAME-$(CONFIG_FILO_MASTER)=HEAD +TAG-$(CONFIG_FILO_MASTER)=origin/master +NAME-$(CONFIG_FILO_MASTER)=MASTER TAG-$(CONFIG_FILO_STABLE)=4dbb31a64fe5b1c7e3025ab34619220609897646 NAME-$(CONFIG_FILO_STABLE)=STABLE @@ -13,7 +13,7 @@ checkout: git clone http://review.coreboot.org/p/filo.git cd filo && \ git checkout master && \ - git pull; \ + git remote update && \ test -n $(TAG-y) && \ git branch -f $(NAME-y) $(TAG-y) && \ git checkout $(NAME-y) @@ -21,14 +21,11 @@ checkout: config: libpayload echo " CONFIG FILO $(NAME-y)" $(MAKE) -C filo defconfig LIBCONFIG_PATH=../../../libpayload - echo "CONFIG_COREBOOT=y" >> filo/.config - echo "CONFIG_DEBUG_SERIAL=y" >> filo/.config - echo "CONFIG_COREBOOT_FLASH=y" >> filo/.config - echo "CONFIG_LZMA=y" >> filo/.config - echo "CONFIG_FLASH_FLOPPY=y" >> filo/.config - echo "CONFIG_VGAHOOKS=y" >> filo/.config + # This shows how to force a previously unset .config option *on* + #echo "CONFIG_VGAHOOKS=y" >> filo/.config # This shows how to force a previously set .config option *off* #echo "# CONFIG_SMBIOS is not set" >> filo/.config + $(MAKE) -C filo oldconfig LIBCONFIG_PATH=../../../libpayload filo: config echo " MAKE FILO $(NAME-y)"

1 0

Patch set updated for coreboot: bca260c X201: Fix SMI bindings.
by Vladimir Serbinenko 10 Jan '14

10 Jan '14

Vladimir Serbinenko (phcoder(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4645 -gerrit commit bca260ccdd31a225f749fceabae129c98e77164e Author: Vladimir Serbinenko <phcoder(a)gmail.com> Date: Fri Jan 10 19:43:33 2014 +0100 X201: Fix SMI bindings. Doesn't have a visible effect currently but it's better if those bindings are correct. Change-Id: I0f1a468e59429b14db139cc48e1e68c0e1841300 Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> --- src/mainboard/lenovo/x201/Makefile.inc | 1 + src/mainboard/lenovo/x201/smihandler.c | 21 ++++++++++++++++++++- 2 files changed, 21 insertions(+), 1 deletion(-) diff --git a/src/mainboard/lenovo/x201/Makefile.inc b/src/mainboard/lenovo/x201/Makefile.inc index 9055c9e..285e0d0 100644 --- a/src/mainboard/lenovo/x201/Makefile.inc +++ b/src/mainboard/lenovo/x201/Makefile.inc @@ -18,6 +18,7 @@ ## smm-$(CONFIG_HAVE_SMI_HANDLER) += dock.c +smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c romstage-y += dock.c ramstage-y += dock.c ramstage-y += gma.c diff --git a/src/mainboard/lenovo/x201/smihandler.c b/src/mainboard/lenovo/x201/smihandler.c index e99030b..0529818 100644 --- a/src/mainboard/lenovo/x201/smihandler.c +++ b/src/mainboard/lenovo/x201/smihandler.c @@ -24,6 +24,9 @@ #include <cpu/x86/smm.h> #include "southbridge/intel/ibexpeak/nvs.h" #include "southbridge/intel/ibexpeak/pch.h" +#include "southbridge/intel/ibexpeak/me.h" +#include <northbridge/intel/sandybridge/sandybridge.h> +#include <cpu/intel/model_2065x/model_2065x.h> #include <ec/acpi/ec.h> #include <pc80/mc146818rtc.h> #include <ec/lenovo/h8/h8.h> @@ -134,10 +137,12 @@ static void mainboard_smi_handle_ec_sci(void) void mainboard_smi_gpi(u32 gpi_sts) { - if (gpi_sts & (1 << 12)) + if (gpi_sts & (1 << 1)) mainboard_smi_handle_ec_sci(); } +static int mainboard_finalized = 0; + int mainboard_smi_apmc(u8 data) { u16 pmbase = pci_read_config16(PCI_DEV(0, 0x1f, 0), 0x40) & 0xfffc; @@ -150,6 +155,20 @@ int mainboard_smi_apmc(u8 data) return 0; switch (data) { + case APM_CNT_FINALIZE: + printk(BIOS_DEBUG, "APMC: FINALIZE\n"); + if (mainboard_finalized) { + printk(BIOS_DEBUG, "APMC#: Already finalized\n"); + return 0; + } + + intel_me_finalize_smm(); + intel_pch_finalize_smm(); + intel_sandybridge_finalize_smm(); + intel_model_2065x_finalize_smm(); + + mainboard_finalized = 1; + break; case APM_CNT_ACPI_ENABLE: /* use 0x1600/0x1604 to prevent races with userspace */ ec_set_ports(0x1604, 0x1600);

1 0

New patch to review for coreboot: 03e6030 intel/fsp: Fix microcode including
by Patrick Georgi 10 Jan '14

10 Jan '14

Patrick Georgi (patrick(a)georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4646 -gerrit commit 03e6030c9ad1669fb1b1924afa1b2bf156e1fed1 Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Fri Jan 10 20:01:26 2014 +0100 intel/fsp: Fix microcode including IS_ENABLED() requires the full define (incl. CONFIG_ prefix) Change-Id: I91d504367c75ce3fcecc6fa2499afaa0896595d3 Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> --- src/cpu/intel/fsp_model_206ax/microcode_blob.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/cpu/intel/fsp_model_206ax/microcode_blob.c b/src/cpu/intel/fsp_model_206ax/microcode_blob.c index 309ea75..f4893e8 100644 --- a/src/cpu/intel/fsp_model_206ax/microcode_blob.c +++ b/src/cpu/intel/fsp_model_206ax/microcode_blob.c @@ -18,7 +18,7 @@ */ unsigned microcode[] = { -#if IS_ENABLED(SUPPORT_CPU_UCODE_IN_CBFS) +#if IS_ENABLED(CONFIG_SUPPORT_CPU_UCODE_IN_CBFS) #include "microcode_blob.h" #endif };

1 0

New patch to review for coreboot: 19d45ee X201: Fix SMI bindings.
by Vladimir Serbinenko 10 Jan '14

10 Jan '14

Vladimir Serbinenko (phcoder(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4645 -gerrit commit 19d45ee98177467b7f20c9246ba29604fcb6d6cf Author: Vladimir Serbinenko <phcoder(a)gmail.com> Date: Fri Jan 10 19:43:33 2014 +0100 X201: Fix SMI bindings. Doesn't have a visible effect currently but it's better if those bindings are correct. Change-Id: I0f1a468e59429b14db139cc48e1e68c0e1841300 Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> --- src/mainboard/lenovo/x201/smihandler.c | 21 ++++++++++++++++++++- 1 file changed, 20 insertions(+), 1 deletion(-) diff --git a/src/mainboard/lenovo/x201/smihandler.c b/src/mainboard/lenovo/x201/smihandler.c index e99030b..0529818 100644 --- a/src/mainboard/lenovo/x201/smihandler.c +++ b/src/mainboard/lenovo/x201/smihandler.c @@ -24,6 +24,9 @@ #include <cpu/x86/smm.h> #include "southbridge/intel/ibexpeak/nvs.h" #include "southbridge/intel/ibexpeak/pch.h" +#include "southbridge/intel/ibexpeak/me.h" +#include <northbridge/intel/sandybridge/sandybridge.h> +#include <cpu/intel/model_2065x/model_2065x.h> #include <ec/acpi/ec.h> #include <pc80/mc146818rtc.h> #include <ec/lenovo/h8/h8.h> @@ -134,10 +137,12 @@ static void mainboard_smi_handle_ec_sci(void) void mainboard_smi_gpi(u32 gpi_sts) { - if (gpi_sts & (1 << 12)) + if (gpi_sts & (1 << 1)) mainboard_smi_handle_ec_sci(); } +static int mainboard_finalized = 0; + int mainboard_smi_apmc(u8 data) { u16 pmbase = pci_read_config16(PCI_DEV(0, 0x1f, 0), 0x40) & 0xfffc; @@ -150,6 +155,20 @@ int mainboard_smi_apmc(u8 data) return 0; switch (data) { + case APM_CNT_FINALIZE: + printk(BIOS_DEBUG, "APMC: FINALIZE\n"); + if (mainboard_finalized) { + printk(BIOS_DEBUG, "APMC#: Already finalized\n"); + return 0; + } + + intel_me_finalize_smm(); + intel_pch_finalize_smm(); + intel_sandybridge_finalize_smm(); + intel_model_2065x_finalize_smm(); + + mainboard_finalized = 1; + break; case APM_CNT_ACPI_ENABLE: /* use 0x1600/0x1604 to prevent races with userspace */ ec_set_ports(0x1604, 0x1600);

1 0

New patch to review for coreboot: d0453bb lint: check label style only on changed files
by Patrick Georgi 10 Jan '14

10 Jan '14

Patrick Georgi (patrick(a)georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4644 -gerrit commit d0453bbdc34451d0e57ea9b7693c88a0aefc533f Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Fri Jan 10 19:41:54 2014 +0100 lint: check label style only on changed files This should probably propagate to the other lint checks. The idea: only enforce style on files that were at least touched by the developer. Change-Id: I5ac690ee726e27e80e790fa9a41cd14b84ad2161 Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> --- util/lint/lint-stable-004-style-labels | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/util/lint/lint-stable-004-style-labels b/util/lint/lint-stable-004-style-labels index 31ad74e..10b0408 100755 --- a/util/lint/lint-stable-004-style-labels +++ b/util/lint/lint-stable-004-style-labels @@ -19,4 +19,4 @@ # DESCR: Check that C labels begin at start-of-line LC_ALL=C export LC_ALL -find src -name '*.[scS]' -exec grep '^[[:space:]][[:space:]]*[a-z][a-z]*:[[:space:]]*$' {} + |grep -v "[^a-z_]default:" +git diff --name-status |grep -v "^D" |cut -c3- |grep "^src/.*\.[csS]" | xargs grep -Hn '^[[:space:]][[:space:]]*[a-z][a-z]*:[[:space:]]*$' |grep -v "[^a-z_]default:"

1 0

New patch to review for coreboot: 100166c X201: Enable expresscard hotplug.
by Vladimir Serbinenko 10 Jan '14

10 Jan '14

Vladimir Serbinenko (phcoder(a)gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4643 -gerrit commit 100166c5417ede4ca3090b4e429cfe35be3d2cae Author: Vladimir Serbinenko <phcoder(a)gmail.com> Date: Fri Jan 10 19:30:54 2014 +0100 X201: Enable expresscard hotplug. Change-Id: Ieefc2ad775c16de9aa974b2602d55ee047c9f568 Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> --- src/mainboard/lenovo/x201/acpi/gpe.asl | 14 ++++++++++++++ src/mainboard/lenovo/x201/devicetree.cb | 5 +++++ src/mainboard/lenovo/x201/dsdt.asl | 1 + src/mainboard/lenovo/x201/mainboard.c | 8 ++++++++ src/southbridge/intel/bd82x6x/acpi/pcie.asl | 11 +++++++++++ src/southbridge/intel/bd82x6x/acpi/pcie_port.asl | 6 ++++++ 6 files changed, 45 insertions(+) diff --git a/src/mainboard/lenovo/x201/acpi/gpe.asl b/src/mainboard/lenovo/x201/acpi/gpe.asl index b160b50..e789520 100644 --- a/src/mainboard/lenovo/x201/acpi/gpe.asl +++ b/src/mainboard/lenovo/x201/acpi/gpe.asl @@ -27,4 +27,18 @@ Scope (\_GPE) /* Read EC register to clear wake status */ Store(\_SB.PCI0.LPCB.EC.WAKE, Local0) } + + Method (_L01, 0, NotSerialized) + { + If (\_SB.PCI0.RP04.HPCS) + { + Sleep (100) + Store (0x01, \_SB.PCI0.RP04.HPCS) + If (\_SB.PCI0.RP04.PDC) + { + Store (0x01, \_SB.PCI0.RP04.PDC) + Notify (\_SB.PCI0.RP04, 0x00) + } + } + } } diff --git a/src/mainboard/lenovo/x201/devicetree.cb b/src/mainboard/lenovo/x201/devicetree.cb index f800f9a..20e2259 100644 --- a/src/mainboard/lenovo/x201/devicetree.cb +++ b/src/mainboard/lenovo/x201/devicetree.cb @@ -128,6 +128,11 @@ chip northbridge/intel/nehalem device pci 1b.0 on # Audio Controller subsystemid 0x17aa 0x215e end + + device pci 1c.0 on end # PCIe Port #1 + device pci 1c.3 on end # PCIe Port #4 (Expresscard) + device pci 1c.4 on end # PCIe Port #4 (wlan) + device pci 1d.0 on # USB2 EHCI subsystemid 0x17aa 0x2163 end diff --git a/src/mainboard/lenovo/x201/dsdt.asl b/src/mainboard/lenovo/x201/dsdt.asl index 783122e..0c921a6 100644 --- a/src/mainboard/lenovo/x201/dsdt.asl +++ b/src/mainboard/lenovo/x201/dsdt.asl @@ -23,6 +23,7 @@ #define BRIGHTNESS_UP \_SB.PCI0.GFX0.LCD0.INCB #define BRIGHTNESS_DOWN \_SB.PCI0.GFX0.LCD0.DECB #define ACPI_VIDEO_DEVICE \_SB.PCI0.GFX0 +#define RP04_IS_EXPRESSCARD 1 DefinitionBlock( "dsdt.aml", diff --git a/src/mainboard/lenovo/x201/mainboard.c b/src/mainboard/lenovo/x201/mainboard.c index 6321777..75d875f 100644 --- a/src/mainboard/lenovo/x201/mainboard.c +++ b/src/mainboard/lenovo/x201/mainboard.c @@ -150,6 +150,14 @@ static void mainboard_enable(device_t dev) connected to anything and hence we don't init it. */ pc_keyboard_init(0); + + /* Enable expresscard hotplug events. */ + pci_write_config32(dev_find_slot(0, PCI_DEVFN(0x1c, 3)), + 0xd8, + pci_read_config32(dev_find_slot(0, PCI_DEVFN(0x1c, 3)), 0xd8) + | (1 << 30)); + pci_write_config16(dev_find_slot(0, PCI_DEVFN(0x1c, 3)), + 0x42, 0x142); } struct chip_operations mainboard_ops = { diff --git a/src/southbridge/intel/bd82x6x/acpi/pcie.asl b/src/southbridge/intel/bd82x6x/acpi/pcie.asl index 934cf78..785b486 100644 --- a/src/southbridge/intel/bd82x6x/acpi/pcie.asl +++ b/src/southbridge/intel/bd82x6x/acpi/pcie.asl @@ -167,6 +167,17 @@ Device (RP04) { Return (IRQM (RPPN)) } + +#ifdef RP04_IS_EXPRESSCARD + Device (SLOT) + { + Name (_ADR, 0x00) + Method (_RMV, 0, NotSerialized) + { + Return (0x01) + } + } +#endif } Device (RP05) diff --git a/src/southbridge/intel/bd82x6x/acpi/pcie_port.asl b/src/southbridge/intel/bd82x6x/acpi/pcie_port.asl index fedd9c9..7c50bd6 100644 --- a/src/southbridge/intel/bd82x6x/acpi/pcie_port.asl +++ b/src/southbridge/intel/bd82x6x/acpi/pcie_port.asl @@ -27,4 +27,10 @@ Field (RPCS, AnyAcc, NoLock, Preserve) Offset (0x4c), // Link Capabilities , 24, RPPN, 8, // Root Port Number + Offset (0x5A), + , 3, + PDC, 1, + Offset (0xDF), + , 6, + HPCS, 1, }

1 0

New patch to review for coreboot: 304bc2d 3rdparty: update to current HEAD
by Patrick Georgi 10 Jan '14

10 Jan '14

Patrick Georgi (patrick(a)georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4642 -gerrit commit 304bc2d06bea596c6084e9fd8f06c80cb2e8a7ec Author: Patrick Georgi <patrick(a)georgi-clan.de> Date: Fri Jan 10 19:28:18 2014 +0100 3rdparty: update to current HEAD It includes a sandybridge fix. Change-Id: I84ff1ac1622b10a4a4aa42517bac0c024c386998 Signed-off-by: Patrick Georgi <patrick(a)georgi-clan.de> --- 3rdparty | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/3rdparty b/3rdparty index aebd218..324ec3c 160000 --- a/3rdparty +++ b/3rdparty @@ -1 +1 @@ -Subproject commit aebd21811dc9c9a171e629150d9d8a239a8b0338 +Subproject commit 324ec3cb642a278d6d97ae809bc6098045bc6e65

1 0

Patch merged into coreboot/master: a092df0 Remove sprintf
by gerrit＠coreboot.org 10 Jan '14

10 Jan '14

the following patch was just integrated into master: commit a092df0d335aa05256e05fcee9f39f5d36096658 Author: Vladimir Serbinenko <phcoder(a)gmail.com> Date: Tue Nov 26 02:42:52 2013 +0100 Remove sprintf Remove sprintf as if you can't easily use snprintf then you probably have buffer overflow. Change-Id: Ic4570e099a52d743aca938a2bfadb95981adc503 Signed-off-by: Vladimir Serbinenko <phcoder(a)gmail.com> See http://review.coreboot.org/4280 for details. -gerrit

1 0

Jump to page:

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

coreboot-gerrit January 2014