the following patch was just integrated into master:
commit 7fa726a9146ab9a6468a639ef6a95e5d69fbde02
Author: Gabe Black <gabeblack(a)chromium.org>
Date: Mon Apr 15 18:09:15 2013 -0700
snow: Add support for EC based recovery.
Implement the get_recovery_mode_switch function using the newly added I2C
based Chrome EC support.
Change-Id: I9d0200629887f202edf017cba3222a7d7f5b053e
Signed-off-by: Gabe Black <gabeblack(a)chromium.org>
Reviewed-on: http://review.coreboot.org/3092
Reviewed-by: David Hendricks <dhendrix(a)chromium.org>
Tested-by: build bot (Jenkins)
Build-Tested: build bot (Jenkins) at Tue Apr 16 07:07:30 2013, giving +1
Reviewed-By: David Hendricks <dhendrix(a)chromium.org> at Tue Apr 16 06:12:30 2013, giving +2
See http://review.coreboot.org/3092 for details.
-gerrit
the following patch was just integrated into master:
commit a554e237231ad12c8dc23d1173f55fb4e1d100b3
Author: Gabe Black <gabeblack(a)chromium.org>
Date: Mon Apr 15 16:25:02 2013 -0700
snow: Fix some comments in chromeos.c.
The comment about the lid switch was left over from when this file was copied
from another board and was incorrect. Also fixed a capitalization
inconsistency.
Change-Id: Icefd19047971e13c08f615578e4a181e82a2997f
Signed-off-by: Gabe Black <gabeblack(a)chromium.org>
Reviewed-on: http://review.coreboot.org/3091
Reviewed-by: David Hendricks <dhendrix(a)chromium.org>
Tested-by: build bot (Jenkins)
Build-Tested: build bot (Jenkins) at Tue Apr 16 06:37:01 2013, giving +1
Reviewed-By: David Hendricks <dhendrix(a)chromium.org> at Tue Apr 16 06:08:40 2013, giving +2
See http://review.coreboot.org/3091 for details.
-gerrit
Gabe Black (gabeblack(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3098
-gerrit
commit 349621bdb6d5443b8e2a3929c66d8d93e4c333a0
Author: Gabe Black <gabeblack(a)chromium.org>
Date: Mon Apr 15 20:36:01 2013 -0700
snow: Return 0 from get_recovery_mode_from_vbnv.
This function isn't yet used for much, or perhaps anything, but where it
appears in the code it's ored with other values. Since we're not actually
retrieving anything, it might be best to return 0 so that the other values
that are being ored in can be expressed and this function can stay dormant
until it actually has something to do.
Change-Id: I6edc222a5c2d00ece2ecfad5191a615331eeaf16
Signed-off-by: Gabe Black <gabeblack(a)chromium.org>
---
src/mainboard/google/snow/chromeos.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mainboard/google/snow/chromeos.c b/src/mainboard/google/snow/chromeos.c
index 0c47458..6e46d13 100644
--- a/src/mainboard/google/snow/chromeos.c
+++ b/src/mainboard/google/snow/chromeos.c
@@ -116,5 +116,5 @@ int get_recovery_mode_switch(void)
int get_recovery_mode_from_vbnv(void)
{
- return 1;
+ return 0;
}
Gabe Black (gabeblack(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3096
-gerrit
commit 02f4c35c89e927a295f865b808f65e774c2f36f0
Author: Gabe Black <gabeblack(a)chromium.org>
Date: Mon Apr 15 19:47:40 2013 -0700
snow: Configure the power button as an input GPIO.
We need to read it to report its value to the payload. The kernel will
reconfigure it as an external interrupt, but we'll make it a regular input
for now.
Change-Id: I019bd2c2731144d3b7bb53fad0c2c903874f616c
Signed-off-by: Gabe Black <gabeblack(a)chromium.org>
---
src/mainboard/google/snow/romstage.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/src/mainboard/google/snow/romstage.c b/src/mainboard/google/snow/romstage.c
index 96e93da..4dce439 100644
--- a/src/mainboard/google/snow/romstage.c
+++ b/src/mainboard/google/snow/romstage.c
@@ -128,7 +128,8 @@ static void chromeos_gpios(void)
enum {
WP_GPIO = 6,
RECMODE_GPIO = 0,
- LID_GPIO = 5
+ LID_GPIO = 5,
+ POWER_GPIO = 3
};
gpio_pt1 = (struct exynos5_gpio_part1 *)EXYNOS5_GPIO_PART1_BASE;
@@ -142,6 +143,9 @@ static void chromeos_gpios(void)
s5p_gpio_direction_input(&gpio_pt2->x3, LID_GPIO);
s5p_gpio_set_pull(&gpio_pt2->x3, LID_GPIO, EXYNOS_GPIO_PULL_NONE);
+
+ s5p_gpio_direction_input(&gpio_pt2->x1, POWER_GPIO);
+ s5p_gpio_set_pull(&gpio_pt2->x1, POWER_GPIO, EXYNOS_GPIO_PULL_NONE);
}
void main(void)
Gabe Black (gabeblack(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3098
-gerrit
commit ae4bbaec045003d62666ab2e043de24199e54cfd
Author: Gabe Black <gabeblack(a)chromium.org>
Date: Mon Apr 15 20:36:01 2013 -0700
snow: Return 0 from get_recovery_mode_from_vbnv.
This function isn't yet used for much, or perhaps anything, but where it
appears in the code it's ored with other values. Since we're not actually
retrieving anything, it might be best to return 0 so that the other values
that are being ored in can be expressed and this function can stay dormant
until it actually has something to do.
Change-Id: I6edc222a5c2d00ece2ecfad5191a615331eeaf16
Signed-off-by: Gabe Black <gabeblack(a)chromium.org>
---
src/mainboard/google/snow/chromeos.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mainboard/google/snow/chromeos.c b/src/mainboard/google/snow/chromeos.c
index 0c47458..6e46d13 100644
--- a/src/mainboard/google/snow/chromeos.c
+++ b/src/mainboard/google/snow/chromeos.c
@@ -116,5 +116,5 @@ int get_recovery_mode_switch(void)
int get_recovery_mode_from_vbnv(void)
{
- return 1;
+ return 0;
}
Gabe Black (gabeblack(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3096
-gerrit
commit 98d3e24c00845e56d7323351bbfc4ca905fc4fbc
Author: Gabe Black <gabeblack(a)chromium.org>
Date: Mon Apr 15 19:47:40 2013 -0700
snow: Configure the power button as an input GPIO.
We need to read it to report its value to the payload. The kernel will
reconfigure it as an external interrupt, but we'll make it a regular input
for now.
Change-Id: I019bd2c2731144d3b7bb53fad0c2c903874f616c
Signed-off-by: Gabe Black <gabeblack(a)chromium.org>
---
src/mainboard/google/snow/romstage.c | 14 +++++++++-----
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/src/mainboard/google/snow/romstage.c b/src/mainboard/google/snow/romstage.c
index 73c0595..5178bb0 100644
--- a/src/mainboard/google/snow/romstage.c
+++ b/src/mainboard/google/snow/romstage.c
@@ -128,7 +128,8 @@ static void chromeos_gpios(void)
enum {
WP_GPIO = 6,
RECMODE_GPIO = 0,
- LID_GPIO = 5
+ LID_GPIO = 5,
+ POWER_GPIO = 3
};
gpio_pt1 = (struct exynos5_gpio_part1 *)EXYNOS5_GPIO_PART1_BASE;
@@ -137,12 +138,15 @@ static void chromeos_gpios(void)
s5p_gpio_direction_input(&gpio_pt1->d1, WP_GPIO);
s5p_gpio_set_pull(&gpio_pt1->d1, WP_GPIO, EXYNOS_GPIO_PULL_NONE);
- s5p_gpio_direction_input(&gpio_pt1->y1, FORCE_RECOVERY_MODE);
- s5p_gpio_set_pull(&gpio_pt1->y1, FORCE_RECOVERY_MODE,
+ s5p_gpio_direction_input(&gpio_pt1->y1, RECMODE_GPIO);
+ s5p_gpio_set_pull(&gpio_pt1->y1, RECMODE_GPIO,
EXYNOS_GPIO_PULL_NONE);
- s5p_gpio_direction_input(&gpio_pt2->x3, LID_OPEN);
- s5p_gpio_set_pull(&gpio_pt2->x3, LID_OPEN, EXYNOS_GPIO_PULL_NONE);
+ s5p_gpio_direction_input(&gpio_pt2->x3, LID_GPIO);
+ s5p_gpio_set_pull(&gpio_pt2->x3, LID_GPIO, EXYNOS_GPIO_PULL_NONE);
+
+ s5p_gpio_direction_input(&gpio_pt2->x1, POWER_GPIO);
+ s5p_gpio_set_pull(&gpio_pt2->x1, POWER_GPIO, EXYNOS_GPIO_PULL_NONE);
}
void main(void)
Gabe Black (gabeblack(a)chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3095
-gerrit
commit b4dc6ea7fff7ef73d5b261a232fb6c7d8715fc87
Author: Gabe Black <gabeblack(a)chromium.org>
Date: Mon Apr 15 19:45:10 2013 -0700
snow: Fix the name of some constants in romstage.c.
These names were inherited from chromeos.c where they've already been
fixed.
Change-Id: I7ad57b979b7b8f42f6bd68d1ecf887caba3fa3f1
Signed-off-by: Gabe Black <gabeblack(a)chromium.org>
---
src/mainboard/google/snow/romstage.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/mainboard/google/snow/romstage.c b/src/mainboard/google/snow/romstage.c
index dda4e7c..73c0595 100644
--- a/src/mainboard/google/snow/romstage.c
+++ b/src/mainboard/google/snow/romstage.c
@@ -127,8 +127,8 @@ static void chromeos_gpios(void)
enum {
WP_GPIO = 6,
- FORCE_RECOVERY_MODE = 0,
- LID_OPEN = 5
+ RECMODE_GPIO = 0,
+ LID_GPIO = 5
};
gpio_pt1 = (struct exynos5_gpio_part1 *)EXYNOS5_GPIO_PART1_BASE;