Yidi Lin has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/46407 )
Change subject: WIP: dcm: mt8192: Enable DCM ......................................................................
WIP: dcm: mt8192: Enable DCM
Enable DCM settings.
/* INFRACFG_AO */ dcm_infracfg_ao_aximem_bus_dcm(on); dcm_infracfg_ao_infra_bus_dcm(on); dcm_infracfg_ao_infra_conn_bus_dcm(on); dcm_infracfg_ao_infra_rx_p2p_dcm(on); dcm_infracfg_ao_peri_bus_dcm(on); dcm_infracfg_ao_peri_module_dcm(on); /* INFRA_AO_BCRM */ dcm_infra_ao_bcrm_infra_bus_dcm(on); dcm_infra_ao_bcrm_peri_bus_dcm(on); /* INFRACFG_AO_MEM */ /* move to preloader */ /* dcm_infracfg_ao_mem_dcm_emi_group(on); */
Change-Id: I5528d176b6bb1f9a5960de981766235510e6ebf1 --- M src/soc/mediatek/mt8192/include/soc/pll.h M src/soc/mediatek/mt8192/pll.c 2 files changed, 76 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/46407/1
diff --git a/src/soc/mediatek/mt8192/include/soc/pll.h b/src/soc/mediatek/mt8192/include/soc/pll.h index 09c4c471..35e8ff2 100644 --- a/src/soc/mediatek/mt8192/include/soc/pll.h +++ b/src/soc/mediatek/mt8192/include/soc/pll.h @@ -306,4 +306,59 @@ DEFINE_BITFIELD(CLK26CALI_0_TRIGGER, 4, 4) DEFINE_BITFIELD(CLK26CALI_1_LOAD_CNT, 25, 16)
+enum { + INFRACFG_AO_AXIMEM_BUS_DCM_REG0_MASK = ((0x1f << 12) | \ + (0x1 << 17) | \ + (0x1 << 18)), + INFRACFG_AO_AXIMEM_BUS_DCM_REG0_ON = ((0x10 << 12) | \ + (0x1 << 17) | \ + (0x0 << 18)), + INFRACFG_AO_INFRA_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ + (0x1 << 1) | \ + (0x1 << 3) | \ + (0x1 << 4) | \ + (0x1f << 5) | \ + (0x1f << 10) | \ + (0x1 << 20) | \ + (0x1 << 23) | \ + (0x1 << 30)), + INFRACFG_AO_INFRA_BUS_DCM_REG0_ON = ((0x1 << 0) | \ + (0x1 << 1) | \ + (0x0 << 3) | \ + (0x0 << 4) | \ + (0x10 << 5) | \ + (0x1 << 10) | \ + (0x1 << 20) | \ + (0x1 << 23) | \ + (0x1 << 30)), + INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_MASK = ((0x1 << 8)), + INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_ON = ((0x1 << 8)), + INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_MASK = ((0x1 << 8)), + INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_ON = ((0x0 << 8)), + INFRACFG_AO_INFRA_RX_P2P_DCM_REG0_MASK = ((0xf << 0)), + INFRACFG_AO_INFRA_RX_P2P_DCM_REG0_ON = ((0x0 << 0)), + INFRACFG_AO_PERI_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ + (0x1 << 1) | \ + (0x1 << 3) | \ + (0x1 << 4) | \ + (0x1f << 5) | \ + (0x1f << 10) | \ + (0x1f << 15) | \ + (0x1 << 20) | \ + (0x1 << 21)), + INFRACFG_AO_PERI_BUS_DCM_REG0_ON = ((0x1 << 0) | \ + (0x1 << 1) | \ + (0x0 << 3) | \ + (0x0 << 4) | \ + (0x1f << 5) | \ + (0x0 << 10) | \ + (0x1f << 15) | \ + (0x1 << 20) | \ + (0x1 << 21)), + INFRACFG_AO_PERI_MODULE_DCM_REG0_MASK = ((0x1 << 29) | \ + (0x1 << 31)), + INFRACFG_AO_PERI_MODULE_DCM_REG0_ON = ((0x1 << 29) | \ + (0x1 << 31)), +}; + #endif /* SOC_MEDIATEK_MT8192_PLL_H */ diff --git a/src/soc/mediatek/mt8192/pll.c b/src/soc/mediatek/mt8192/pll.c index 24cfafd..0366cd6 100644 --- a/src/soc/mediatek/mt8192/pll.c +++ b/src/soc/mediatek/mt8192/pll.c @@ -427,6 +427,27 @@ /* enable infrasys DCM */ setbits32(&mt8192_infracfg->infra_bus_dcm_ctrl, 0x3 << 21);
+ // dcm_infracfg_ao_aximem_bus_dcm + clrsetbits_le32(&mt8192_infracfg->infra_aximem_idle_bit_en_0, + INFRACFG_AO_AXIMEM_BUS_DCM_REG0_MASK, INFRACFG_AO_AXIMEM_BUS_DCM_REG0_ON); + // dcm_infracfg_ao_infra_bus_dcm + clrsetbits_le32(&mt8192_infracfg->infra_bus_dcm_ctrl, + INFRACFG_AO_INFRA_BUS_DCM_REG0_MASK, INFRACFG_AO_INFRA_BUS_DCM_REG0_ON); + // dcm_infracfg_ao_infra_conn_bus_dcm + clrsetbits_le32(&mt8192_infracfg->module_sw_cg_2_set, + INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_ON); + clrsetbits_le32(&mt8192_infracfg->module_sw_cg_2_clr, + INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_ON); + // dcm_infracfg_ao_infra_rx_p2p_dcm + clrsetbits_le32(&mt8192_infracfg->p2p_rx_clk_on, + INFRACFG_AO_INFRA_RX_P2P_DCM_REG0_MASK, INFRACFG_AO_INFRA_RX_P2P_DCM_REG0_ON); + // dcm_infracfg_ao_peri_bus_dcm + clrsetbits_le32(&mt8192_infracfg->peri_bus_dcm_ctrl, + INFRACFG_AO_PERI_BUS_DCM_REG0_MASK, INFRACFG_AO_PERI_BUS_DCM_REG0_ON); + // dcm_infracfg_ao_peri_module_dcm + clrsetbits_le32(&mt8192_infracfg->peri_bus_dcm_ctrl, + INFRACFG_AO_PERI_MODULE_DCM_REG0_MASK, INFRACFG_AO_PERI_MODULE_DCM_REG0_ON); + /* initialize SPM request */ setbits32(&mtk_topckgen->clk_scp_cfg_0, 0x3ff); clrsetbits32(&mtk_topckgen->clk_scp_cfg_1, 0x100c, 0x3);
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46407 )
Change subject: WIP: dcm: mt8192: Enable DCM ......................................................................
Patch Set 1:
(10 comments)
https://review.coreboot.org/c/coreboot/+/46407/1/src/soc/mediatek/mt8192/inc... File src/soc/mediatek/mt8192/include/soc/pll.h:
https://review.coreboot.org/c/coreboot/+/46407/1/src/soc/mediatek/mt8192/inc... PS1, Line 310: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_MASK = ((0x1f << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/1/src/soc/mediatek/mt8192/inc... PS1, Line 313: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_ON = ((0x10 << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/1/src/soc/mediatek/mt8192/inc... PS1, Line 316: INFRACFG_AO_INFRA_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/1/src/soc/mediatek/mt8192/inc... PS1, Line 325: INFRACFG_AO_INFRA_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/1/src/soc/mediatek/mt8192/inc... PS1, Line 340: INFRACFG_AO_PERI_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/1/src/soc/mediatek/mt8192/inc... PS1, Line 349: INFRACFG_AO_PERI_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/1/src/soc/mediatek/mt8192/inc... PS1, Line 358: INFRACFG_AO_PERI_MODULE_DCM_REG0_MASK = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/1/src/soc/mediatek/mt8192/inc... PS1, Line 360: INFRACFG_AO_PERI_MODULE_DCM_REG0_ON = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/1/src/soc/mediatek/mt8192/pll... File src/soc/mediatek/mt8192/pll.c:
https://review.coreboot.org/c/coreboot/+/46407/1/src/soc/mediatek/mt8192/pll... PS1, Line 438: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_ON); line over 96 characters
https://review.coreboot.org/c/coreboot/+/46407/1/src/soc/mediatek/mt8192/pll... PS1, Line 440: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_ON); line over 96 characters
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46407 )
Change subject: WIP: dcm: mt8192: Enable DCM ......................................................................
Patch Set 2:
(10 comments)
https://review.coreboot.org/c/coreboot/+/46407/2/src/soc/mediatek/mt8192/inc... File src/soc/mediatek/mt8192/include/soc/pll.h:
https://review.coreboot.org/c/coreboot/+/46407/2/src/soc/mediatek/mt8192/inc... PS2, Line 310: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_MASK = ((0x1f << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/2/src/soc/mediatek/mt8192/inc... PS2, Line 313: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_ON = ((0x10 << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/2/src/soc/mediatek/mt8192/inc... PS2, Line 316: INFRACFG_AO_INFRA_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/2/src/soc/mediatek/mt8192/inc... PS2, Line 325: INFRACFG_AO_INFRA_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/2/src/soc/mediatek/mt8192/inc... PS2, Line 340: INFRACFG_AO_PERI_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/2/src/soc/mediatek/mt8192/inc... PS2, Line 349: INFRACFG_AO_PERI_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/2/src/soc/mediatek/mt8192/inc... PS2, Line 358: INFRACFG_AO_PERI_MODULE_DCM_REG0_MASK = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/2/src/soc/mediatek/mt8192/inc... PS2, Line 360: INFRACFG_AO_PERI_MODULE_DCM_REG0_ON = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/2/src/soc/mediatek/mt8192/pll... File src/soc/mediatek/mt8192/pll.c:
https://review.coreboot.org/c/coreboot/+/46407/2/src/soc/mediatek/mt8192/pll... PS2, Line 438: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_ON); line over 96 characters
https://review.coreboot.org/c/coreboot/+/46407/2/src/soc/mediatek/mt8192/pll... PS2, Line 440: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_ON); line over 96 characters
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46407 )
Change subject: WIP: dcm: mt8192: Enable DCM ......................................................................
Patch Set 3:
(10 comments)
https://review.coreboot.org/c/coreboot/+/46407/3/src/soc/mediatek/mt8192/inc... File src/soc/mediatek/mt8192/include/soc/pll.h:
https://review.coreboot.org/c/coreboot/+/46407/3/src/soc/mediatek/mt8192/inc... PS3, Line 310: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_MASK = ((0x1f << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/3/src/soc/mediatek/mt8192/inc... PS3, Line 313: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_ON = ((0x10 << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/3/src/soc/mediatek/mt8192/inc... PS3, Line 316: INFRACFG_AO_INFRA_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/3/src/soc/mediatek/mt8192/inc... PS3, Line 325: INFRACFG_AO_INFRA_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/3/src/soc/mediatek/mt8192/inc... PS3, Line 340: INFRACFG_AO_PERI_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/3/src/soc/mediatek/mt8192/inc... PS3, Line 349: INFRACFG_AO_PERI_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/3/src/soc/mediatek/mt8192/inc... PS3, Line 358: INFRACFG_AO_PERI_MODULE_DCM_REG0_MASK = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/3/src/soc/mediatek/mt8192/inc... PS3, Line 360: INFRACFG_AO_PERI_MODULE_DCM_REG0_ON = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/3/src/soc/mediatek/mt8192/pll... File src/soc/mediatek/mt8192/pll.c:
https://review.coreboot.org/c/coreboot/+/46407/3/src/soc/mediatek/mt8192/pll... PS3, Line 438: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_ON); line over 96 characters
https://review.coreboot.org/c/coreboot/+/46407/3/src/soc/mediatek/mt8192/pll... PS3, Line 440: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_ON); line over 96 characters
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46407 )
Change subject: WIP: dcm: mt8192: Enable DCM ......................................................................
Patch Set 4:
(10 comments)
https://review.coreboot.org/c/coreboot/+/46407/4/src/soc/mediatek/mt8192/inc... File src/soc/mediatek/mt8192/include/soc/pll.h:
https://review.coreboot.org/c/coreboot/+/46407/4/src/soc/mediatek/mt8192/inc... PS4, Line 310: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_MASK = ((0x1f << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/4/src/soc/mediatek/mt8192/inc... PS4, Line 313: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_ON = ((0x10 << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/4/src/soc/mediatek/mt8192/inc... PS4, Line 316: INFRACFG_AO_INFRA_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/4/src/soc/mediatek/mt8192/inc... PS4, Line 325: INFRACFG_AO_INFRA_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/4/src/soc/mediatek/mt8192/inc... PS4, Line 340: INFRACFG_AO_PERI_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/4/src/soc/mediatek/mt8192/inc... PS4, Line 349: INFRACFG_AO_PERI_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/4/src/soc/mediatek/mt8192/inc... PS4, Line 358: INFRACFG_AO_PERI_MODULE_DCM_REG0_MASK = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/4/src/soc/mediatek/mt8192/inc... PS4, Line 360: INFRACFG_AO_PERI_MODULE_DCM_REG0_ON = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/4/src/soc/mediatek/mt8192/pll... File src/soc/mediatek/mt8192/pll.c:
https://review.coreboot.org/c/coreboot/+/46407/4/src/soc/mediatek/mt8192/pll... PS4, Line 438: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_ON); line over 96 characters
https://review.coreboot.org/c/coreboot/+/46407/4/src/soc/mediatek/mt8192/pll... PS4, Line 440: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_ON); line over 96 characters
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46407 )
Change subject: WIP: dcm: mt8192: Enable DCM ......................................................................
Patch Set 5:
(10 comments)
https://review.coreboot.org/c/coreboot/+/46407/5/src/soc/mediatek/mt8192/inc... File src/soc/mediatek/mt8192/include/soc/pll.h:
https://review.coreboot.org/c/coreboot/+/46407/5/src/soc/mediatek/mt8192/inc... PS5, Line 310: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_MASK = ((0x1f << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/5/src/soc/mediatek/mt8192/inc... PS5, Line 313: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_ON = ((0x10 << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/5/src/soc/mediatek/mt8192/inc... PS5, Line 316: INFRACFG_AO_INFRA_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/5/src/soc/mediatek/mt8192/inc... PS5, Line 325: INFRACFG_AO_INFRA_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/5/src/soc/mediatek/mt8192/inc... PS5, Line 340: INFRACFG_AO_PERI_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/5/src/soc/mediatek/mt8192/inc... PS5, Line 349: INFRACFG_AO_PERI_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/5/src/soc/mediatek/mt8192/inc... PS5, Line 358: INFRACFG_AO_PERI_MODULE_DCM_REG0_MASK = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/5/src/soc/mediatek/mt8192/inc... PS5, Line 360: INFRACFG_AO_PERI_MODULE_DCM_REG0_ON = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/5/src/soc/mediatek/mt8192/pll... File src/soc/mediatek/mt8192/pll.c:
https://review.coreboot.org/c/coreboot/+/46407/5/src/soc/mediatek/mt8192/pll... PS5, Line 438: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_ON); line over 96 characters
https://review.coreboot.org/c/coreboot/+/46407/5/src/soc/mediatek/mt8192/pll... PS5, Line 440: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_ON); line over 96 characters
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46407 )
Change subject: WIP: dcm: mt8192: Enable DCM ......................................................................
Patch Set 6:
(10 comments)
https://review.coreboot.org/c/coreboot/+/46407/6/src/soc/mediatek/mt8192/inc... File src/soc/mediatek/mt8192/include/soc/pll.h:
https://review.coreboot.org/c/coreboot/+/46407/6/src/soc/mediatek/mt8192/inc... PS6, Line 310: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_MASK = ((0x1f << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/6/src/soc/mediatek/mt8192/inc... PS6, Line 313: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_ON = ((0x10 << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/6/src/soc/mediatek/mt8192/inc... PS6, Line 316: INFRACFG_AO_INFRA_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/6/src/soc/mediatek/mt8192/inc... PS6, Line 325: INFRACFG_AO_INFRA_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/6/src/soc/mediatek/mt8192/inc... PS6, Line 340: INFRACFG_AO_PERI_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/6/src/soc/mediatek/mt8192/inc... PS6, Line 349: INFRACFG_AO_PERI_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/6/src/soc/mediatek/mt8192/inc... PS6, Line 358: INFRACFG_AO_PERI_MODULE_DCM_REG0_MASK = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/6/src/soc/mediatek/mt8192/inc... PS6, Line 360: INFRACFG_AO_PERI_MODULE_DCM_REG0_ON = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/6/src/soc/mediatek/mt8192/pll... File src/soc/mediatek/mt8192/pll.c:
https://review.coreboot.org/c/coreboot/+/46407/6/src/soc/mediatek/mt8192/pll... PS6, Line 438: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_ON); line over 96 characters
https://review.coreboot.org/c/coreboot/+/46407/6/src/soc/mediatek/mt8192/pll... PS6, Line 440: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_ON); line over 96 characters
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46407 )
Change subject: WIP: dcm: mt8192: Enable DCM ......................................................................
Patch Set 7:
(10 comments)
https://review.coreboot.org/c/coreboot/+/46407/7/src/soc/mediatek/mt8192/inc... File src/soc/mediatek/mt8192/include/soc/pll.h:
https://review.coreboot.org/c/coreboot/+/46407/7/src/soc/mediatek/mt8192/inc... PS7, Line 310: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_MASK = ((0x1f << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/7/src/soc/mediatek/mt8192/inc... PS7, Line 313: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_ON = ((0x10 << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/7/src/soc/mediatek/mt8192/inc... PS7, Line 316: INFRACFG_AO_INFRA_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/7/src/soc/mediatek/mt8192/inc... PS7, Line 325: INFRACFG_AO_INFRA_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/7/src/soc/mediatek/mt8192/inc... PS7, Line 340: INFRACFG_AO_PERI_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/7/src/soc/mediatek/mt8192/inc... PS7, Line 349: INFRACFG_AO_PERI_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/7/src/soc/mediatek/mt8192/inc... PS7, Line 358: INFRACFG_AO_PERI_MODULE_DCM_REG0_MASK = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/7/src/soc/mediatek/mt8192/inc... PS7, Line 360: INFRACFG_AO_PERI_MODULE_DCM_REG0_ON = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/7/src/soc/mediatek/mt8192/pll... File src/soc/mediatek/mt8192/pll.c:
https://review.coreboot.org/c/coreboot/+/46407/7/src/soc/mediatek/mt8192/pll... PS7, Line 438: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_ON); line over 96 characters
https://review.coreboot.org/c/coreboot/+/46407/7/src/soc/mediatek/mt8192/pll... PS7, Line 440: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_ON); line over 96 characters
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46407 )
Change subject: WIP: dcm: mt8192: Enable DCM ......................................................................
Patch Set 8:
(10 comments)
https://review.coreboot.org/c/coreboot/+/46407/8/src/soc/mediatek/mt8192/inc... File src/soc/mediatek/mt8192/include/soc/pll.h:
https://review.coreboot.org/c/coreboot/+/46407/8/src/soc/mediatek/mt8192/inc... PS8, Line 310: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_MASK = ((0x1f << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/8/src/soc/mediatek/mt8192/inc... PS8, Line 313: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_ON = ((0x10 << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/8/src/soc/mediatek/mt8192/inc... PS8, Line 316: INFRACFG_AO_INFRA_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/8/src/soc/mediatek/mt8192/inc... PS8, Line 325: INFRACFG_AO_INFRA_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/8/src/soc/mediatek/mt8192/inc... PS8, Line 340: INFRACFG_AO_PERI_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/8/src/soc/mediatek/mt8192/inc... PS8, Line 349: INFRACFG_AO_PERI_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/8/src/soc/mediatek/mt8192/inc... PS8, Line 358: INFRACFG_AO_PERI_MODULE_DCM_REG0_MASK = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/8/src/soc/mediatek/mt8192/inc... PS8, Line 360: INFRACFG_AO_PERI_MODULE_DCM_REG0_ON = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/8/src/soc/mediatek/mt8192/pll... File src/soc/mediatek/mt8192/pll.c:
https://review.coreboot.org/c/coreboot/+/46407/8/src/soc/mediatek/mt8192/pll... PS8, Line 438: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_ON); line over 96 characters
https://review.coreboot.org/c/coreboot/+/46407/8/src/soc/mediatek/mt8192/pll... PS8, Line 440: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_ON); line over 96 characters
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46407 )
Change subject: WIP: dcm: mt8192: Enable DCM ......................................................................
Patch Set 9:
(10 comments)
https://review.coreboot.org/c/coreboot/+/46407/9/src/soc/mediatek/mt8192/inc... File src/soc/mediatek/mt8192/include/soc/pll.h:
https://review.coreboot.org/c/coreboot/+/46407/9/src/soc/mediatek/mt8192/inc... PS9, Line 310: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_MASK = ((0x1f << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/9/src/soc/mediatek/mt8192/inc... PS9, Line 313: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_ON = ((0x10 << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/9/src/soc/mediatek/mt8192/inc... PS9, Line 316: INFRACFG_AO_INFRA_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/9/src/soc/mediatek/mt8192/inc... PS9, Line 325: INFRACFG_AO_INFRA_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/9/src/soc/mediatek/mt8192/inc... PS9, Line 340: INFRACFG_AO_PERI_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/9/src/soc/mediatek/mt8192/inc... PS9, Line 349: INFRACFG_AO_PERI_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/9/src/soc/mediatek/mt8192/inc... PS9, Line 358: INFRACFG_AO_PERI_MODULE_DCM_REG0_MASK = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/9/src/soc/mediatek/mt8192/inc... PS9, Line 360: INFRACFG_AO_PERI_MODULE_DCM_REG0_ON = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/9/src/soc/mediatek/mt8192/pll... File src/soc/mediatek/mt8192/pll.c:
https://review.coreboot.org/c/coreboot/+/46407/9/src/soc/mediatek/mt8192/pll... PS9, Line 438: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_ON); line over 96 characters
https://review.coreboot.org/c/coreboot/+/46407/9/src/soc/mediatek/mt8192/pll... PS9, Line 440: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_ON); line over 96 characters
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46407 )
Change subject: WIP: dcm: mt8192: Enable DCM ......................................................................
Patch Set 10:
(10 comments)
https://review.coreboot.org/c/coreboot/+/46407/10/src/soc/mediatek/mt8192/in... File src/soc/mediatek/mt8192/include/soc/pll.h:
https://review.coreboot.org/c/coreboot/+/46407/10/src/soc/mediatek/mt8192/in... PS10, Line 310: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_MASK = ((0x1f << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/10/src/soc/mediatek/mt8192/in... PS10, Line 313: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_ON = ((0x10 << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/10/src/soc/mediatek/mt8192/in... PS10, Line 316: INFRACFG_AO_INFRA_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/10/src/soc/mediatek/mt8192/in... PS10, Line 325: INFRACFG_AO_INFRA_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/10/src/soc/mediatek/mt8192/in... PS10, Line 340: INFRACFG_AO_PERI_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/10/src/soc/mediatek/mt8192/in... PS10, Line 349: INFRACFG_AO_PERI_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/10/src/soc/mediatek/mt8192/in... PS10, Line 358: INFRACFG_AO_PERI_MODULE_DCM_REG0_MASK = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/10/src/soc/mediatek/mt8192/in... PS10, Line 360: INFRACFG_AO_PERI_MODULE_DCM_REG0_ON = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/10/src/soc/mediatek/mt8192/pl... File src/soc/mediatek/mt8192/pll.c:
https://review.coreboot.org/c/coreboot/+/46407/10/src/soc/mediatek/mt8192/pl... PS10, Line 438: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_ON); line over 96 characters
https://review.coreboot.org/c/coreboot/+/46407/10/src/soc/mediatek/mt8192/pl... PS10, Line 440: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_ON); line over 96 characters
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46407 )
Change subject: WIP: dcm: mt8192: Enable DCM ......................................................................
Patch Set 11:
(10 comments)
https://review.coreboot.org/c/coreboot/+/46407/11/src/soc/mediatek/mt8192/in... File src/soc/mediatek/mt8192/include/soc/pll.h:
https://review.coreboot.org/c/coreboot/+/46407/11/src/soc/mediatek/mt8192/in... PS11, Line 310: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_MASK = ((0x1f << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/11/src/soc/mediatek/mt8192/in... PS11, Line 313: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_ON = ((0x10 << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/11/src/soc/mediatek/mt8192/in... PS11, Line 316: INFRACFG_AO_INFRA_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/11/src/soc/mediatek/mt8192/in... PS11, Line 325: INFRACFG_AO_INFRA_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/11/src/soc/mediatek/mt8192/in... PS11, Line 340: INFRACFG_AO_PERI_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/11/src/soc/mediatek/mt8192/in... PS11, Line 349: INFRACFG_AO_PERI_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/11/src/soc/mediatek/mt8192/in... PS11, Line 358: INFRACFG_AO_PERI_MODULE_DCM_REG0_MASK = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/11/src/soc/mediatek/mt8192/in... PS11, Line 360: INFRACFG_AO_PERI_MODULE_DCM_REG0_ON = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/11/src/soc/mediatek/mt8192/pl... File src/soc/mediatek/mt8192/pll.c:
https://review.coreboot.org/c/coreboot/+/46407/11/src/soc/mediatek/mt8192/pl... PS11, Line 438: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_ON); line over 96 characters
https://review.coreboot.org/c/coreboot/+/46407/11/src/soc/mediatek/mt8192/pl... PS11, Line 440: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_ON); line over 96 characters
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46407 )
Change subject: WIP: dcm: mt8192: Enable DCM ......................................................................
Patch Set 13:
(10 comments)
https://review.coreboot.org/c/coreboot/+/46407/13/src/soc/mediatek/mt8192/in... File src/soc/mediatek/mt8192/include/soc/pll.h:
https://review.coreboot.org/c/coreboot/+/46407/13/src/soc/mediatek/mt8192/in... PS13, Line 310: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_MASK = ((0x1f << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/13/src/soc/mediatek/mt8192/in... PS13, Line 313: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_ON = ((0x10 << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/13/src/soc/mediatek/mt8192/in... PS13, Line 316: INFRACFG_AO_INFRA_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/13/src/soc/mediatek/mt8192/in... PS13, Line 325: INFRACFG_AO_INFRA_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/13/src/soc/mediatek/mt8192/in... PS13, Line 340: INFRACFG_AO_PERI_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/13/src/soc/mediatek/mt8192/in... PS13, Line 349: INFRACFG_AO_PERI_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/13/src/soc/mediatek/mt8192/in... PS13, Line 358: INFRACFG_AO_PERI_MODULE_DCM_REG0_MASK = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/13/src/soc/mediatek/mt8192/in... PS13, Line 360: INFRACFG_AO_PERI_MODULE_DCM_REG0_ON = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/13/src/soc/mediatek/mt8192/pl... File src/soc/mediatek/mt8192/pll.c:
https://review.coreboot.org/c/coreboot/+/46407/13/src/soc/mediatek/mt8192/pl... PS13, Line 438: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_ON); line over 96 characters
https://review.coreboot.org/c/coreboot/+/46407/13/src/soc/mediatek/mt8192/pl... PS13, Line 440: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_ON); line over 96 characters
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46407 )
Change subject: WIP: dcm: mt8192: Enable DCM ......................................................................
Patch Set 14:
(10 comments)
https://review.coreboot.org/c/coreboot/+/46407/14/src/soc/mediatek/mt8192/in... File src/soc/mediatek/mt8192/include/soc/pll.h:
https://review.coreboot.org/c/coreboot/+/46407/14/src/soc/mediatek/mt8192/in... PS14, Line 310: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_MASK = ((0x1f << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/14/src/soc/mediatek/mt8192/in... PS14, Line 313: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_ON = ((0x10 << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/14/src/soc/mediatek/mt8192/in... PS14, Line 316: INFRACFG_AO_INFRA_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/14/src/soc/mediatek/mt8192/in... PS14, Line 325: INFRACFG_AO_INFRA_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/14/src/soc/mediatek/mt8192/in... PS14, Line 340: INFRACFG_AO_PERI_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/14/src/soc/mediatek/mt8192/in... PS14, Line 349: INFRACFG_AO_PERI_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/14/src/soc/mediatek/mt8192/in... PS14, Line 358: INFRACFG_AO_PERI_MODULE_DCM_REG0_MASK = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/14/src/soc/mediatek/mt8192/in... PS14, Line 360: INFRACFG_AO_PERI_MODULE_DCM_REG0_ON = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/14/src/soc/mediatek/mt8192/pl... File src/soc/mediatek/mt8192/pll.c:
https://review.coreboot.org/c/coreboot/+/46407/14/src/soc/mediatek/mt8192/pl... PS14, Line 438: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_ON); line over 96 characters
https://review.coreboot.org/c/coreboot/+/46407/14/src/soc/mediatek/mt8192/pl... PS14, Line 440: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_ON); line over 96 characters
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46407 )
Change subject: WIP: dcm: mt8192: Enable DCM ......................................................................
Patch Set 15:
(10 comments)
https://review.coreboot.org/c/coreboot/+/46407/15/src/soc/mediatek/mt8192/in... File src/soc/mediatek/mt8192/include/soc/pll.h:
https://review.coreboot.org/c/coreboot/+/46407/15/src/soc/mediatek/mt8192/in... PS15, Line 310: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_MASK = ((0x1f << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/15/src/soc/mediatek/mt8192/in... PS15, Line 313: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_ON = ((0x10 << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/15/src/soc/mediatek/mt8192/in... PS15, Line 316: INFRACFG_AO_INFRA_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/15/src/soc/mediatek/mt8192/in... PS15, Line 325: INFRACFG_AO_INFRA_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/15/src/soc/mediatek/mt8192/in... PS15, Line 340: INFRACFG_AO_PERI_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/15/src/soc/mediatek/mt8192/in... PS15, Line 349: INFRACFG_AO_PERI_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/15/src/soc/mediatek/mt8192/in... PS15, Line 358: INFRACFG_AO_PERI_MODULE_DCM_REG0_MASK = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/15/src/soc/mediatek/mt8192/in... PS15, Line 360: INFRACFG_AO_PERI_MODULE_DCM_REG0_ON = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/15/src/soc/mediatek/mt8192/pl... File src/soc/mediatek/mt8192/pll.c:
https://review.coreboot.org/c/coreboot/+/46407/15/src/soc/mediatek/mt8192/pl... PS15, Line 438: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_ON); line over 96 characters
https://review.coreboot.org/c/coreboot/+/46407/15/src/soc/mediatek/mt8192/pl... PS15, Line 440: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_ON); line over 96 characters
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46407 )
Change subject: WIP: dcm: mt8192: Enable DCM ......................................................................
Patch Set 16:
(10 comments)
https://review.coreboot.org/c/coreboot/+/46407/16/src/soc/mediatek/mt8192/in... File src/soc/mediatek/mt8192/include/soc/pll.h:
https://review.coreboot.org/c/coreboot/+/46407/16/src/soc/mediatek/mt8192/in... PS16, Line 310: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_MASK = ((0x1f << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/16/src/soc/mediatek/mt8192/in... PS16, Line 313: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_ON = ((0x10 << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/16/src/soc/mediatek/mt8192/in... PS16, Line 316: INFRACFG_AO_INFRA_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/16/src/soc/mediatek/mt8192/in... PS16, Line 325: INFRACFG_AO_INFRA_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/16/src/soc/mediatek/mt8192/in... PS16, Line 340: INFRACFG_AO_PERI_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/16/src/soc/mediatek/mt8192/in... PS16, Line 349: INFRACFG_AO_PERI_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/16/src/soc/mediatek/mt8192/in... PS16, Line 358: INFRACFG_AO_PERI_MODULE_DCM_REG0_MASK = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/16/src/soc/mediatek/mt8192/in... PS16, Line 360: INFRACFG_AO_PERI_MODULE_DCM_REG0_ON = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/16/src/soc/mediatek/mt8192/pl... File src/soc/mediatek/mt8192/pll.c:
https://review.coreboot.org/c/coreboot/+/46407/16/src/soc/mediatek/mt8192/pl... PS16, Line 438: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_ON); line over 96 characters
https://review.coreboot.org/c/coreboot/+/46407/16/src/soc/mediatek/mt8192/pl... PS16, Line 440: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_ON); line over 96 characters
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46407 )
Change subject: WIP: dcm: mt8192: Enable DCM ......................................................................
Patch Set 17:
(10 comments)
https://review.coreboot.org/c/coreboot/+/46407/17/src/soc/mediatek/mt8192/in... File src/soc/mediatek/mt8192/include/soc/pll.h:
https://review.coreboot.org/c/coreboot/+/46407/17/src/soc/mediatek/mt8192/in... PS17, Line 310: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_MASK = ((0x1f << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/17/src/soc/mediatek/mt8192/in... PS17, Line 313: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_ON = ((0x10 << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/17/src/soc/mediatek/mt8192/in... PS17, Line 316: INFRACFG_AO_INFRA_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/17/src/soc/mediatek/mt8192/in... PS17, Line 325: INFRACFG_AO_INFRA_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/17/src/soc/mediatek/mt8192/in... PS17, Line 340: INFRACFG_AO_PERI_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/17/src/soc/mediatek/mt8192/in... PS17, Line 349: INFRACFG_AO_PERI_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/17/src/soc/mediatek/mt8192/in... PS17, Line 358: INFRACFG_AO_PERI_MODULE_DCM_REG0_MASK = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/17/src/soc/mediatek/mt8192/in... PS17, Line 360: INFRACFG_AO_PERI_MODULE_DCM_REG0_ON = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/17/src/soc/mediatek/mt8192/pl... File src/soc/mediatek/mt8192/pll.c:
https://review.coreboot.org/c/coreboot/+/46407/17/src/soc/mediatek/mt8192/pl... PS17, Line 438: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_ON); line over 96 characters
https://review.coreboot.org/c/coreboot/+/46407/17/src/soc/mediatek/mt8192/pl... PS17, Line 440: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_ON); line over 96 characters
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46407 )
Change subject: WIP: dcm: mt8192: Enable DCM ......................................................................
Patch Set 18:
(10 comments)
https://review.coreboot.org/c/coreboot/+/46407/18/src/soc/mediatek/mt8192/in... File src/soc/mediatek/mt8192/include/soc/pll.h:
https://review.coreboot.org/c/coreboot/+/46407/18/src/soc/mediatek/mt8192/in... PS18, Line 310: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_MASK = ((0x1f << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/18/src/soc/mediatek/mt8192/in... PS18, Line 313: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_ON = ((0x10 << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/18/src/soc/mediatek/mt8192/in... PS18, Line 316: INFRACFG_AO_INFRA_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/18/src/soc/mediatek/mt8192/in... PS18, Line 325: INFRACFG_AO_INFRA_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/18/src/soc/mediatek/mt8192/in... PS18, Line 340: INFRACFG_AO_PERI_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/18/src/soc/mediatek/mt8192/in... PS18, Line 349: INFRACFG_AO_PERI_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/18/src/soc/mediatek/mt8192/in... PS18, Line 358: INFRACFG_AO_PERI_MODULE_DCM_REG0_MASK = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/18/src/soc/mediatek/mt8192/in... PS18, Line 360: INFRACFG_AO_PERI_MODULE_DCM_REG0_ON = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/18/src/soc/mediatek/mt8192/pl... File src/soc/mediatek/mt8192/pll.c:
https://review.coreboot.org/c/coreboot/+/46407/18/src/soc/mediatek/mt8192/pl... PS18, Line 438: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_ON); line over 96 characters
https://review.coreboot.org/c/coreboot/+/46407/18/src/soc/mediatek/mt8192/pl... PS18, Line 440: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_ON); line over 96 characters
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46407 )
Change subject: WIP: dcm: mt8192: Enable DCM ......................................................................
Patch Set 19:
(10 comments)
https://review.coreboot.org/c/coreboot/+/46407/19/src/soc/mediatek/mt8192/in... File src/soc/mediatek/mt8192/include/soc/pll.h:
https://review.coreboot.org/c/coreboot/+/46407/19/src/soc/mediatek/mt8192/in... PS19, Line 310: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_MASK = ((0x1f << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/19/src/soc/mediatek/mt8192/in... PS19, Line 313: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_ON = ((0x10 << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/19/src/soc/mediatek/mt8192/in... PS19, Line 316: INFRACFG_AO_INFRA_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/19/src/soc/mediatek/mt8192/in... PS19, Line 325: INFRACFG_AO_INFRA_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/19/src/soc/mediatek/mt8192/in... PS19, Line 340: INFRACFG_AO_PERI_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/19/src/soc/mediatek/mt8192/in... PS19, Line 349: INFRACFG_AO_PERI_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/19/src/soc/mediatek/mt8192/in... PS19, Line 358: INFRACFG_AO_PERI_MODULE_DCM_REG0_MASK = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/19/src/soc/mediatek/mt8192/in... PS19, Line 360: INFRACFG_AO_PERI_MODULE_DCM_REG0_ON = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/19/src/soc/mediatek/mt8192/pl... File src/soc/mediatek/mt8192/pll.c:
https://review.coreboot.org/c/coreboot/+/46407/19/src/soc/mediatek/mt8192/pl... PS19, Line 438: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_ON); line over 96 characters
https://review.coreboot.org/c/coreboot/+/46407/19/src/soc/mediatek/mt8192/pl... PS19, Line 440: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_ON); line over 96 characters
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46407 )
Change subject: WIP: dcm: mt8192: Enable DCM ......................................................................
Patch Set 20:
(10 comments)
https://review.coreboot.org/c/coreboot/+/46407/20/src/soc/mediatek/mt8192/in... File src/soc/mediatek/mt8192/include/soc/pll.h:
https://review.coreboot.org/c/coreboot/+/46407/20/src/soc/mediatek/mt8192/in... PS20, Line 310: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_MASK = ((0x1f << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/20/src/soc/mediatek/mt8192/in... PS20, Line 313: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_ON = ((0x10 << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/20/src/soc/mediatek/mt8192/in... PS20, Line 316: INFRACFG_AO_INFRA_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/20/src/soc/mediatek/mt8192/in... PS20, Line 325: INFRACFG_AO_INFRA_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/20/src/soc/mediatek/mt8192/in... PS20, Line 340: INFRACFG_AO_PERI_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/20/src/soc/mediatek/mt8192/in... PS20, Line 349: INFRACFG_AO_PERI_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/20/src/soc/mediatek/mt8192/in... PS20, Line 358: INFRACFG_AO_PERI_MODULE_DCM_REG0_MASK = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/20/src/soc/mediatek/mt8192/in... PS20, Line 360: INFRACFG_AO_PERI_MODULE_DCM_REG0_ON = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/20/src/soc/mediatek/mt8192/pl... File src/soc/mediatek/mt8192/pll.c:
https://review.coreboot.org/c/coreboot/+/46407/20/src/soc/mediatek/mt8192/pl... PS20, Line 438: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_ON); line over 96 characters
https://review.coreboot.org/c/coreboot/+/46407/20/src/soc/mediatek/mt8192/pl... PS20, Line 440: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_ON); line over 96 characters
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46407 )
Change subject: WIP: dcm: mt8192: Enable DCM ......................................................................
Patch Set 21:
(10 comments)
https://review.coreboot.org/c/coreboot/+/46407/21/src/soc/mediatek/mt8192/in... File src/soc/mediatek/mt8192/include/soc/pll.h:
https://review.coreboot.org/c/coreboot/+/46407/21/src/soc/mediatek/mt8192/in... PS21, Line 310: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_MASK = ((0x1f << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/21/src/soc/mediatek/mt8192/in... PS21, Line 313: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_ON = ((0x10 << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/21/src/soc/mediatek/mt8192/in... PS21, Line 316: INFRACFG_AO_INFRA_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/21/src/soc/mediatek/mt8192/in... PS21, Line 325: INFRACFG_AO_INFRA_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/21/src/soc/mediatek/mt8192/in... PS21, Line 340: INFRACFG_AO_PERI_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/21/src/soc/mediatek/mt8192/in... PS21, Line 349: INFRACFG_AO_PERI_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/21/src/soc/mediatek/mt8192/in... PS21, Line 358: INFRACFG_AO_PERI_MODULE_DCM_REG0_MASK = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/21/src/soc/mediatek/mt8192/in... PS21, Line 360: INFRACFG_AO_PERI_MODULE_DCM_REG0_ON = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/21/src/soc/mediatek/mt8192/pl... File src/soc/mediatek/mt8192/pll.c:
https://review.coreboot.org/c/coreboot/+/46407/21/src/soc/mediatek/mt8192/pl... PS21, Line 438: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_ON); line over 96 characters
https://review.coreboot.org/c/coreboot/+/46407/21/src/soc/mediatek/mt8192/pl... PS21, Line 440: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_ON); line over 96 characters
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46407 )
Change subject: WIP: dcm: mt8192: Enable DCM ......................................................................
Patch Set 22:
(10 comments)
https://review.coreboot.org/c/coreboot/+/46407/22/src/soc/mediatek/mt8192/in... File src/soc/mediatek/mt8192/include/soc/pll.h:
https://review.coreboot.org/c/coreboot/+/46407/22/src/soc/mediatek/mt8192/in... PS22, Line 310: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_MASK = ((0x1f << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/22/src/soc/mediatek/mt8192/in... PS22, Line 313: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_ON = ((0x10 << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/22/src/soc/mediatek/mt8192/in... PS22, Line 316: INFRACFG_AO_INFRA_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/22/src/soc/mediatek/mt8192/in... PS22, Line 325: INFRACFG_AO_INFRA_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/22/src/soc/mediatek/mt8192/in... PS22, Line 340: INFRACFG_AO_PERI_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/22/src/soc/mediatek/mt8192/in... PS22, Line 349: INFRACFG_AO_PERI_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/22/src/soc/mediatek/mt8192/in... PS22, Line 358: INFRACFG_AO_PERI_MODULE_DCM_REG0_MASK = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/22/src/soc/mediatek/mt8192/in... PS22, Line 360: INFRACFG_AO_PERI_MODULE_DCM_REG0_ON = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/22/src/soc/mediatek/mt8192/pl... File src/soc/mediatek/mt8192/pll.c:
https://review.coreboot.org/c/coreboot/+/46407/22/src/soc/mediatek/mt8192/pl... PS22, Line 438: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_ON); line over 96 characters
https://review.coreboot.org/c/coreboot/+/46407/22/src/soc/mediatek/mt8192/pl... PS22, Line 440: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_ON); line over 96 characters
Hello build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46407
to look at the new patch set (#24).
Change subject: WIP: dcm: mt8192: Enable DCM ......................................................................
WIP: dcm: mt8192: Enable DCM
Enable DCM settings.
/* INFRACFG_AO */ dcm_infracfg_ao_aximem_bus_dcm(on); dcm_infracfg_ao_infra_bus_dcm(on); dcm_infracfg_ao_infra_conn_bus_dcm(on); dcm_infracfg_ao_infra_rx_p2p_dcm(on); dcm_infracfg_ao_peri_bus_dcm(on); dcm_infracfg_ao_peri_module_dcm(on); /* INFRA_AO_BCRM */ dcm_infra_ao_bcrm_infra_bus_dcm(on); dcm_infra_ao_bcrm_peri_bus_dcm(on); /* INFRACFG_AO_MEM */ /* move to preloader */ /* dcm_infracfg_ao_mem_dcm_emi_group(on); */
Change-Id: I5528d176b6bb1f9a5960de981766235510e6ebf1 --- M src/soc/mediatek/mt8192/include/soc/pll.h M src/soc/mediatek/mt8192/pll.c 2 files changed, 76 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/46407/24
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46407 )
Change subject: WIP: dcm: mt8192: Enable DCM ......................................................................
Patch Set 24:
(10 comments)
https://review.coreboot.org/c/coreboot/+/46407/24/src/soc/mediatek/mt8192/in... File src/soc/mediatek/mt8192/include/soc/pll.h:
https://review.coreboot.org/c/coreboot/+/46407/24/src/soc/mediatek/mt8192/in... PS24, Line 310: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_MASK = ((0x1f << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/24/src/soc/mediatek/mt8192/in... PS24, Line 313: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_ON = ((0x10 << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/24/src/soc/mediatek/mt8192/in... PS24, Line 316: INFRACFG_AO_INFRA_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/24/src/soc/mediatek/mt8192/in... PS24, Line 325: INFRACFG_AO_INFRA_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/24/src/soc/mediatek/mt8192/in... PS24, Line 340: INFRACFG_AO_PERI_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/24/src/soc/mediatek/mt8192/in... PS24, Line 349: INFRACFG_AO_PERI_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/24/src/soc/mediatek/mt8192/in... PS24, Line 358: INFRACFG_AO_PERI_MODULE_DCM_REG0_MASK = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/24/src/soc/mediatek/mt8192/in... PS24, Line 360: INFRACFG_AO_PERI_MODULE_DCM_REG0_ON = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/24/src/soc/mediatek/mt8192/pl... File src/soc/mediatek/mt8192/pll.c:
https://review.coreboot.org/c/coreboot/+/46407/24/src/soc/mediatek/mt8192/pl... PS24, Line 438: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_ON); line over 96 characters
https://review.coreboot.org/c/coreboot/+/46407/24/src/soc/mediatek/mt8192/pl... PS24, Line 440: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_ON); line over 96 characters
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46407 )
Change subject: WIP: dcm: mt8192: Enable DCM ......................................................................
Patch Set 27:
(10 comments)
https://review.coreboot.org/c/coreboot/+/46407/27/src/soc/mediatek/mt8192/in... File src/soc/mediatek/mt8192/include/soc/pll.h:
https://review.coreboot.org/c/coreboot/+/46407/27/src/soc/mediatek/mt8192/in... PS27, Line 310: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_MASK = ((0x1f << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/27/src/soc/mediatek/mt8192/in... PS27, Line 313: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_ON = ((0x10 << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/27/src/soc/mediatek/mt8192/in... PS27, Line 316: INFRACFG_AO_INFRA_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/27/src/soc/mediatek/mt8192/in... PS27, Line 325: INFRACFG_AO_INFRA_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/27/src/soc/mediatek/mt8192/in... PS27, Line 340: INFRACFG_AO_PERI_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/27/src/soc/mediatek/mt8192/in... PS27, Line 349: INFRACFG_AO_PERI_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/27/src/soc/mediatek/mt8192/in... PS27, Line 358: INFRACFG_AO_PERI_MODULE_DCM_REG0_MASK = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/27/src/soc/mediatek/mt8192/in... PS27, Line 360: INFRACFG_AO_PERI_MODULE_DCM_REG0_ON = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/27/src/soc/mediatek/mt8192/pl... File src/soc/mediatek/mt8192/pll.c:
https://review.coreboot.org/c/coreboot/+/46407/27/src/soc/mediatek/mt8192/pl... PS27, Line 438: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_ON); line over 96 characters
https://review.coreboot.org/c/coreboot/+/46407/27/src/soc/mediatek/mt8192/pl... PS27, Line 440: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_ON); line over 96 characters
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46407 )
Change subject: WIP: dcm: mt8192: Enable DCM ......................................................................
Patch Set 28:
(10 comments)
https://review.coreboot.org/c/coreboot/+/46407/28/src/soc/mediatek/mt8192/in... File src/soc/mediatek/mt8192/include/soc/pll.h:
https://review.coreboot.org/c/coreboot/+/46407/28/src/soc/mediatek/mt8192/in... PS28, Line 310: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_MASK = ((0x1f << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/28/src/soc/mediatek/mt8192/in... PS28, Line 313: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_ON = ((0x10 << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/28/src/soc/mediatek/mt8192/in... PS28, Line 316: INFRACFG_AO_INFRA_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/28/src/soc/mediatek/mt8192/in... PS28, Line 325: INFRACFG_AO_INFRA_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/28/src/soc/mediatek/mt8192/in... PS28, Line 340: INFRACFG_AO_PERI_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/28/src/soc/mediatek/mt8192/in... PS28, Line 349: INFRACFG_AO_PERI_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/28/src/soc/mediatek/mt8192/in... PS28, Line 358: INFRACFG_AO_PERI_MODULE_DCM_REG0_MASK = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/28/src/soc/mediatek/mt8192/in... PS28, Line 360: INFRACFG_AO_PERI_MODULE_DCM_REG0_ON = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/28/src/soc/mediatek/mt8192/pl... File src/soc/mediatek/mt8192/pll.c:
https://review.coreboot.org/c/coreboot/+/46407/28/src/soc/mediatek/mt8192/pl... PS28, Line 438: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_ON); line over 96 characters
https://review.coreboot.org/c/coreboot/+/46407/28/src/soc/mediatek/mt8192/pl... PS28, Line 440: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_ON); line over 96 characters
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46407 )
Change subject: WIP: dcm: mt8192: Enable DCM ......................................................................
Patch Set 29:
(10 comments)
https://review.coreboot.org/c/coreboot/+/46407/29/src/soc/mediatek/mt8192/in... File src/soc/mediatek/mt8192/include/soc/pll.h:
https://review.coreboot.org/c/coreboot/+/46407/29/src/soc/mediatek/mt8192/in... PS29, Line 310: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_MASK = ((0x1f << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/29/src/soc/mediatek/mt8192/in... PS29, Line 313: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_ON = ((0x10 << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/29/src/soc/mediatek/mt8192/in... PS29, Line 316: INFRACFG_AO_INFRA_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/29/src/soc/mediatek/mt8192/in... PS29, Line 325: INFRACFG_AO_INFRA_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/29/src/soc/mediatek/mt8192/in... PS29, Line 340: INFRACFG_AO_PERI_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/29/src/soc/mediatek/mt8192/in... PS29, Line 349: INFRACFG_AO_PERI_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/29/src/soc/mediatek/mt8192/in... PS29, Line 358: INFRACFG_AO_PERI_MODULE_DCM_REG0_MASK = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/29/src/soc/mediatek/mt8192/in... PS29, Line 360: INFRACFG_AO_PERI_MODULE_DCM_REG0_ON = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/29/src/soc/mediatek/mt8192/pl... File src/soc/mediatek/mt8192/pll.c:
https://review.coreboot.org/c/coreboot/+/46407/29/src/soc/mediatek/mt8192/pl... PS29, Line 438: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_ON); line over 96 characters
https://review.coreboot.org/c/coreboot/+/46407/29/src/soc/mediatek/mt8192/pl... PS29, Line 440: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_ON); line over 96 characters
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46407 )
Change subject: WIP: dcm: mt8192: Enable DCM ......................................................................
Patch Set 31:
(10 comments)
https://review.coreboot.org/c/coreboot/+/46407/31/src/soc/mediatek/mt8192/in... File src/soc/mediatek/mt8192/include/soc/pll.h:
https://review.coreboot.org/c/coreboot/+/46407/31/src/soc/mediatek/mt8192/in... PS31, Line 310: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_MASK = ((0x1f << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/31/src/soc/mediatek/mt8192/in... PS31, Line 313: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_ON = ((0x10 << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/31/src/soc/mediatek/mt8192/in... PS31, Line 316: INFRACFG_AO_INFRA_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/31/src/soc/mediatek/mt8192/in... PS31, Line 325: INFRACFG_AO_INFRA_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/31/src/soc/mediatek/mt8192/in... PS31, Line 340: INFRACFG_AO_PERI_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/31/src/soc/mediatek/mt8192/in... PS31, Line 349: INFRACFG_AO_PERI_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/31/src/soc/mediatek/mt8192/in... PS31, Line 358: INFRACFG_AO_PERI_MODULE_DCM_REG0_MASK = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/31/src/soc/mediatek/mt8192/in... PS31, Line 360: INFRACFG_AO_PERI_MODULE_DCM_REG0_ON = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/31/src/soc/mediatek/mt8192/pl... File src/soc/mediatek/mt8192/pll.c:
https://review.coreboot.org/c/coreboot/+/46407/31/src/soc/mediatek/mt8192/pl... PS31, Line 438: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_ON); line over 96 characters
https://review.coreboot.org/c/coreboot/+/46407/31/src/soc/mediatek/mt8192/pl... PS31, Line 440: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_ON); line over 96 characters
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46407 )
Change subject: WIP: dcm: mt8192: Enable DCM ......................................................................
Patch Set 32:
(10 comments)
https://review.coreboot.org/c/coreboot/+/46407/32/src/soc/mediatek/mt8192/in... File src/soc/mediatek/mt8192/include/soc/pll.h:
https://review.coreboot.org/c/coreboot/+/46407/32/src/soc/mediatek/mt8192/in... PS32, Line 310: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_MASK = ((0x1f << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/32/src/soc/mediatek/mt8192/in... PS32, Line 313: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_ON = ((0x10 << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/32/src/soc/mediatek/mt8192/in... PS32, Line 316: INFRACFG_AO_INFRA_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/32/src/soc/mediatek/mt8192/in... PS32, Line 325: INFRACFG_AO_INFRA_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/32/src/soc/mediatek/mt8192/in... PS32, Line 340: INFRACFG_AO_PERI_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/32/src/soc/mediatek/mt8192/in... PS32, Line 349: INFRACFG_AO_PERI_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/32/src/soc/mediatek/mt8192/in... PS32, Line 358: INFRACFG_AO_PERI_MODULE_DCM_REG0_MASK = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/32/src/soc/mediatek/mt8192/in... PS32, Line 360: INFRACFG_AO_PERI_MODULE_DCM_REG0_ON = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/32/src/soc/mediatek/mt8192/pl... File src/soc/mediatek/mt8192/pll.c:
https://review.coreboot.org/c/coreboot/+/46407/32/src/soc/mediatek/mt8192/pl... PS32, Line 438: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_ON); line over 96 characters
https://review.coreboot.org/c/coreboot/+/46407/32/src/soc/mediatek/mt8192/pl... PS32, Line 440: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_ON); line over 96 characters
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46407 )
Change subject: WIP: dcm: mt8192: Enable DCM ......................................................................
Patch Set 33:
(10 comments)
https://review.coreboot.org/c/coreboot/+/46407/33/src/soc/mediatek/mt8192/in... File src/soc/mediatek/mt8192/include/soc/pll.h:
https://review.coreboot.org/c/coreboot/+/46407/33/src/soc/mediatek/mt8192/in... PS33, Line 310: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_MASK = ((0x1f << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/33/src/soc/mediatek/mt8192/in... PS33, Line 313: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_ON = ((0x10 << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/33/src/soc/mediatek/mt8192/in... PS33, Line 316: INFRACFG_AO_INFRA_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/33/src/soc/mediatek/mt8192/in... PS33, Line 325: INFRACFG_AO_INFRA_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/33/src/soc/mediatek/mt8192/in... PS33, Line 340: INFRACFG_AO_PERI_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/33/src/soc/mediatek/mt8192/in... PS33, Line 349: INFRACFG_AO_PERI_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/33/src/soc/mediatek/mt8192/in... PS33, Line 358: INFRACFG_AO_PERI_MODULE_DCM_REG0_MASK = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/33/src/soc/mediatek/mt8192/in... PS33, Line 360: INFRACFG_AO_PERI_MODULE_DCM_REG0_ON = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/33/src/soc/mediatek/mt8192/pl... File src/soc/mediatek/mt8192/pll.c:
https://review.coreboot.org/c/coreboot/+/46407/33/src/soc/mediatek/mt8192/pl... PS33, Line 438: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_ON); line over 96 characters
https://review.coreboot.org/c/coreboot/+/46407/33/src/soc/mediatek/mt8192/pl... PS33, Line 440: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_ON); line over 96 characters
Hello Hung-Te Lin, Xi Chen, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46407
to look at the new patch set (#35).
Change subject: WIP: dcm: mt8192: Enable DCM ......................................................................
WIP: dcm: mt8192: Enable DCM
Enable DCM settings.
/* INFRACFG_AO */ dcm_infracfg_ao_aximem_bus_dcm(on); dcm_infracfg_ao_infra_bus_dcm(on); dcm_infracfg_ao_infra_conn_bus_dcm(on); dcm_infracfg_ao_infra_rx_p2p_dcm(on); dcm_infracfg_ao_peri_bus_dcm(on); dcm_infracfg_ao_peri_module_dcm(on); /* INFRA_AO_BCRM */ dcm_infra_ao_bcrm_infra_bus_dcm(on); dcm_infra_ao_bcrm_peri_bus_dcm(on); /* INFRACFG_AO_MEM */ /* move to preloader */ /* dcm_infracfg_ao_mem_dcm_emi_group(on); */
Change-Id: I5528d176b6bb1f9a5960de981766235510e6ebf1 --- M src/soc/mediatek/mt8192/include/soc/pll.h M src/soc/mediatek/mt8192/pll.c 2 files changed, 76 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/46407/35
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46407 )
Change subject: WIP: dcm: mt8192: Enable DCM ......................................................................
Patch Set 35:
(10 comments)
https://review.coreboot.org/c/coreboot/+/46407/35/src/soc/mediatek/mt8192/in... File src/soc/mediatek/mt8192/include/soc/pll.h:
https://review.coreboot.org/c/coreboot/+/46407/35/src/soc/mediatek/mt8192/in... PS35, Line 310: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_MASK = ((0x1f << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/35/src/soc/mediatek/mt8192/in... PS35, Line 313: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_ON = ((0x10 << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/35/src/soc/mediatek/mt8192/in... PS35, Line 316: INFRACFG_AO_INFRA_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/35/src/soc/mediatek/mt8192/in... PS35, Line 325: INFRACFG_AO_INFRA_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/35/src/soc/mediatek/mt8192/in... PS35, Line 340: INFRACFG_AO_PERI_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/35/src/soc/mediatek/mt8192/in... PS35, Line 349: INFRACFG_AO_PERI_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/35/src/soc/mediatek/mt8192/in... PS35, Line 358: INFRACFG_AO_PERI_MODULE_DCM_REG0_MASK = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/35/src/soc/mediatek/mt8192/in... PS35, Line 360: INFRACFG_AO_PERI_MODULE_DCM_REG0_ON = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/35/src/soc/mediatek/mt8192/pl... File src/soc/mediatek/mt8192/pll.c:
https://review.coreboot.org/c/coreboot/+/46407/35/src/soc/mediatek/mt8192/pl... PS35, Line 438: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_ON); line over 96 characters
https://review.coreboot.org/c/coreboot/+/46407/35/src/soc/mediatek/mt8192/pl... PS35, Line 440: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_ON); line over 96 characters
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46407 )
Change subject: WIP: dcm: mt8192: Enable DCM ......................................................................
Patch Set 35:
Please replace this with a non-WIP version.
Hello Hung-Te Lin, Xi Chen, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46407
to look at the new patch set (#37).
Change subject: WIP: dcm: mt8192: Enable DCM ......................................................................
WIP: dcm: mt8192: Enable DCM
Enable DCM settings.
/* INFRACFG_AO */ dcm_infracfg_ao_aximem_bus_dcm(on); dcm_infracfg_ao_infra_bus_dcm(on); dcm_infracfg_ao_infra_conn_bus_dcm(on); dcm_infracfg_ao_infra_rx_p2p_dcm(on); dcm_infracfg_ao_peri_bus_dcm(on); dcm_infracfg_ao_peri_module_dcm(on); /* INFRA_AO_BCRM */ dcm_infra_ao_bcrm_infra_bus_dcm(on); dcm_infra_ao_bcrm_peri_bus_dcm(on); /* INFRACFG_AO_MEM */ /* move to preloader */ /* dcm_infracfg_ao_mem_dcm_emi_group(on); */
Change-Id: I5528d176b6bb1f9a5960de981766235510e6ebf1 --- M src/soc/mediatek/mt8192/include/soc/pll.h M src/soc/mediatek/mt8192/pll.c 2 files changed, 76 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/46407/37
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46407 )
Change subject: WIP: dcm: mt8192: Enable DCM ......................................................................
Patch Set 37:
(10 comments)
https://review.coreboot.org/c/coreboot/+/46407/37/src/soc/mediatek/mt8192/in... File src/soc/mediatek/mt8192/include/soc/pll.h:
https://review.coreboot.org/c/coreboot/+/46407/37/src/soc/mediatek/mt8192/in... PS37, Line 310: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_MASK = ((0x1f << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/37/src/soc/mediatek/mt8192/in... PS37, Line 313: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_ON = ((0x10 << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/37/src/soc/mediatek/mt8192/in... PS37, Line 316: INFRACFG_AO_INFRA_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/37/src/soc/mediatek/mt8192/in... PS37, Line 325: INFRACFG_AO_INFRA_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/37/src/soc/mediatek/mt8192/in... PS37, Line 340: INFRACFG_AO_PERI_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/37/src/soc/mediatek/mt8192/in... PS37, Line 349: INFRACFG_AO_PERI_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/37/src/soc/mediatek/mt8192/in... PS37, Line 358: INFRACFG_AO_PERI_MODULE_DCM_REG0_MASK = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/37/src/soc/mediatek/mt8192/in... PS37, Line 360: INFRACFG_AO_PERI_MODULE_DCM_REG0_ON = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/37/src/soc/mediatek/mt8192/pl... File src/soc/mediatek/mt8192/pll.c:
https://review.coreboot.org/c/coreboot/+/46407/37/src/soc/mediatek/mt8192/pl... PS37, Line 438: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_ON); line over 96 characters
https://review.coreboot.org/c/coreboot/+/46407/37/src/soc/mediatek/mt8192/pl... PS37, Line 440: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_ON); line over 96 characters
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46407 )
Change subject: WIP: dcm: mt8192: Enable DCM ......................................................................
Patch Set 38:
(10 comments)
https://review.coreboot.org/c/coreboot/+/46407/38/src/soc/mediatek/mt8192/in... File src/soc/mediatek/mt8192/include/soc/pll.h:
https://review.coreboot.org/c/coreboot/+/46407/38/src/soc/mediatek/mt8192/in... PS38, Line 310: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_MASK = ((0x1f << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/38/src/soc/mediatek/mt8192/in... PS38, Line 313: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_ON = ((0x10 << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/38/src/soc/mediatek/mt8192/in... PS38, Line 316: INFRACFG_AO_INFRA_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/38/src/soc/mediatek/mt8192/in... PS38, Line 325: INFRACFG_AO_INFRA_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/38/src/soc/mediatek/mt8192/in... PS38, Line 340: INFRACFG_AO_PERI_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/38/src/soc/mediatek/mt8192/in... PS38, Line 349: INFRACFG_AO_PERI_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/38/src/soc/mediatek/mt8192/in... PS38, Line 358: INFRACFG_AO_PERI_MODULE_DCM_REG0_MASK = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/38/src/soc/mediatek/mt8192/in... PS38, Line 360: INFRACFG_AO_PERI_MODULE_DCM_REG0_ON = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/38/src/soc/mediatek/mt8192/pl... File src/soc/mediatek/mt8192/pll.c:
https://review.coreboot.org/c/coreboot/+/46407/38/src/soc/mediatek/mt8192/pl... PS38, Line 438: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_ON); line over 96 characters
https://review.coreboot.org/c/coreboot/+/46407/38/src/soc/mediatek/mt8192/pl... PS38, Line 440: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_ON); line over 96 characters
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46407 )
Change subject: WIP: dcm: mt8192: Enable DCM ......................................................................
Patch Set 39:
(10 comments)
https://review.coreboot.org/c/coreboot/+/46407/39/src/soc/mediatek/mt8192/in... File src/soc/mediatek/mt8192/include/soc/pll.h:
https://review.coreboot.org/c/coreboot/+/46407/39/src/soc/mediatek/mt8192/in... PS39, Line 310: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_MASK = ((0x1f << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/39/src/soc/mediatek/mt8192/in... PS39, Line 313: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_ON = ((0x10 << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/39/src/soc/mediatek/mt8192/in... PS39, Line 316: INFRACFG_AO_INFRA_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/39/src/soc/mediatek/mt8192/in... PS39, Line 325: INFRACFG_AO_INFRA_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/39/src/soc/mediatek/mt8192/in... PS39, Line 340: INFRACFG_AO_PERI_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/39/src/soc/mediatek/mt8192/in... PS39, Line 349: INFRACFG_AO_PERI_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/39/src/soc/mediatek/mt8192/in... PS39, Line 358: INFRACFG_AO_PERI_MODULE_DCM_REG0_MASK = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/39/src/soc/mediatek/mt8192/in... PS39, Line 360: INFRACFG_AO_PERI_MODULE_DCM_REG0_ON = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/39/src/soc/mediatek/mt8192/pl... File src/soc/mediatek/mt8192/pll.c:
https://review.coreboot.org/c/coreboot/+/46407/39/src/soc/mediatek/mt8192/pl... PS39, Line 438: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_ON); line over 96 characters
https://review.coreboot.org/c/coreboot/+/46407/39/src/soc/mediatek/mt8192/pl... PS39, Line 440: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_ON); line over 96 characters
Hello Hung-Te Lin, Xi Chen, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46407
to look at the new patch set (#40).
Change subject: soc/mediatek/mt8192: Enable DCM ......................................................................
soc/mediatek/mt8192: Enable DCM
Enable DCM settings.
Change-Id: I5528d176b6bb1f9a5960de981766235510e6ebf1 Signed-off-by: mtk15698 michael.kao@mediatek.com --- M src/soc/mediatek/mt8192/include/soc/pll.h M src/soc/mediatek/mt8192/pll.c 2 files changed, 76 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/46407/40
build bot (Jenkins) has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46407 )
Change subject: soc/mediatek/mt8192: Enable DCM ......................................................................
Patch Set 40:
(10 comments)
https://review.coreboot.org/c/coreboot/+/46407/40/src/soc/mediatek/mt8192/in... File src/soc/mediatek/mt8192/include/soc/pll.h:
https://review.coreboot.org/c/coreboot/+/46407/40/src/soc/mediatek/mt8192/in... PS40, Line 310: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_MASK = ((0x1f << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/40/src/soc/mediatek/mt8192/in... PS40, Line 313: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_ON = ((0x10 << 12) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/40/src/soc/mediatek/mt8192/in... PS40, Line 316: INFRACFG_AO_INFRA_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/40/src/soc/mediatek/mt8192/in... PS40, Line 325: INFRACFG_AO_INFRA_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/40/src/soc/mediatek/mt8192/in... PS40, Line 340: INFRACFG_AO_PERI_BUS_DCM_REG0_MASK = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/40/src/soc/mediatek/mt8192/in... PS40, Line 349: INFRACFG_AO_PERI_BUS_DCM_REG0_ON = ((0x1 << 0) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/40/src/soc/mediatek/mt8192/in... PS40, Line 358: INFRACFG_AO_PERI_MODULE_DCM_REG0_MASK = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/40/src/soc/mediatek/mt8192/in... PS40, Line 360: INFRACFG_AO_PERI_MODULE_DCM_REG0_ON = ((0x1 << 29) | \ Avoid unnecessary line continuations
https://review.coreboot.org/c/coreboot/+/46407/40/src/soc/mediatek/mt8192/pl... File src/soc/mediatek/mt8192/pll.c:
https://review.coreboot.org/c/coreboot/+/46407/40/src/soc/mediatek/mt8192/pl... PS40, Line 438: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_ON); line over 96 characters
https://review.coreboot.org/c/coreboot/+/46407/40/src/soc/mediatek/mt8192/pl... PS40, Line 440: INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_MASK, INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_ON); line over 96 characters
Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46407 )
Change subject: soc/mediatek/mt8192: Enable DCM ......................................................................
Patch Set 40:
(1 comment)
https://review.coreboot.org/c/coreboot/+/46407/40/src/soc/mediatek/mt8192/in... File src/soc/mediatek/mt8192/include/soc/pll.h:
https://review.coreboot.org/c/coreboot/+/46407/40/src/soc/mediatek/mt8192/in... PS40, Line 310: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_MASK = ((0x1f << 12) | \
Avoid unnecessary line continuations
Please fix all of these.
Hello Hung-Te Lin, Xi Chen, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46407
to look at the new patch set (#41).
Change subject: soc/mediatek/mt8192: Enable DCM ......................................................................
soc/mediatek/mt8192: Enable DCM
Enable DCM settings.
Change-Id: I5528d176b6bb1f9a5960de981766235510e6ebf1 Signed-off-by: mtk15698 michael.kao@mediatek.com --- M src/soc/mediatek/mt8192/include/soc/pll.h M src/soc/mediatek/mt8192/pll.c 2 files changed, 77 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/46407/41
Yidi Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46407 )
Change subject: soc/mediatek/mt8192: Enable DCM ......................................................................
Patch Set 41:
(1 comment)
Please review this
https://review.coreboot.org/c/coreboot/+/46407/40/src/soc/mediatek/mt8192/in... File src/soc/mediatek/mt8192/include/soc/pll.h:
https://review.coreboot.org/c/coreboot/+/46407/40/src/soc/mediatek/mt8192/in... PS40, Line 310: INFRACFG_AO_AXIMEM_BUS_DCM_REG0_MASK = ((0x1f << 12) | \
Please fix all of these.
Please review this patch again.
Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46407 )
Change subject: soc/mediatek/mt8192: Enable DCM ......................................................................
Patch Set 41:
(1 comment)
https://review.coreboot.org/c/coreboot/+/46407/41/src/soc/mediatek/mt8192/pl... File src/soc/mediatek/mt8192/pll.c:
https://review.coreboot.org/c/coreboot/+/46407/41/src/soc/mediatek/mt8192/pl... PS41, Line 431: clrsetbits_le32 Since mt8192 is little endian, I think it's the same as clrsetbits32. Please double check.
Hello Hung-Te Lin, Xi Chen, build bot (Jenkins),
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/46407
to look at the new patch set (#42).
Change subject: soc/mediatek/mt8192: Enable DCM ......................................................................
soc/mediatek/mt8192: Enable DCM
Enable DCM settings.
Change-Id: I5528d176b6bb1f9a5960de981766235510e6ebf1 Signed-off-by: mtk15698 michael.kao@mediatek.com --- M src/soc/mediatek/mt8192/include/soc/pll.h M src/soc/mediatek/mt8192/pll.c 2 files changed, 77 insertions(+), 0 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/07/46407/42
Yidi Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46407 )
Change subject: soc/mediatek/mt8192: Enable DCM ......................................................................
Patch Set 42:
(1 comment)
https://review.coreboot.org/c/coreboot/+/46407/41/src/soc/mediatek/mt8192/pl... File src/soc/mediatek/mt8192/pll.c:
https://review.coreboot.org/c/coreboot/+/46407/41/src/soc/mediatek/mt8192/pl... PS41, Line 431: clrsetbits_le32
Since mt8192 is little endian, I think it's the same as clrsetbits32. Please double check.
Done
Hung-Te Lin has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46407 )
Change subject: soc/mediatek/mt8192: Enable DCM ......................................................................
Patch Set 42: Code-Review+2
Yu-Ping Wu has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/46407 )
Change subject: soc/mediatek/mt8192: Enable DCM ......................................................................
Patch Set 42: Code-Review+2
Hung-Te Lin has submitted this change. ( https://review.coreboot.org/c/coreboot/+/46407 )
Change subject: soc/mediatek/mt8192: Enable DCM ......................................................................
soc/mediatek/mt8192: Enable DCM
Enable DCM settings.
Change-Id: I5528d176b6bb1f9a5960de981766235510e6ebf1 Signed-off-by: mtk15698 michael.kao@mediatek.com Reviewed-on: https://review.coreboot.org/c/coreboot/+/46407 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Hung-Te Lin hungte@chromium.org Reviewed-by: Yu-Ping Wu yupingso@google.com --- M src/soc/mediatek/mt8192/include/soc/pll.h M src/soc/mediatek/mt8192/pll.c 2 files changed, 77 insertions(+), 0 deletions(-)
Approvals: build bot (Jenkins): Verified Hung-Te Lin: Looks good to me, approved Yu-Ping Wu: Looks good to me, approved
diff --git a/src/soc/mediatek/mt8192/include/soc/pll.h b/src/soc/mediatek/mt8192/include/soc/pll.h index 09c4c471..170196b 100644 --- a/src/soc/mediatek/mt8192/include/soc/pll.h +++ b/src/soc/mediatek/mt8192/include/soc/pll.h @@ -306,4 +306,53 @@ DEFINE_BITFIELD(CLK26CALI_0_TRIGGER, 4, 4) DEFINE_BITFIELD(CLK26CALI_1_LOAD_CNT, 25, 16)
+enum { + INFRACFG_AO_AXIMEM_BUS_DCM_REG0_MASK = (0x1f << 12) | (0x1 << 17) | (0x1 << 18), + INFRACFG_AO_AXIMEM_BUS_DCM_REG0_ON = (0x10 << 12) | (0x1 << 17) | (0x0 << 18), + INFRACFG_AO_INFRA_BUS_DCM_REG0_MASK = (0x1 << 0) | + (0x1 << 1) | + (0x1 << 3) | + (0x1 << 4) | + (0x1f << 5) | + (0x1f << 10) | + (0x1 << 20) | + (0x1 << 23) | + (0x1 << 30), + INFRACFG_AO_INFRA_BUS_DCM_REG0_ON = (0x1 << 0) | + (0x1 << 1) | + (0x0 << 3) | + (0x0 << 4) | + (0x10 << 5) | + (0x1 << 10) | + (0x1 << 20) | + (0x1 << 23) | + (0x1 << 30), + INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_MASK = (0x1 << 8), + INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_ON = (0x1 << 8), + INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_MASK = (0x1 << 8), + INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_ON = (0x0 << 8), + INFRACFG_AO_INFRA_RX_P2P_DCM_REG0_MASK = (0xf << 0), + INFRACFG_AO_INFRA_RX_P2P_DCM_REG0_ON = (0x0 << 0), + INFRACFG_AO_PERI_BUS_DCM_REG0_MASK = (0x1 << 0) | + (0x1 << 1) | + (0x1 << 3) | + (0x1 << 4) | + (0x1f << 5) | + (0x1f << 10) | + (0x1f << 15) | + (0x1 << 20) | + (0x1 << 21), + INFRACFG_AO_PERI_BUS_DCM_REG0_ON = (0x1 << 0) | + (0x1 << 1) | + (0x0 << 3) | + (0x0 << 4) | + (0x1f << 5) | + (0x0 << 10) | + (0x1f << 15) | + (0x1 << 20) | + (0x1 << 21), + INFRACFG_AO_PERI_MODULE_DCM_REG0_MASK = (0x1 << 29) | (0x1 << 31), + INFRACFG_AO_PERI_MODULE_DCM_REG0_ON = (0x1 << 29) | (0x1 << 31), +}; + #endif /* SOC_MEDIATEK_MT8192_PLL_H */ diff --git a/src/soc/mediatek/mt8192/pll.c b/src/soc/mediatek/mt8192/pll.c index 24cfafd..afa7c85 100644 --- a/src/soc/mediatek/mt8192/pll.c +++ b/src/soc/mediatek/mt8192/pll.c @@ -427,6 +427,34 @@ /* enable infrasys DCM */ setbits32(&mt8192_infracfg->infra_bus_dcm_ctrl, 0x3 << 21);
+ /* dcm_infracfg_ao_aximem_bus_dcm */ + clrsetbits32(&mt8192_infracfg->infra_aximem_idle_bit_en_0, + INFRACFG_AO_AXIMEM_BUS_DCM_REG0_MASK, + INFRACFG_AO_AXIMEM_BUS_DCM_REG0_ON); + /* dcm_infracfg_ao_infra_bus_dcm */ + clrsetbits32(&mt8192_infracfg->infra_bus_dcm_ctrl, + INFRACFG_AO_INFRA_BUS_DCM_REG0_MASK, + INFRACFG_AO_INFRA_BUS_DCM_REG0_ON); + /* dcm_infracfg_ao_infra_conn_bus_dcm */ + clrsetbits32(&mt8192_infracfg->module_sw_cg_2_set, + INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_MASK, + INFRACFG_AO_INFRA_CONN_BUS_DCM_REG0_ON); + clrsetbits32(&mt8192_infracfg->module_sw_cg_2_clr, + INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_MASK, + INFRACFG_AO_INFRA_CONN_BUS_DCM_REG1_ON); + /* dcm_infracfg_ao_infra_rx_p2p_dcm */ + clrsetbits32(&mt8192_infracfg->p2p_rx_clk_on, + INFRACFG_AO_INFRA_RX_P2P_DCM_REG0_MASK, + INFRACFG_AO_INFRA_RX_P2P_DCM_REG0_ON); + /* dcm_infracfg_ao_peri_bus_dcm */ + clrsetbits32(&mt8192_infracfg->peri_bus_dcm_ctrl, + INFRACFG_AO_PERI_BUS_DCM_REG0_MASK, + INFRACFG_AO_PERI_BUS_DCM_REG0_ON); + /* dcm_infracfg_ao_peri_module_dcm */ + clrsetbits32(&mt8192_infracfg->peri_bus_dcm_ctrl, + INFRACFG_AO_PERI_MODULE_DCM_REG0_MASK, + INFRACFG_AO_PERI_MODULE_DCM_REG0_ON); + /* initialize SPM request */ setbits32(&mtk_topckgen->clk_scp_cfg_0, 0x3ff); clrsetbits32(&mtk_topckgen->clk_scp_cfg_1, 0x100c, 0x3);
-
build bot (Jenkins) (Code Review) -
Hung-Te Lin (Code Review)
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Yidi Lin (Code Review)
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Yu-Ping Wu (Code Review)