Matt DeVillier has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/47191 )
Change subject: mb/purism/librem_mini: Set unused GPIO pads to PAD_NC ......................................................................
mb/purism/librem_mini: Set unused GPIO pads to PAD_NC
Set pads A7, A16, B0, B1, B15, D8, D13, F3, H6-H9, H14, H16, H17 to PAD_NC as per board schematics.
Change-Id: I4c2ab936256d0031d7a127fbeac42c8951a0b39f Signed-off-by: Matt DeVillier matt.devillier@puri.sm --- M src/mainboard/purism/librem_cnl/variants/librem_mini/gpio.c 1 file changed, 15 insertions(+), 15 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/47191/1
diff --git a/src/mainboard/purism/librem_cnl/variants/librem_mini/gpio.c b/src/mainboard/purism/librem_cnl/variants/librem_mini/gpio.c index 04c8614..9311ca0 100644 --- a/src/mainboard/purism/librem_cnl/variants/librem_mini/gpio.c +++ b/src/mainboard/purism/librem_cnl/variants/librem_mini/gpio.c @@ -37,7 +37,7 @@
/* GPP_A7 - GPIO */ /* DW0: 0x44000200, DW1: 0x00000000 */ - PAD_CFG_GPO(GPP_A7, 0, DEEP), + PAD_NC(GPP_A7, NONE),
/* GPP_A8 - CLKRUN# */ /* DW0: 0x44000700, DW1: 0x00000000 */ @@ -73,7 +73,7 @@
/* GPP_A16 - GPIO */ /* DW0: 0x84000200, DW1: 0x00003000 */ - PAD_CFG_TERM_GPO(GPP_A16, 0, UP_20K, PLTRST), + PAD_NC(GPP_A16, UP_20K),
/* GPP_A17 - GPIO */ /* DW0: 0x84000201, DW1: 0x00000000 */ @@ -107,11 +107,11 @@
/* GPP_B0 - Reserved */ /* DW0: 0x44000700, DW1: 0x00000000 */ - PAD_CFG_NF(GPP_B0, NONE, DEEP, NF1), + PAD_NC(GPP_B0, NONE),
/* GPP_B1 - Reserved */ /* DW0: 0x44000700, DW1: 0x00000000 */ - PAD_CFG_NF(GPP_B1, NONE, DEEP, NF1), + PAD_NC(GPP_B1, NONE),
/* GPP_B2 - GPIO */ /* DW0: 0x84000201, DW1: 0x00000000 */ @@ -167,7 +167,7 @@
/* GPP_B15 - GSPI0_CS0# */ /* DW0: 0x00000701, DW1: 0x00000000 */ - PAD_CFG_NF(GPP_B15, NONE, PWROK, NF1), + PAD_NC(GPP_B15, NONE),
/* GPP_B16 - GSPI0_CLK */ /* DW0: 0x84000601, DW1: 0x00000000 */ @@ -271,7 +271,7 @@
/* GPP_D8 - GPIO */ /* DW0: 0x84000200, DW1: 0x00000000 */ - PAD_CFG_GPO(GPP_D8, 0, PLTRST), + PAD_NC(GPP_D8, NONE),
/* GPP_D9 - GPIO */ /* DW0: 0x84000201, DW1: 0x00000000 */ @@ -291,7 +291,7 @@
/* GPP_D13 - GPIO */ /* DW0: 0x04000201, DW1: 0x00000000 */ - PAD_CFG_GPO(GPP_D13, 1, RSMRST), + PAD_NC(GPP_D13, NONE),
/* GPP_D14 - GPIO */ /* DW0: 0x84000201, DW1: 0x00000000 */ @@ -349,7 +349,7 @@
/* GPP_F3 - GPIO */ /* DW0: 0x84000200, DW1: 0x00003000 */ - PAD_CFG_TERM_GPO(GPP_F3, 0, UP_20K, PLTRST), + PAD_NC(GPP_F3, UP_20K),
/* GPP_F4 - CNV_BRI_DT */ /* DW0: 0x44000700, DW1: 0x00003000 */ @@ -459,19 +459,19 @@
/* GPP_H6 - I2C3_SDA */ /* DW0: 0x44000702, DW1: 0x00000000 */ - PAD_CFG_NF(GPP_H6, NONE, DEEP, NF1), + PAD_NC(GPP_H6, NONE),
/* GPP_H7 - I2C3_SCL */ /* DW0: 0x44000702, DW1: 0x00000000 */ - PAD_CFG_NF(GPP_H7, NONE, DEEP, NF1), + PAD_NC(GPP_H7, NONE),
/* GPP_H8 - I2C4_SDA */ /* DW0: 0x44000702, DW1: 0x00000000 */ - PAD_CFG_NF(GPP_H8, NONE, DEEP, NF1), + PAD_NC(GPP_H8, NONE),
/* GPP_H9 - I2C4_SCL */ /* DW0: 0x44000702, DW1: 0x00000000 */ - PAD_CFG_NF(GPP_H9, NONE, DEEP, NF1), + PAD_NC(GPP_H9, NONE),
/* GPP_H10 - I2C5_SDA */ /* DW0: 0x84000603, DW1: 0x00000000 */ @@ -491,7 +491,7 @@
/* GPP_H14 - GPIO */ /* DW0: 0x84000200, DW1: 0x00000000 */ - PAD_CFG_GPO(GPP_H14, 0, PLTRST), + PAD_NC(GPP_H14, NONE),
/* GPP_H15 - GPIO */ /* DW0: 0x84000201, DW1: 0x00000000 */ @@ -499,11 +499,11 @@
/* GPP_H16 - GPIO */ /* DW0: 0x04000201, DW1: 0x00000000 */ - PAD_CFG_GPO(GPP_H16, 1, RSMRST), + PAD_NC(GPP_H16, NONE),
/* GPP_H17 - GPIO */ /* DW0: 0x04000201, DW1: 0x00000000 */ - PAD_CFG_GPO(GPP_H17, 1, RSMRST), + PAD_NC(GPP_H17, NONE),
/* GPP_H18 - CPU_C10_GATE# */ /* DW0: 0x44000700, DW1: 0x00000000 */
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47191 )
Change subject: mb/purism/librem_mini: Set unused GPIO pads to PAD_NC ......................................................................
Patch Set 1: Code-Review+1
can't verify due to lack of schematics
Hello build bot (Jenkins), Paul Menzel, Angel Pons, Michael Niewöhner,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/47191
to look at the new patch set (#2).
Change subject: mb/purism/librem_mini: Set unused GPIO pads to PAD_NC ......................................................................
mb/purism/librem_mini: Set unused GPIO pads to PAD_NC
Set pads A7, A16, B0, B1, B15, D8, D13, F3, H6-H9, H14, H16, H17 to PAD_NC as per board schematics.
Change-Id: I4c2ab936256d0031d7a127fbeac42c8951a0b39f Signed-off-by: Matt DeVillier matt.devillier@puri.sm --- M src/mainboard/purism/librem_cnl/variants/librem_mini/gpio.c 1 file changed, 15 insertions(+), 15 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/47191/2
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47191 )
Change subject: mb/purism/librem_mini: Set unused GPIO pads to PAD_NC ......................................................................
Patch Set 2: Code-Review+2
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47191 )
Change subject: mb/purism/librem_mini: Set unused GPIO pads to PAD_NC ......................................................................
Patch Set 2: Code-Review+1
(4 comments)
https://review.coreboot.org/c/coreboot/+/47191/2/src/mainboard/purism/librem... File src/mainboard/purism/librem_cnl/variants/librem_mini/gpio.c:
https://review.coreboot.org/c/coreboot/+/47191/2/src/mainboard/purism/librem... PS2, Line 84: /* GPP_B0 - Reserved */ : PAD_NC(GPP_B0, NONE), : : /* GPP_B1 - Reserved */ : PAD_NC(GPP_B1, NONE), Looking again, these two should have a pull, or can be left as native functions.
https://review.coreboot.org/c/coreboot/+/47191/2/src/mainboard/purism/librem... PS2, Line 223: /* GPP_D13 - GPIO */ : PAD_NC(GPP_D13, NONE), : : /* GPP_D14 - GPIO */ : PAD_CFG_GPO(GPP_D14, 1, PLTRST), Both of these are unused, and should have a pull (down, 20k)
https://review.coreboot.org/c/coreboot/+/47191/2/src/mainboard/purism/librem... PS2, Line 350: /* GPP_H6 - I2C3_SDA */ : PAD_NC(GPP_H6, NONE), : : /* GPP_H7 - I2C3_SCL */ : PAD_NC(GPP_H7, NONE), : : /* GPP_H8 - I2C4_SDA */ : PAD_NC(GPP_H8, NONE), : : /* GPP_H9 - I2C4_SCL */ : PAD_NC(GPP_H9, NONE), These are floating and should use a pull (up, 20k).
https://review.coreboot.org/c/coreboot/+/47191/2/src/mainboard/purism/librem... PS2, Line 368: /* GPP_H12 - GPIO */ : PAD_CFG_GPO(GPP_H12, 1, PLTRST), : : /* GPP_H13 - GPIO */ : PAD_CFG_GPO(GPP_H13, 1, PLTRST), : : /* GPP_H14 - GPIO */ : PAD_NC(GPP_H14, NONE), : : /* GPP_H15 - GPIO */ : PAD_CFG_GPO(GPP_H15, 1, PLTRST), : : /* GPP_H16 - GPIO */ : PAD_NC(GPP_H16, NONE), : : /* GPP_H17 - GPIO */ : PAD_NC(GPP_H17, NONE), These are floating and should use a pull (up, 20k).
Hello build bot (Jenkins), Paul Menzel, Angel Pons, Michael Niewöhner,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/47191
to look at the new patch set (#3).
Change subject: mb/purism/librem_mini: Set unused GPIO pads to PAD_NC ......................................................................
mb/purism/librem_mini: Set unused GPIO pads to PAD_NC
Set pads A7, A12, A16, B15, D8, D13, D14, F3, H6-H9, H12-H17 to PAD_NC as per board schematics (they are either NC, or connected to test pads).
Change-Id: I4c2ab936256d0031d7a127fbeac42c8951a0b39f Signed-off-by: Matt DeVillier matt.devillier@puri.sm --- M src/mainboard/purism/librem_cnl/variants/librem_mini/gpio.c 1 file changed, 21 insertions(+), 21 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/47191/3
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47191 )
Change subject: mb/purism/librem_mini: Set unused GPIO pads to PAD_NC ......................................................................
Patch Set 3: Code-Review+2
(4 comments)
https://review.coreboot.org/c/coreboot/+/47191/2/src/mainboard/purism/librem... File src/mainboard/purism/librem_cnl/variants/librem_mini/gpio.c:
https://review.coreboot.org/c/coreboot/+/47191/2/src/mainboard/purism/librem... PS2, Line 84: /* GPP_B0 - Reserved */ : PAD_NC(GPP_B0, NONE), : : /* GPP_B1 - Reserved */ : PAD_NC(GPP_B1, NONE),
Looking again, these two should have a pull, or can be left as native functions.
Done
https://review.coreboot.org/c/coreboot/+/47191/2/src/mainboard/purism/librem... PS2, Line 223: /* GPP_D13 - GPIO */ : PAD_NC(GPP_D13, NONE), : : /* GPP_D14 - GPIO */ : PAD_CFG_GPO(GPP_D14, 1, PLTRST),
Both of these are unused, and should have a pull (down, 20k)
Done
https://review.coreboot.org/c/coreboot/+/47191/2/src/mainboard/purism/librem... PS2, Line 350: /* GPP_H6 - I2C3_SDA */ : PAD_NC(GPP_H6, NONE), : : /* GPP_H7 - I2C3_SCL */ : PAD_NC(GPP_H7, NONE), : : /* GPP_H8 - I2C4_SDA */ : PAD_NC(GPP_H8, NONE), : : /* GPP_H9 - I2C4_SCL */ : PAD_NC(GPP_H9, NONE),
These are floating and should use a pull (up, 20k).
Done
https://review.coreboot.org/c/coreboot/+/47191/2/src/mainboard/purism/librem... PS2, Line 368: /* GPP_H12 - GPIO */ : PAD_CFG_GPO(GPP_H12, 1, PLTRST), : : /* GPP_H13 - GPIO */ : PAD_CFG_GPO(GPP_H13, 1, PLTRST), : : /* GPP_H14 - GPIO */ : PAD_NC(GPP_H14, NONE), : : /* GPP_H15 - GPIO */ : PAD_CFG_GPO(GPP_H15, 1, PLTRST), : : /* GPP_H16 - GPIO */ : PAD_NC(GPP_H16, NONE), : : /* GPP_H17 - GPIO */ : PAD_NC(GPP_H17, NONE),
These are floating and should use a pull (up, 20k).
Done
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47191 )
Change subject: mb/purism/librem_mini: Set unused GPIO pads to PAD_NC ......................................................................
Patch Set 3:
(71 comments)
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... File src/mainboard/purism/librem_cnl/variants/librem_mini/gpio.c:
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 31: GPIO drop or replace by NC; also for all other nc pads
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 32: PAD_NC(GPP_A7, NONE), ack
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 44: PAD_CFG_GPO(GPP_A11, 1, PLTRST), nc, up 20k
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 47: PAD_NC(GPP_A12, UP_20K), ack
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 50: PAD_CFG_GPO(GPP_A13, 1, PLTRST), nc, none
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 56: PAD_CFG_GPO(GPP_A15, 1, PLTRST), nc, none
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 59: PAD_NC(GPP_A16, UP_20K), ack
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 62: PAD_CFG_GPO(GPP_A17, 1, PLTRST), nc, 20 up
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 91: PAD_CFG_NF(GPP_B2, NONE, PLTRST, NF1), nc, up 20
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 94: PAD_CFG_GPO(GPP_B3, 1, PLTRST), nc, none
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 97: PAD_CFG_GPO(GPP_B4, 1, DEEP), nc, none
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 102: /* GPP_B6 - GPIO */ : PAD_NC(GPP_B6, NONE), : : /* GPP_B7 - GPIO */ : PAD_NC(GPP_B7, NONE), : : /* GPP_B8 - GPIO */ : PAD_NC(GPP_B8, NONE), : : /* GPP_B9 - GPIO */ : PAD_NC(GPP_B9, NONE), : in a separate commit:
/* GPP_B6 - SRCCLKREQ1# / SSD_CLK_REQ# */ PAD_CFG_NF(GPP_B6, NONE, DEEP, NF1),
/* GPP_B7 - SRCCLKREQ2# / WIFI_CLK_REQ# */ PAD_CFG_NF(GPP_B7, NONE, DEEP, NF1),
/* GPP_B8 - SRCCLKREQ3# / LAN2_CLK_REQ# */ PAD_CFG_NF(GPP_B8, NONE, DEEP, NF1),
/* GPP_B9 - SRCCLKREQ4# / LAN1_CLK_REQ# */ PAD_CFG_NF(GPP_B9, NONE, DEEP, NF1),
also then adapt the clkreq fsp settings accordingly
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 115: PAD_NC(GPP_B10, NONE), nc, none
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 127: PAD_CFG_GPO(GPP_B14, 1, PLTRST), separate commit:
SPKR/NF1, DEEP
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 130: PAD_NC(GPP_B15, NONE), ack
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 135: /* GPP_B17 - GSPI0_MISO */ : PAD_CFG_NF(GPP_B17, NONE, PLTRST, NF1), : : /* GPP_B18 - GSPI0_MOSI */ : PAD_CFG_NF(GPP_B18, NONE, PLTRST, NF1), : : /* GPP_B19 - GSPI1_CS0# */ : PAD_CFG_NF(GPP_B19, NONE, PLTRST, NF1), : : /* GPP_B20 - GSPI1_CLK */ : PAD_CFG_NF(GPP_B20, NONE, PLTRST, NF1), : : /* GPP_B21 - GSPI1_MISO */ : PAD_CFG_NF(GPP_B21, NONE, PLTRST, NF1), nc, none
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 151: PAD_CFG_NF(GPP_B22, NONE, PLTRST, NF1), nc, 20 up
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 154: PAD_CFG_GPO(GPP_B23, 1, DEEP), nc, 20 up
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 159: PAD_CFG_TERM_GPO(GPP_G0, 0, DN_20K, PWROK), nc, 20 up
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 164: /* GPP_G2 - GPIO */ : PAD_NC(GPP_G2, NONE), : : /* GPP_G3 - GPIO */ : PAD_NC(GPP_G3, NONE), : : /* GPP_G4 - GPIO */ : PAD_NC(GPP_G4, NONE), nc, 20 up
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 176: * GPP_G6 - GPIO */ : PAD_NC(GPP_G6, NONE), : nc, 20 up
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 183: : /* GPP_D0 - GPIO */ : PAD_NC(GPP_D0, NONE), : : /* GPP_D1 - GPIO */ : PAD_NC(GPP_D1, NONE), : : /* GPP_D2 - GPIO */ : PAD_NC(GPP_D2, NONE), : : /* GPP_D3 - GPIO */ : PAD_NC(GPP_D3, NONE), : : /* GPP_D4 - GPIO */ : PAD_NC(GPP_D4, NONE), nc, 20 up
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 199: * GPP_D5 - ISH_I2C0_SDA */ : PAD_CFG_NF(GPP_D5, NONE, DEEP, NF1), : : /* GPP_D6 - ISH_I2C0_SCL */ : PAD_CFG_NF(GPP_D6, NONE, DEE nc, none
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 205: /* GPP_D7 - GPIO */ : PAD_CFG_GPO(GPP_D7 nc, 20 up
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 209: PAD_NC(GPP_D8, NONE), ack
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 210: : /* GPP_D9 - GPIO */ : PAD_CFG_GPO(GPP_D9, 1, PLTRST), : : /* GPP_D10 - GPIO */ : PAD_CFG_GPO(GPP_D10, 1, PLTRST), nc, none
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 217: /* GPP_D11 - GPIO */ : PAD_CFG_TERM_GPO(GPP_D11, 1, UP_20K, DEEP), : : /* GPP_D12 - GPIO */ : PAD_CFG_GPI_APIC(GPP_D12, UP_20K, DEEP, EDGE_SINGLE, NONE), nc, 20 up
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 223: /* GPP_D13 - GPIO */ : PAD_NC(GPP_D13, DN_20K), : : /* GPP_D14 - GPIO */ : PAD_NC(GPP_D14, DN_20K), ack
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 229: /* GPP_D15 - GPIO */ : PAD_CFG_GPO(GPP_D15, 1, PLTRST), : : /* GPP_D16 - GPIO */ : PAD_CFG_GPO(GPP_D16, 0, RSMRST), nc, up 20
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 235: /* GPP_D17 - DMIC_CLK1 */ : PAD_CFG_NF(GPP_D17, NONE, DEEP, NF1), : : /* GPP_D18 - DMIC_DATA1 */ : PAD_CFG_NF(GPP_D18, NONE, DEEP, NF1), : : /* GPP_D19 - DMIC_CLK0 */ : PAD_CFG_NF(GPP_D19, NONE, DEEP, NF1), : : /* GPP_D20 - DMIC_DATA0 */ : PAD_CFG_NF(GPP_D20, NONE, DEEP, NF1), nc, none
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 247: /* GPP_D21 - GPIO */ : PAD_NC(GPP_D21, NONE), : : /* GPP_D22 - GPIO */ : PAD_NC(GPP_D22, NONE), : : /* GPP_D23 - GPIO */ : PAD_NC(GPP_D23, NONE), nc, 20 up
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 258: /* GPP_F0 - GPIO */ : PAD_NC(GPP_F0, NONE), : : /* GPP_F1 - GPIO */ : PAD_CFG_GPO(GPP_F1, 0, RSMRST), : : /* GPP_F2 - GPIO */ : PAD_CFG_TERM_GPO(GPP_F2, 1, UP_20K, PLTRST), nc, 20 up
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 270: /* GPP_F4 - CNV_BRI_DT */ : PAD_CFG_NF(GPP_F4, UP_20K, DEEP, NF1), : : /* GPP_F5 - CNV_BRI_RSP */ : PAD_CFG_NF(GPP_F5, UP_20K, DEEP, NF1), nc, 20 up
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 276: /* GPP_F6 - CNV_RGI_DT */ : PAD_CFG_NF(GPP_F6, UP_20K, DEEP, NF1), : : /* GPP_F7 - CNV_RGI_RSP */ : PAD_CFG_NF(GPP_F7, UP_20K, DEEP, NF1), nc, none
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 282: /* GPP_F8 - GPIO */ : PAD_NC(GPP_F8, NONE), : : /* GPP_F9 - GPIO */ : PAD_NC(GPP_F9, NONE), : : /* GPP_F10 - GPIO */ : PAD_CFG_GPO(GPP_F10, 1, PLTRST), : : /* GPP_F11 - GPIO */ : PAD_NC(GPP_F11, NONE), : : /* GPP_F12 - GPIO */ : PAD_NC(GPP_F12, NONE), : : /* GPP_F13 - GPIO */ : PAD_NC(GPP_F13, NONE), : : /* GPP_F14 - GPIO */ : PAD_NC(GPP_F14, NONE), : : /* GPP_F15 - GPIO */ : PAD_NC(GPP_F15, NONE), : : /* GPP_F16 - GPIO */ : PAD_NC(GPP_F16, NONE), : : /* GPP_F17 - GPIO */ : PAD_NC(GPP_F17, NONE), : : /* GPP_F18 - GPIO */ : PAD_NC(GPP_F18, NONE), : : /* GPP_F19 - GPIO */ : PAD_NC(GPP_F19, NONE), : : /* GPP_F20 - GPIO */ : PAD_NC(GPP_F20, NONE), : : /* GPP_F21 - GPIO */ : PAD_NC(GPP_F21, NONE), : : /* GPP_F22 - GPIO */ : PAD_NC(GPP_F22, NONE), : : /* GPP_F23 - A4WP_PRESENT */ : PAD_CFG_NF(GPP_F23, DN_20K, DEEP, NF1), nc, 20 up
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 334: : /* GPP_H1 - CNV_RF_RESET# */ : PAD_CFG_NF(GPP_H1, UP_20K, D wired statically -> nc, none
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 337: : /* GPP_H2 - MODEM_CLKREQ */ : PAD_CFG_NF(GPP_H2, UP_20K, DEEP, N same as h0, nc, none
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 344: * GPP_H4 - GPIO */ : PAD_NC(GPP_H4, NONE), : : /* GPP_H5 - GPIO */ : PAD_NC(GPP_H5, NONE), nc, up 20
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 362: GPP_H10 - I2C5_SDA */ : PAD_CFG_NF(GPP_H10, NONE, PLTRST, NF1), : : /* GPP_H11 - I2C5_SCL */ : PAD_CFG_NF(GPP_H11, NONE, PLTRST, NF1), nc, none
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 369: D_NC(GPP_H12, UP_20K), : : /* GPP_H13 - GPIO */ : PAD_NC(GPP_H13, UP_20K), : : /* GPP_H14 - GPIO */ : PAD_NC(GPP_H14, UP_20K), : : /* GPP_H15 - GPIO */ : PAD_NC(GPP_H15, UP_20K), : : /* GPP_H16 - GPIO */ : PAD_NC(GPP_H16, UP_20K), : : /* GPP_H17 - GPIO */ : PAD_NC(GPP_H17, UP_20K), ack
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 387: PAD_CFG_NF(GPP_H18, NONE, DEEP, NF1), nc, 20 up
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 389: /* GPP_H19 - GPIO */ : PAD_CFG_GPO(GPP_H19, 1, PLTRST), : : /* GPP_H20 - GPIO */ : PAD_NC(GPP_H20, NONE), nc, 20 up
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 399: PAD_CFG_GPO(GPP_H22, 1, PLTRST), nc 20 up
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 402: PAD_CFG_GPO(GPP_H23, 0, DEEP), nc, none
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 413: PAD_CFG_NF(GPD2, NATIVE, DEEP, NF1), nc, none
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 425: PAD_CFG_NF(GPD6, NONE, DEEP, NF1), nc, 20 up
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 428: PAD_CFG_GPO(GPD7, 0, DEEP), nc, none
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 434: PAD_CFG_NF(GPD9, NONE, DEEP, NF1), nc, 20 up
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 437: PAD_CFG_NF(GPD10, NONE, DEEP, NF1), nc 20 up
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 440: PAD_CFG_NF(GPD11, NONE, DEEP, NF1), nc 20 up
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 451: PAD_CFG_GPO(GPP_C2, 1, DEEP), nc, none
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 454: PAD_CFG_NF(GPP_C3, NONE, DEEP, NF1), : : /* GPP_C4 - SML0DATA */ : PAD_CFG_NF(GPP_C4, NONE, DEEP, NF1), : nc, none
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 460: PAD_CFG_GPO(GPP_C5, 1, PLTRST), nc, up 20
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 469: PAD_CFG_GPO(GPP_C8, 1, PLTRST), : : /* GPP_C9 - GPIO */ : PAD_CFG_GPO(GPP_C9, 1, PLTRST), : could be configured as uart on R26 (TX), R206 (RX) - or NC, none
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 474: /* GPP_C10 - GPIO */ : PAD_CFG_GPO(GPP_C10, 0, PLTRST), : : /* GPP_C11 - GPIO */ : PAD_CFG_GPI_APIC(GPP_C11, NONE, DEEP, LEVEL, NONE), : : /* GPP_C12 - UART1_RXD */ : PAD_CFG_NF(GPP_C12, NONE, PLTRST, NF1), : : /* GPP_C13 - UART1_TXD */ : PAD_CFG_NF(GPP_C13, NONE, DEEP, NF1), : : /* GPP_C14 - UART1_RTS# */ : PAD_CFG_NF(GPP_C14, NONE, DEEP, NF1), : : /* GPP_C15 - UART1_CTS# */ : PAD_CFG_NF(GPP_C15, NONE, PLTRST, NF1), all nc, up 20
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 493: AD_CFG_NF(GPP_C16, NONE, PLTRST, NF1), : : /* GPP_C17 - I2C0_SCL */ : PAD_CFG_NF(GPP_C17, NONE, PLTRST, nc, none
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 498: P_C18 - I2C1_SDA */ : PAD_CFG_NF(GPP_C18, NONE, DEEP, NF1), : : /* GPP_C19 - I2C1_SCL */ : PAD_CFG_NF(GPP_C19, NONE, nc, up 20
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 504: 20 - GPIO */ : PAD_NC(GPP_C20, NONE), : : /* GPP_C21 - GPIO */ : PAD_NC(GPP_C21, NONE), could be configured as uart with R653 (TX), R654 (RX) - or NC, none
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 510: GPIO USB3_P1_PWREN
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 513: PP_C23 - GPIO */ : PAD_CFG_GPI_APIC(GPP_C23, DN_20K, DEEP, LEVEL, NO nc, 20 up
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 518: PP_E0 - GPIO */ : PAD_NC(GPP_E0, NONE), : : /* GPP_E1 - GPIO */ : PAD_NC(GPP_E1, NONE), nc, 20 up
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 528: PAD_CFG_GPI_SMI(GPP_E3, NONE, nc,up 20
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 531: PAD_CFG_GPO(GPP_E4, 1, PLTRST), nf1 / devlsp0
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 533: GPP_E5 - GPIO */ : PAD_NC(GPP_E5, NONE), : : /* GPP_E6 - GPIO */ : PAD_NC(GPP_E6, NONE), nc, up 20
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 540: G_GPI_TRIG_OWN(GPP_E7, NONE, PLTRST, EDGE_SINGLE, ACPI), nc, none
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 545: PP_E9 - RESERVED */ : PAD_CFG_NF(GPP_E9, NONE, DEEP, NF5), : : /* GPP_E10 - RESERVED */ : PAD_CFG_NF(GPP_E10, NONE, DEEP, NF5), lolwat. NF5.
-> both NF1 / USB_OC
different commit, please. also adapt oc mapping in dt
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 564: _GPO(GPP_E15, 1, nc, none
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 570: PAD_CFG_NF(GPP_E17, NONE, DEEP, NF1), nc, none
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 578: /* GPP_E20 - DPPC_CTRLCLK */ : PAD_CFG_NF(GPP_E20, NONE, DEEP, NF1), : : /* GPP_E21 - DPPC_CTRLDATA */ : PAD_CFG_NF(GPP_E21, NONE, DEEP, NF1), nc, none
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 585: PAD_CFG_NF(GPP_E22, NONE, PLTRST, NF1), nc, up 20
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 588: PAD_CFG_NF(GPP_E23, NONE, PLTRST, NF1), nc, none
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47191 )
Change subject: mb/purism/librem_mini: Set unused GPIO pads to PAD_NC ......................................................................
Patch Set 3:
(1 comment)
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... File src/mainboard/purism/librem_cnl/variants/librem_mini/gpio.c:
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 102: /* GPP_B6 - GPIO */ : PAD_NC(GPP_B6, NONE), : : /* GPP_B7 - GPIO */ : PAD_NC(GPP_B7, NONE), : : /* GPP_B8 - GPIO */ : PAD_NC(GPP_B8, NONE), : : /* GPP_B9 - GPIO */ : PAD_NC(GPP_B9, NONE), :
in a separate commit: […]
GPP_B9 should be nc, none - since LAN1_CLK_REQ goes to LAN2 which is not populated
Hello build bot (Jenkins), Paul Menzel, Angel Pons, Michael Niewöhner,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/47191
to look at the new patch set (#4).
Change subject: mb/purism/librem_mini: Set unused GPIO pads to PAD_NC ......................................................................
mb/purism/librem_mini: Set unused GPIO pads to PAD_NC
Set numerous pads to PAD_NC as per board schematics (they are either NC, or connected to test pads), and adjust comments as needed.
Change-Id: I4c2ab936256d0031d7a127fbeac42c8951a0b39f Signed-off-by: Matt DeVillier matt.devillier@puri.sm --- M src/mainboard/purism/librem_cnl/variants/librem_mini/gpio.c 1 file changed, 278 insertions(+), 278 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/47191/4
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47191 )
Change subject: mb/purism/librem_mini: Set unused GPIO pads to PAD_NC ......................................................................
Patch Set 4: Code-Review+1
(1 comment)
https://review.coreboot.org/c/coreboot/+/47191/4//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/47191/4//COMMIT_MSG@9 PS4, Line 9: Set numerous pads to PAD_NC as per board schematics (they are either NC, or please wrap at 72 characters
Hello build bot (Jenkins), Paul Menzel, Angel Pons, Michael Niewöhner,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/47191
to look at the new patch set (#5).
Change subject: mb/purism/librem_mini: Set unused GPIO pads to PAD_NC ......................................................................
mb/purism/librem_mini: Set unused GPIO pads to PAD_NC
Set numerous pads to PAD_NC as per board schematics (they are either NC, or connected to test pads), and adjust comments as needed.
Change-Id: I4c2ab936256d0031d7a127fbeac42c8951a0b39f Signed-off-by: Matt DeVillier matt.devillier@puri.sm --- M src/mainboard/purism/librem_cnl/variants/librem_mini/gpio.c 1 file changed, 278 insertions(+), 278 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/47191/5
Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47191 )
Change subject: mb/purism/librem_mini: Set unused GPIO pads to PAD_NC ......................................................................
Patch Set 5:
(65 comments)
https://review.coreboot.org/c/coreboot/+/47191/4//COMMIT_MSG Commit Message:
https://review.coreboot.org/c/coreboot/+/47191/4//COMMIT_MSG@9 PS4, Line 9: Set numerous pads to PAD_NC as per board schematics (they are either NC, or
please wrap at 72 characters
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... File src/mainboard/purism/librem_cnl/variants/librem_mini/gpio.c:
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 31: GPIO
drop or replace by NC; also for all other nc pads
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 47: PAD_NC(GPP_A12, UP_20K),
ack
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 50: PAD_CFG_GPO(GPP_A13, 1, PLTRST),
nc, none
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 56: PAD_CFG_GPO(GPP_A15, 1, PLTRST),
nc, none
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 62: PAD_CFG_GPO(GPP_A17, 1, PLTRST),
nc, 20 up
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 91: PAD_CFG_NF(GPP_B2, NONE, PLTRST, NF1),
nc, up 20
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 94: PAD_CFG_GPO(GPP_B3, 1, PLTRST),
nc, none
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 97: PAD_CFG_GPO(GPP_B4, 1, DEEP),
nc, none
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 102: /* GPP_B6 - GPIO */ : PAD_NC(GPP_B6, NONE), : : /* GPP_B7 - GPIO */ : PAD_NC(GPP_B7, NONE), : : /* GPP_B8 - GPIO */ : PAD_NC(GPP_B8, NONE), : : /* GPP_B9 - GPIO */ : PAD_NC(GPP_B9, NONE), :
GPP_B9 should be nc, none - since LAN1_CLK_REQ goes to LAN2 which is not populated
Done; see CB:47220
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 115: PAD_NC(GPP_B10, NONE),
nc, none
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 127: PAD_CFG_GPO(GPP_B14, 1, PLTRST),
separate commit: […]
Done; see CB:47220
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 135: /* GPP_B17 - GSPI0_MISO */ : PAD_CFG_NF(GPP_B17, NONE, PLTRST, NF1), : : /* GPP_B18 - GSPI0_MOSI */ : PAD_CFG_NF(GPP_B18, NONE, PLTRST, NF1), : : /* GPP_B19 - GSPI1_CS0# */ : PAD_CFG_NF(GPP_B19, NONE, PLTRST, NF1), : : /* GPP_B20 - GSPI1_CLK */ : PAD_CFG_NF(GPP_B20, NONE, PLTRST, NF1), : : /* GPP_B21 - GSPI1_MISO */ : PAD_CFG_NF(GPP_B21, NONE, PLTRST, NF1),
nc, none
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 151: PAD_CFG_NF(GPP_B22, NONE, PLTRST, NF1),
nc, 20 up
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 154: PAD_CFG_GPO(GPP_B23, 1, DEEP),
nc, 20 up
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 159: PAD_CFG_TERM_GPO(GPP_G0, 0, DN_20K, PWROK),
nc, 20 up
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 164: /* GPP_G2 - GPIO */ : PAD_NC(GPP_G2, NONE), : : /* GPP_G3 - GPIO */ : PAD_NC(GPP_G3, NONE), : : /* GPP_G4 - GPIO */ : PAD_NC(GPP_G4, NONE),
nc, 20 up
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 176: * GPP_G6 - GPIO */ : PAD_NC(GPP_G6, NONE), :
nc, 20 up
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 183: : /* GPP_D0 - GPIO */ : PAD_NC(GPP_D0, NONE), : : /* GPP_D1 - GPIO */ : PAD_NC(GPP_D1, NONE), : : /* GPP_D2 - GPIO */ : PAD_NC(GPP_D2, NONE), : : /* GPP_D3 - GPIO */ : PAD_NC(GPP_D3, NONE), : : /* GPP_D4 - GPIO */ : PAD_NC(GPP_D4, NONE),
nc, 20 up
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 199: * GPP_D5 - ISH_I2C0_SDA */ : PAD_CFG_NF(GPP_D5, NONE, DEEP, NF1), : : /* GPP_D6 - ISH_I2C0_SCL */ : PAD_CFG_NF(GPP_D6, NONE, DEE
nc, none
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 205: /* GPP_D7 - GPIO */ : PAD_CFG_GPO(GPP_D7
nc, 20 up
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 210: : /* GPP_D9 - GPIO */ : PAD_CFG_GPO(GPP_D9, 1, PLTRST), : : /* GPP_D10 - GPIO */ : PAD_CFG_GPO(GPP_D10, 1, PLTRST),
nc, none
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 217: /* GPP_D11 - GPIO */ : PAD_CFG_TERM_GPO(GPP_D11, 1, UP_20K, DEEP), : : /* GPP_D12 - GPIO */ : PAD_CFG_GPI_APIC(GPP_D12, UP_20K, DEEP, EDGE_SINGLE, NONE),
nc, 20 up
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 229: /* GPP_D15 - GPIO */ : PAD_CFG_GPO(GPP_D15, 1, PLTRST), : : /* GPP_D16 - GPIO */ : PAD_CFG_GPO(GPP_D16, 0, RSMRST),
nc, up 20
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 235: /* GPP_D17 - DMIC_CLK1 */ : PAD_CFG_NF(GPP_D17, NONE, DEEP, NF1), : : /* GPP_D18 - DMIC_DATA1 */ : PAD_CFG_NF(GPP_D18, NONE, DEEP, NF1), : : /* GPP_D19 - DMIC_CLK0 */ : PAD_CFG_NF(GPP_D19, NONE, DEEP, NF1), : : /* GPP_D20 - DMIC_DATA0 */ : PAD_CFG_NF(GPP_D20, NONE, DEEP, NF1),
nc, none
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 247: /* GPP_D21 - GPIO */ : PAD_NC(GPP_D21, NONE), : : /* GPP_D22 - GPIO */ : PAD_NC(GPP_D22, NONE), : : /* GPP_D23 - GPIO */ : PAD_NC(GPP_D23, NONE),
nc, 20 up
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 258: /* GPP_F0 - GPIO */ : PAD_NC(GPP_F0, NONE), : : /* GPP_F1 - GPIO */ : PAD_CFG_GPO(GPP_F1, 0, RSMRST), : : /* GPP_F2 - GPIO */ : PAD_CFG_TERM_GPO(GPP_F2, 1, UP_20K, PLTRST),
nc, 20 up
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 270: /* GPP_F4 - CNV_BRI_DT */ : PAD_CFG_NF(GPP_F4, UP_20K, DEEP, NF1), : : /* GPP_F5 - CNV_BRI_RSP */ : PAD_CFG_NF(GPP_F5, UP_20K, DEEP, NF1),
nc, 20 up
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 276: /* GPP_F6 - CNV_RGI_DT */ : PAD_CFG_NF(GPP_F6, UP_20K, DEEP, NF1), : : /* GPP_F7 - CNV_RGI_RSP */ : PAD_CFG_NF(GPP_F7, UP_20K, DEEP, NF1),
nc, none
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 282: /* GPP_F8 - GPIO */ : PAD_NC(GPP_F8, NONE), : : /* GPP_F9 - GPIO */ : PAD_NC(GPP_F9, NONE), : : /* GPP_F10 - GPIO */ : PAD_CFG_GPO(GPP_F10, 1, PLTRST), : : /* GPP_F11 - GPIO */ : PAD_NC(GPP_F11, NONE), : : /* GPP_F12 - GPIO */ : PAD_NC(GPP_F12, NONE), : : /* GPP_F13 - GPIO */ : PAD_NC(GPP_F13, NONE), : : /* GPP_F14 - GPIO */ : PAD_NC(GPP_F14, NONE), : : /* GPP_F15 - GPIO */ : PAD_NC(GPP_F15, NONE), : : /* GPP_F16 - GPIO */ : PAD_NC(GPP_F16, NONE), : : /* GPP_F17 - GPIO */ : PAD_NC(GPP_F17, NONE), : : /* GPP_F18 - GPIO */ : PAD_NC(GPP_F18, NONE), : : /* GPP_F19 - GPIO */ : PAD_NC(GPP_F19, NONE), : : /* GPP_F20 - GPIO */ : PAD_NC(GPP_F20, NONE), : : /* GPP_F21 - GPIO */ : PAD_NC(GPP_F21, NONE), : : /* GPP_F22 - GPIO */ : PAD_NC(GPP_F22, NONE), : : /* GPP_F23 - A4WP_PRESENT */ : PAD_CFG_NF(GPP_F23, DN_20K, DEEP, NF1),
nc, 20 up
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 334: : /* GPP_H1 - CNV_RF_RESET# */ : PAD_CFG_NF(GPP_H1, UP_20K, D
wired statically -> nc, none
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 337: : /* GPP_H2 - MODEM_CLKREQ */ : PAD_CFG_NF(GPP_H2, UP_20K, DEEP, N
same as h0, nc, none
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 344: * GPP_H4 - GPIO */ : PAD_NC(GPP_H4, NONE), : : /* GPP_H5 - GPIO */ : PAD_NC(GPP_H5, NONE),
nc, up 20
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 362: GPP_H10 - I2C5_SDA */ : PAD_CFG_NF(GPP_H10, NONE, PLTRST, NF1), : : /* GPP_H11 - I2C5_SCL */ : PAD_CFG_NF(GPP_H11, NONE, PLTRST, NF1),
nc, none
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 387: PAD_CFG_NF(GPP_H18, NONE, DEEP, NF1),
nc, 20 up
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 389: /* GPP_H19 - GPIO */ : PAD_CFG_GPO(GPP_H19, 1, PLTRST), : : /* GPP_H20 - GPIO */ : PAD_NC(GPP_H20, NONE),
nc, 20 up
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 399: PAD_CFG_GPO(GPP_H22, 1, PLTRST),
nc 20 up
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 402: PAD_CFG_GPO(GPP_H23, 0, DEEP),
nc, none
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 413: PAD_CFG_NF(GPD2, NATIVE, DEEP, NF1),
nc, none
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 425: PAD_CFG_NF(GPD6, NONE, DEEP, NF1),
nc, 20 up
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 428: PAD_CFG_GPO(GPD7, 0, DEEP),
nc, none
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 434: PAD_CFG_NF(GPD9, NONE, DEEP, NF1),
nc, 20 up
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 437: PAD_CFG_NF(GPD10, NONE, DEEP, NF1),
nc 20 up
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 440: PAD_CFG_NF(GPD11, NONE, DEEP, NF1),
nc 20 up
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 451: PAD_CFG_GPO(GPP_C2, 1, DEEP),
nc, none
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 454: PAD_CFG_NF(GPP_C3, NONE, DEEP, NF1), : : /* GPP_C4 - SML0DATA */ : PAD_CFG_NF(GPP_C4, NONE, DEEP, NF1), :
nc, none
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 460: PAD_CFG_GPO(GPP_C5, 1, PLTRST),
nc, up 20
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 469: PAD_CFG_GPO(GPP_C8, 1, PLTRST), : : /* GPP_C9 - GPIO */ : PAD_CFG_GPO(GPP_C9, 1, PLTRST), :
could be configured as uart on R26 (TX), R206 (RX) - or NC, none
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 474: /* GPP_C10 - GPIO */ : PAD_CFG_GPO(GPP_C10, 0, PLTRST), : : /* GPP_C11 - GPIO */ : PAD_CFG_GPI_APIC(GPP_C11, NONE, DEEP, LEVEL, NONE), : : /* GPP_C12 - UART1_RXD */ : PAD_CFG_NF(GPP_C12, NONE, PLTRST, NF1), : : /* GPP_C13 - UART1_TXD */ : PAD_CFG_NF(GPP_C13, NONE, DEEP, NF1), : : /* GPP_C14 - UART1_RTS# */ : PAD_CFG_NF(GPP_C14, NONE, DEEP, NF1), : : /* GPP_C15 - UART1_CTS# */ : PAD_CFG_NF(GPP_C15, NONE, PLTRST, NF1),
all nc, up 20
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 493: AD_CFG_NF(GPP_C16, NONE, PLTRST, NF1), : : /* GPP_C17 - I2C0_SCL */ : PAD_CFG_NF(GPP_C17, NONE, PLTRST,
nc, none
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 498: P_C18 - I2C1_SDA */ : PAD_CFG_NF(GPP_C18, NONE, DEEP, NF1), : : /* GPP_C19 - I2C1_SCL */ : PAD_CFG_NF(GPP_C19, NONE,
nc, up 20
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 504: 20 - GPIO */ : PAD_NC(GPP_C20, NONE), : : /* GPP_C21 - GPIO */ : PAD_NC(GPP_C21, NONE),
could be configured as uart with R653 (TX), R654 (RX) - or NC, none
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 510: GPIO
USB3_P1_PWREN
Done; see CB:47220
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 513: PP_C23 - GPIO */ : PAD_CFG_GPI_APIC(GPP_C23, DN_20K, DEEP, LEVEL, NO
nc, 20 up
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 518: PP_E0 - GPIO */ : PAD_NC(GPP_E0, NONE), : : /* GPP_E1 - GPIO */ : PAD_NC(GPP_E1, NONE),
nc, 20 up
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 528: PAD_CFG_GPI_SMI(GPP_E3, NONE,
nc,up 20
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 531: PAD_CFG_GPO(GPP_E4, 1, PLTRST),
nf1 / devlsp0
Done; see CB:47220
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 533: GPP_E5 - GPIO */ : PAD_NC(GPP_E5, NONE), : : /* GPP_E6 - GPIO */ : PAD_NC(GPP_E6, NONE),
nc, up 20
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 540: G_GPI_TRIG_OWN(GPP_E7, NONE, PLTRST, EDGE_SINGLE, ACPI),
nc, none
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 545: PP_E9 - RESERVED */ : PAD_CFG_NF(GPP_E9, NONE, DEEP, NF5), : : /* GPP_E10 - RESERVED */ : PAD_CFG_NF(GPP_E10, NONE, DEEP, NF5),
lolwat. NF5. […]
Done; see CB:47220, CB:47222
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 564: _GPO(GPP_E15, 1,
nc, none
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 570: PAD_CFG_NF(GPP_E17, NONE, DEEP, NF1),
nc, none
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 578: /* GPP_E20 - DPPC_CTRLCLK */ : PAD_CFG_NF(GPP_E20, NONE, DEEP, NF1), : : /* GPP_E21 - DPPC_CTRLDATA */ : PAD_CFG_NF(GPP_E21, NONE, DEEP, NF1),
nc, none
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 585: PAD_CFG_NF(GPP_E22, NONE, PLTRST, NF1),
nc, up 20
Done
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 588: PAD_CFG_NF(GPP_E23, NONE, PLTRST, NF1),
nc, none
Done
Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47191 )
Change subject: mb/purism/librem_mini: Set unused GPIO pads to PAD_NC ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... File src/mainboard/purism/librem_cnl/variants/librem_mini/gpio.c:
https://review.coreboot.org/c/coreboot/+/47191/3/src/mainboard/purism/librem... PS3, Line 44: PAD_CFG_GPO(GPP_A11, 1, PLTRST),
nc, up 20k
Done
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47191 )
Change subject: mb/purism/librem_mini: Set unused GPIO pads to PAD_NC ......................................................................
Patch Set 5: Code-Review+2
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47191 )
Change subject: mb/purism/librem_mini: Set unused GPIO pads to PAD_NC ......................................................................
Patch Set 5:
(12 comments)
https://review.coreboot.org/c/coreboot/+/47191/4/src/mainboard/purism/librem... File src/mainboard/purism/librem_cnl/variants/librem_mini/gpio.c:
https://review.coreboot.org/c/coreboot/+/47191/4/src/mainboard/purism/librem... PS4, Line 83: : /* GPP_B0 - NC/TP */ : PAD_NC(GPP_B0, UP_20K), : : /* GPP_B1 - NC/TP */ : PAD_NC(GPP_B1, UP_20K), These can be left as NF1 just fine, actually.
https://review.coreboot.org/c/coreboot/+/47191/4/src/mainboard/purism/librem... PS4, Line 97: NONE Needs a pull.
https://review.coreboot.org/c/coreboot/+/47191/4/src/mainboard/purism/librem... PS4, Line 99: /* GPP_B5 - NC */ : PAD_NC(GPP_B5, NONE), : : /* GPP_B6 - NC */ : PAD_NC(GPP_B6, NONE), : : /* GPP_B7 - NC */ : PAD_NC(GPP_B7, NONE), : : /* GPP_B8 - NC */ : PAD_NC(GPP_B8, NONE), : : /* GPP_B9 - NC */ : PAD_NC(GPP_B9, NONE), : : /* GPP_B10 - NC */ : PAD_NC(GPP_B10, NONE), CLKREQ# seems to be used?
https://review.coreboot.org/c/coreboot/+/47191/4/src/mainboard/purism/librem... PS4, Line 117: /* GPP_B11 - GPIO */ : PAD_CFG_GPO(GPP_B11, 1, PLTRST), Not used
https://review.coreboot.org/c/coreboot/+/47191/4/src/mainboard/purism/librem... PS4, Line 126: /* GPP_B14 - GPIO */ : PAD_CFG_GPO(GPP_B14, 1, PLTRST), Should be native
https://review.coreboot.org/c/coreboot/+/47191/4/src/mainboard/purism/librem... PS4, Line 132: /* GPP_B16 - GSPI0_CLK */ : PAD_CFG_NF(GPP_B16, NONE, PLTRST, NF1), This one is NC too.
https://review.coreboot.org/c/coreboot/+/47191/4/src/mainboard/purism/librem... PS4, Line 205: /* GPP_D7 - NC */ : PAD_NC(GPP_D7, UP_20K), This is PCH_NVME_RST and needs to be an output
https://review.coreboot.org/c/coreboot/+/47191/4/src/mainboard/purism/librem... PS4, Line 395: /* GPP_H21 - GPIO */ : PAD_CFG_GPO(GPP_H21, 0, DEEP), NC, it's a strap
https://review.coreboot.org/c/coreboot/+/47191/4/src/mainboard/purism/librem... PS4, Line 412: /* GPD2 - NC */ : PAD_NC(GPD2, NONE), I don't think so
https://review.coreboot.org/c/coreboot/+/47191/4/src/mainboard/purism/librem... PS4, Line 462: /* GPP_C6 - NC */ : PAD_NC(GPP_C6, NONE), : : /* GPP_C7 - NC */ : PAD_NC(GPP_C7, NONE), These two go to the EC
https://review.coreboot.org/c/coreboot/+/47191/4/src/mainboard/purism/librem... PS4, Line 510: /* GPP_C22 - GPIO */ : PAD_CFG_GPO(GPP_C22, 1, PLTRST), We might want to pull this low to power off USB in sleep states
https://review.coreboot.org/c/coreboot/+/47191/4/src/mainboard/purism/librem... PS4, Line 562: : /* GPP_E15 - NC */ : PAD_NC(GPP_E15, NONE), Is it really NC?
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47191 )
Change subject: mb/purism/librem_mini: Set unused GPIO pads to PAD_NC ......................................................................
Patch Set 5:
(12 comments)
https://review.coreboot.org/c/coreboot/+/47191/4/src/mainboard/purism/librem... File src/mainboard/purism/librem_cnl/variants/librem_mini/gpio.c:
https://review.coreboot.org/c/coreboot/+/47191/4/src/mainboard/purism/librem... PS4, Line 83: : /* GPP_B0 - NC/TP */ : PAD_NC(GPP_B0, UP_20K), : : /* GPP_B1 - NC/TP */ : PAD_NC(GPP_B1, UP_20K),
These can be left as NF1 just fine, actually.
technically doesn't really matter, does it?
https://review.coreboot.org/c/coreboot/+/47191/4/src/mainboard/purism/librem... PS4, Line 97: NONE
Needs a pull.
ack
https://review.coreboot.org/c/coreboot/+/47191/4/src/mainboard/purism/librem... PS4, Line 99: /* GPP_B5 - NC */ : PAD_NC(GPP_B5, NONE), : : /* GPP_B6 - NC */ : PAD_NC(GPP_B6, NONE), : : /* GPP_B7 - NC */ : PAD_NC(GPP_B7, NONE), : : /* GPP_B8 - NC */ : PAD_NC(GPP_B8, NONE), : : /* GPP_B9 - NC */ : PAD_NC(GPP_B9, NONE), : : /* GPP_B10 - NC */ : PAD_NC(GPP_B10, NONE),
CLKREQ# seems to be used?
see CB:47220
https://review.coreboot.org/c/coreboot/+/47191/4/src/mainboard/purism/librem... PS4, Line 117: /* GPP_B11 - GPIO */ : PAD_CFG_GPO(GPP_B11, 1, PLTRST),
Not used
yup, nc, none - looks like I missed that one
https://review.coreboot.org/c/coreboot/+/47191/4/src/mainboard/purism/librem... PS4, Line 126: /* GPP_B14 - GPIO */ : PAD_CFG_GPO(GPP_B14, 1, PLTRST),
Should be native
see CB:47220 as commented in PS3 ;)
https://review.coreboot.org/c/coreboot/+/47191/4/src/mainboard/purism/librem... PS4, Line 132: /* GPP_B16 - GSPI0_CLK */ : PAD_CFG_NF(GPP_B16, NONE, PLTRST, NF1),
This one is NC too.
ack. nc, none
https://review.coreboot.org/c/coreboot/+/47191/4/src/mainboard/purism/librem... PS4, Line 205: /* GPP_D7 - NC */ : PAD_NC(GPP_D7, UP_20K),
This is PCH_NVME_RST and needs to be an output
nope; R526 is unstuff/nonpop
https://review.coreboot.org/c/coreboot/+/47191/4/src/mainboard/purism/librem... PS4, Line 395: /* GPP_H21 - GPIO */ : PAD_CFG_GPO(GPP_H21, 0, DEEP),
NC, it's a strap
ack! nc, none
https://review.coreboot.org/c/coreboot/+/47191/4/src/mainboard/purism/librem... PS4, Line 412: /* GPD2 - NC */ : PAD_NC(GPD2, NONE),
I don't think so
but I do - R332 is not populated
https://review.coreboot.org/c/coreboot/+/47191/4/src/mainboard/purism/librem... PS4, Line 462: /* GPP_C6 - NC */ : PAD_NC(GPP_C6, NONE), : : /* GPP_C7 - NC */ : PAD_NC(GPP_C7, NONE),
These two go to the EC
look closer ;) R126 and R130 are not populated
https://review.coreboot.org/c/coreboot/+/47191/4/src/mainboard/purism/librem... PS4, Line 510: /* GPP_C22 - GPIO */ : PAD_CFG_GPO(GPP_C22, 1, PLTRST),
We might want to pull this low to power off USB in sleep states
yep, would need ACPI
https://review.coreboot.org/c/coreboot/+/47191/4/src/mainboard/purism/librem... PS4, Line 562: : /* GPP_E15 - NC */ : PAD_NC(GPP_E15, NONE),
Is it really NC?
yup, because R324 is not populated; can you verify that on the board, please?
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47191 )
Change subject: mb/purism/librem_mini: Set unused GPIO pads to PAD_NC ......................................................................
Patch Set 5:
(2 comments)
https://review.coreboot.org/c/coreboot/+/47191/4/src/mainboard/purism/librem... File src/mainboard/purism/librem_cnl/variants/librem_mini/gpio.c:
https://review.coreboot.org/c/coreboot/+/47191/4/src/mainboard/purism/librem... PS4, Line 83: : /* GPP_B0 - NC/TP */ : PAD_NC(GPP_B0, UP_20K), : : /* GPP_B1 - NC/TP */ : PAD_NC(GPP_B1, UP_20K),
technically doesn't really matter, does it?
I have no idea if they are actually NC.
https://review.coreboot.org/c/coreboot/+/47191/4/src/mainboard/purism/librem... PS4, Line 205: /* GPP_D7 - NC */ : PAD_NC(GPP_D7, UP_20K),
nope; R526 is unstuff/nonpop
U40 is missing too.
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47191 )
Change subject: mb/purism/librem_mini: Set unused GPIO pads to PAD_NC ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/47191/4/src/mainboard/purism/librem... File src/mainboard/purism/librem_cnl/variants/librem_mini/gpio.c:
https://review.coreboot.org/c/coreboot/+/47191/4/src/mainboard/purism/librem... PS4, Line 205: /* GPP_D7 - NC */ : PAD_NC(GPP_D7, UP_20K),
nope; R526 is unstuff/nonpop
I found a hi... or midres image; U40 is unpop -> NC is right
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47191 )
Change subject: mb/purism/librem_mini: Set unused GPIO pads to PAD_NC ......................................................................
Patch Set 5:
(1 comment)
https://review.coreboot.org/c/coreboot/+/47191/4/src/mainboard/purism/librem... File src/mainboard/purism/librem_cnl/variants/librem_mini/gpio.c:
https://review.coreboot.org/c/coreboot/+/47191/4/src/mainboard/purism/librem... PS4, Line 83: : /* GPP_B0 - NC/TP */ : PAD_NC(GPP_B0, UP_20K), : : /* GPP_B1 - NC/TP */ : PAD_NC(GPP_B1, UP_20K),
I have no idea if they are actually NC.
according to the schematics they are (TP only)
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47191 )
Change subject: mb/purism/librem_mini: Set unused GPIO pads to PAD_NC ......................................................................
Patch Set 5:
(3 comments)
https://review.coreboot.org/c/coreboot/+/47191/4/src/mainboard/purism/librem... File src/mainboard/purism/librem_cnl/variants/librem_mini/gpio.c:
https://review.coreboot.org/c/coreboot/+/47191/4/src/mainboard/purism/librem... PS4, Line 412: /* GPD2 - NC */ : PAD_NC(GPD2, NONE),
but I do - R332 is not populated
Done
https://review.coreboot.org/c/coreboot/+/47191/4/src/mainboard/purism/librem... PS4, Line 462: /* GPP_C6 - NC */ : PAD_NC(GPP_C6, NONE), : : /* GPP_C7 - NC */ : PAD_NC(GPP_C7, NONE),
look closer ;) R126 and R130 are not populated
aaand vendor had NC, too
https://review.coreboot.org/c/coreboot/+/47191/4/src/mainboard/purism/librem... PS4, Line 562: : /* GPP_E15 - NC */ : PAD_NC(GPP_E15, NONE),
yup, because R324 is not populated; can you verify that on the board, please?
no markings on the board for resistors 😞
however, even vendor didn't have SCI configured, but GPO, while SMC_EXTSMI# would be an input. Setting GPO probably was done to prevent floating -> *should* be nc
Hello build bot (Jenkins), Paul Menzel, Angel Pons, Michael Niewöhner,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/47191
to look at the new patch set (#6).
Change subject: mb/purism/librem_mini: Set unused GPIO pads to PAD_NC ......................................................................
mb/purism/librem_mini: Set unused GPIO pads to PAD_NC
Set numerous pads to PAD_NC as per board schematics (they are either NC, or connected to test pads), and adjust comments as needed.
Change-Id: I4c2ab936256d0031d7a127fbeac42c8951a0b39f Signed-off-by: Matt DeVillier matt.devillier@puri.sm --- M src/mainboard/purism/librem_cnl/variants/librem_mini/gpio.c 1 file changed, 280 insertions(+), 280 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/47191/6
Matt DeVillier has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47191 )
Change subject: mb/purism/librem_mini: Set unused GPIO pads to PAD_NC ......................................................................
Patch Set 6:
(4 comments)
https://review.coreboot.org/c/coreboot/+/47191/4/src/mainboard/purism/librem... File src/mainboard/purism/librem_cnl/variants/librem_mini/gpio.c:
https://review.coreboot.org/c/coreboot/+/47191/4/src/mainboard/purism/librem... PS4, Line 97: NONE
ack
Done
https://review.coreboot.org/c/coreboot/+/47191/4/src/mainboard/purism/librem... PS4, Line 117: /* GPP_B11 - GPIO */ : PAD_CFG_GPO(GPP_B11, 1, PLTRST),
yup, nc, none - looks like I missed that one
Done
https://review.coreboot.org/c/coreboot/+/47191/4/src/mainboard/purism/librem... PS4, Line 132: /* GPP_B16 - GSPI0_CLK */ : PAD_CFG_NF(GPP_B16, NONE, PLTRST, NF1),
ack. […]
Done
https://review.coreboot.org/c/coreboot/+/47191/4/src/mainboard/purism/librem... PS4, Line 395: /* GPP_H21 - GPIO */ : PAD_CFG_GPO(GPP_H21, 0, DEEP),
ack! nc, none
Done
Angel Pons has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47191 )
Change subject: mb/purism/librem_mini: Set unused GPIO pads to PAD_NC ......................................................................
Patch Set 6: Code-Review+2
Michael Niewöhner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/47191 )
Change subject: mb/purism/librem_mini: Set unused GPIO pads to PAD_NC ......................................................................
Patch Set 6: Code-Review+2
Michael Niewöhner has submitted this change. ( https://review.coreboot.org/c/coreboot/+/47191 )
Change subject: mb/purism/librem_mini: Set unused GPIO pads to PAD_NC ......................................................................
mb/purism/librem_mini: Set unused GPIO pads to PAD_NC
Set numerous pads to PAD_NC as per board schematics (they are either NC, or connected to test pads), and adjust comments as needed.
Change-Id: I4c2ab936256d0031d7a127fbeac42c8951a0b39f Signed-off-by: Matt DeVillier matt.devillier@puri.sm Reviewed-on: https://review.coreboot.org/c/coreboot/+/47191 Tested-by: build bot (Jenkins) no-reply@coreboot.org Reviewed-by: Angel Pons th3fanbus@gmail.com Reviewed-by: Michael Niewöhner foss@mniewoehner.de --- M src/mainboard/purism/librem_cnl/variants/librem_mini/gpio.c 1 file changed, 280 insertions(+), 280 deletions(-)
Approvals: build bot (Jenkins): Verified Angel Pons: Looks good to me, approved Michael Niewöhner: Looks good to me, approved
diff --git a/src/mainboard/purism/librem_cnl/variants/librem_mini/gpio.c b/src/mainboard/purism/librem_cnl/variants/librem_mini/gpio.c index 4c735c5..b35ee4c 100644 --- a/src/mainboard/purism/librem_cnl/variants/librem_mini/gpio.c +++ b/src/mainboard/purism/librem_cnl/variants/librem_mini/gpio.c @@ -28,8 +28,8 @@ /* GPP_A6 - SERIRQ */ PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1),
- /* GPP_A7 - GPIO */ - PAD_CFG_GPO(GPP_A7, 1, DEEP), + /* GPP_A7 - NC */ + PAD_NC(GPP_A7, NONE),
/* GPP_A8 - CLKRUN# */ PAD_CFG_NF(GPP_A8, NONE, DEEP, NF1), @@ -40,43 +40,43 @@ /* GPP_A10 - CLKOUT_LPC1 */ PAD_CFG_NF(GPP_A10, DN_20K, DEEP, NF1),
- /* GPP_A11 - GPIO */ - PAD_CFG_GPO(GPP_A11, 1, PLTRST), + /* GPP_A11 - NC */ + PAD_NC(GPP_A11, UP_20K),
- /* GPP_A12 - GPIO */ - PAD_CFG_GPO(GPP_A12, 1, PLTRST), + /* GPP_A12 - NC */ + PAD_NC(GPP_A12, UP_20K),
- /* GPP_A13 - GPIO */ - PAD_CFG_GPO(GPP_A13, 1, PLTRST), + /* GPP_A13 - NC */ + PAD_NC(GPP_A13, NONE),
/* GPP_A14 - SUS_STAT# */ PAD_CFG_NF(GPP_A14, NONE, DEEP, NF1),
- /* GPP_A15 - GPIO */ - PAD_CFG_GPO(GPP_A15, 1, PLTRST), + /* GPP_A15 - NC */ + PAD_NC(GPP_A15, NONE),
- /* GPP_A16 - GPIO */ - PAD_CFG_TERM_GPO(GPP_A16, 1, UP_20K, PLTRST), + /* GPP_A16 - NC */ + PAD_NC(GPP_A16, UP_20K),
- /* GPP_A17 - GPIO */ - PAD_CFG_GPO(GPP_A17, 1, PLTRST), + /* GPP_A17 - NC */ + PAD_NC(GPP_A17, UP_20K),
- /* GPP_A18 - GPIO */ + /* GPP_A18 - NC */ PAD_NC(GPP_A18, UP_20K),
- /* GPP_A19 - GPIO */ + /* GPP_A19 - NC */ PAD_NC(GPP_A19, UP_20K),
- /* GPP_A20 - GPIO */ + /* GPP_A20 - NC */ PAD_NC(GPP_A20, UP_20K),
- /* GPP_A21 - GPIO */ + /* GPP_A21 - NC */ PAD_NC(GPP_A21, UP_20K),
- /* GPP_A22 - GPIO */ + /* GPP_A22 - NC */ PAD_NC(GPP_A22, UP_20K),
- /* GPP_A23 - GPIO */ + /* GPP_A23 - NC */ PAD_NC(GPP_A23, UP_20K),
/* ------- GPIO Group GPP_B ------- */ @@ -87,35 +87,35 @@ /* GPP_B1 - Reserved */ PAD_CFG_NF(GPP_B1, NONE, DEEP, NF1),
- /* GPP_B2 - VRALERT# */ - PAD_CFG_NF(GPP_B2, NONE, PLTRST, NF1), + /* GPP_B2 - NC */ + PAD_NC(GPP_B2, UP_20K),
- /* GPP_B3 - GPIO */ - PAD_CFG_GPO(GPP_B3, 1, PLTRST), + /* GPP_B3 - NC */ + PAD_NC(GPP_B3, NONE),
- /* GPP_B4 - GPIO */ - PAD_CFG_GPO(GPP_B4, 1, DEEP), + /* GPP_B4 - NC */ + PAD_NC(GPP_B4, UP_20K),
- /* GPP_B5 - GPIO */ + /* GPP_B5 - NC */ PAD_NC(GPP_B5, NONE),
- /* GPP_B6 - GPIO */ + /* GPP_B6 - NC */ PAD_NC(GPP_B6, NONE),
- /* GPP_B7 - GPIO */ + /* GPP_B7 - NC */ PAD_NC(GPP_B7, NONE),
- /* GPP_B8 - GPIO */ + /* GPP_B8 - NC */ PAD_NC(GPP_B8, NONE),
- /* GPP_B9 - GPIO */ + /* GPP_B9 - NC */ PAD_NC(GPP_B9, NONE),
- /* GPP_B10 - GPIO */ + /* GPP_B10 - NC */ PAD_NC(GPP_B10, NONE),
- /* GPP_B11 - GPIO */ - PAD_CFG_GPO(GPP_B11, 1, PLTRST), + /* GPP_B11 - NC */ + PAD_NC(GPP_B11, NONE),
/* GPP_B12 - SLP_S0# */ PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1), @@ -126,280 +126,280 @@ /* GPP_B14 - GPIO */ PAD_CFG_GPO(GPP_B14, 1, PLTRST),
- /* GPP_B15 - GPIO */ - PAD_CFG_TERM_GPO(GPP_B15, 1, UP_20K, PLTRST), + /* GPP_B15 - NC */ + PAD_NC(GPP_B15, NONE),
- /* GPP_B16 - GSPI0_CLK */ - PAD_CFG_NF(GPP_B16, NONE, PLTRST, NF1), + /* GPP_B16 - NC */ + PAD_NC(GPP_B16, NONE),
- /* GPP_B17 - GSPI0_MISO */ - PAD_CFG_NF(GPP_B17, NONE, PLTRST, NF1), + /* GPP_B17 - NC */ + PAD_NC(GPP_B17, NONE),
- /* GPP_B18 - GSPI0_MOSI */ - PAD_CFG_NF(GPP_B18, NONE, PLTRST, NF1), + /* GPP_B18 - NC */ + PAD_NC(GPP_B18, NONE),
- /* GPP_B19 - GSPI1_CS0# */ - PAD_CFG_NF(GPP_B19, NONE, PLTRST, NF1), + /* GPP_B19 - NC */ + PAD_NC(GPP_B19, NONE),
- /* GPP_B20 - GSPI1_CLK */ - PAD_CFG_NF(GPP_B20, NONE, PLTRST, NF1), + /* GPP_B20 - NC */ + PAD_NC(GPP_B20, NONE),
- /* GPP_B21 - GSPI1_MISO */ - PAD_CFG_NF(GPP_B21, NONE, PLTRST, NF1), + /* GPP_B21 - NC */ + PAD_NC(GPP_B21, NONE),
- /* GPP_B22 - GSPI1_MOSI */ - PAD_CFG_NF(GPP_B22, NONE, PLTRST, NF1), + /* GPP_B22 - NC */ + PAD_NC(GPP_B22, UP_20K),
- /* GPP_B23 - GPIO */ - PAD_CFG_GPO(GPP_B23, 1, DEEP), + /* GPP_B23 - NC */ + PAD_NC(GPP_B23, UP_20K),
/* ------- GPIO Group GPP_G ------- */
- /* GPP_G0 - GPIO */ - PAD_CFG_TERM_GPO(GPP_G0, 0, DN_20K, PWROK), + /* GPP_G0 - NC */ + PAD_NC(GPP_G0, UP_20K),
- /* GPP_G1 - GPIO */ + /* GPP_G1 - NC */ PAD_NC(GPP_G1, NONE),
- /* GPP_G2 - GPIO */ - PAD_NC(GPP_G2, NONE), + /* GPP_G2 - NC */ + PAD_NC(GPP_G2, UP_20K),
- /* GPP_G3 - GPIO */ - PAD_NC(GPP_G3, NONE), + /* GPP_G3 - NC */ + PAD_NC(GPP_G3, UP_20K),
- /* GPP_G4 - GPIO */ - PAD_NC(GPP_G4, NONE), + /* GPP_G4 - NC */ + PAD_NC(GPP_G4, UP_20K),
- /* GPP_G5 - GPIO */ + /* GPP_G5 - NC */ PAD_NC(GPP_G5, UP_20K),
- /* GPP_G6 - GPIO */ - PAD_NC(GPP_G6, NONE), + /* GPP_G6 - NC */ + PAD_NC(GPP_G6, UP_20K),
- /* GPP_G7 - GPIO */ + /* GPP_G7 - NC */ PAD_NC(GPP_G7, DN_20K),
/* ------- GPIO Group GPP_D ------- */
- /* GPP_D0 - GPIO */ - PAD_NC(GPP_D0, NONE), + /* GPP_D0 - NC */ + PAD_NC(GPP_D0, UP_20K),
- /* GPP_D1 - GPIO */ - PAD_NC(GPP_D1, NONE), + /* GPP_D1 - NC */ + PAD_NC(GPP_D1, UP_20K),
- /* GPP_D2 - GPIO */ - PAD_NC(GPP_D2, NONE), + /* GPP_D2 - NC */ + PAD_NC(GPP_D2, UP_20K),
- /* GPP_D3 - GPIO */ - PAD_NC(GPP_D3, NONE), + /* GPP_D3 - NC */ + PAD_NC(GPP_D3, UP_20K),
- /* GPP_D4 - GPIO */ - PAD_NC(GPP_D4, NONE), + /* GPP_D4 - NC */ + PAD_NC(GPP_D4, UP_20K),
- /* GPP_D5 - ISH_I2C0_SDA */ - PAD_CFG_NF(GPP_D5, NONE, DEEP, NF1), + /* GPP_D5 - NC */ + PAD_NC(GPP_D5, NONE),
- /* GPP_D6 - ISH_I2C0_SCL */ - PAD_CFG_NF(GPP_D6, NONE, DEEP, NF1), + /* GPP_D6 - NC */ + PAD_NC(GPP_D6, NONE),
- /* GPP_D7 - GPIO */ - PAD_CFG_GPO(GPP_D7, 1, PLTRST), + /* GPP_D7 - NC */ + PAD_NC(GPP_D7, UP_20K),
- /* GPP_D8 - GPIO */ - PAD_CFG_GPO(GPP_D8, 1, PLTRST), + /* GPP_D8 - NC */ + PAD_NC(GPP_D8, NONE),
- /* GPP_D9 - GPIO */ - PAD_CFG_GPO(GPP_D9, 1, PLTRST), + /* GPP_D9 - NC */ + PAD_NC(GPP_D9, NONE),
- /* GPP_D10 - GPIO */ - PAD_CFG_GPO(GPP_D10, 1, PLTRST), + /* GPP_D10 - NC */ + PAD_NC(GPP_D10, NONE),
- /* GPP_D11 - GPIO */ - PAD_CFG_TERM_GPO(GPP_D11, 1, UP_20K, DEEP), + /* GPP_D11 - NC */ + PAD_NC(GPP_D11, UP_20K),
- /* GPP_D12 - GPIO */ - PAD_CFG_GPI_APIC(GPP_D12, UP_20K, DEEP, EDGE_SINGLE, NONE), + /* GPP_D12 - NC */ + PAD_NC(GPP_D12, UP_20K),
- /* GPP_D13 - GPIO */ - PAD_NC(GPP_D13, NONE), + /* GPP_D13 - NC */ + PAD_NC(GPP_D13, DN_20K),
- /* GPP_D14 - GPIO */ - PAD_CFG_GPO(GPP_D14, 1, PLTRST), + /* GPP_D14 - NC */ + PAD_NC(GPP_D14, DN_20K),
- /* GPP_D15 - GPIO */ - PAD_CFG_GPO(GPP_D15, 1, PLTRST), + /* GPP_D15 - NC */ + PAD_NC(GPP_D15, UP_20K),
- /* GPP_D16 - GPIO */ - PAD_CFG_GPO(GPP_D16, 0, RSMRST), + /* GPP_D16 - NC */ + PAD_NC(GPP_D16, UP_20K),
- /* GPP_D17 - DMIC_CLK1 */ - PAD_CFG_NF(GPP_D17, NONE, DEEP, NF1), + /* GPP_D17 - NC */ + PAD_NC(GPP_D17, NONE),
- /* GPP_D18 - DMIC_DATA1 */ - PAD_CFG_NF(GPP_D18, NONE, DEEP, NF1), + /* GPP_D18 - NC */ + PAD_NC(GPP_D18, NONE),
- /* GPP_D19 - DMIC_CLK0 */ - PAD_CFG_NF(GPP_D19, NONE, DEEP, NF1), + /* GPP_D19 - NC */ + PAD_NC(GPP_D19, NONE),
- /* GPP_D20 - DMIC_DATA0 */ - PAD_CFG_NF(GPP_D20, NONE, DEEP, NF1), + /* GPP_D20 - NC */ + PAD_NC(GPP_D20, NONE),
- /* GPP_D21 - GPIO */ - PAD_NC(GPP_D21, NONE), + /* GPP_D21 - NC */ + PAD_NC(GPP_D21, UP_20K),
- /* GPP_D22 - GPIO */ - PAD_NC(GPP_D22, NONE), + /* GPP_D22 - NC */ + PAD_NC(GPP_D22, UP_20K),
- /* GPP_D23 - GPIO */ - PAD_NC(GPP_D23, NONE), + /* GPP_D23 - NC */ + PAD_NC(GPP_D23, UP_20K),
/* ------- GPIO Group GPP_F ------- */
- /* GPP_F0 - GPIO */ - PAD_NC(GPP_F0, NONE), + /* GPP_F0 - NC */ + PAD_NC(GPP_F0, UP_20K),
- /* GPP_F1 - GPIO */ - PAD_CFG_GPO(GPP_F1, 0, RSMRST), + /* GPP_F1 - NC */ + PAD_NC(GPP_F1, UP_20K),
- /* GPP_F2 - GPIO */ - PAD_CFG_TERM_GPO(GPP_F2, 1, UP_20K, PLTRST), + /* GPP_F2 - NC */ + PAD_NC(GPP_F2, UP_20K),
- /* GPP_F3 - GPIO */ + /* GPP_F3 - NC */ PAD_NC(GPP_F3, UP_20K),
- /* GPP_F4 - CNV_BRI_DT */ - PAD_CFG_NF(GPP_F4, UP_20K, DEEP, NF1), + /* GPP_F4 - NC */ + PAD_NC(GPP_F4, UP_20K),
- /* GPP_F5 - CNV_BRI_RSP */ - PAD_CFG_NF(GPP_F5, UP_20K, DEEP, NF1), + /* GPP_F5 - NC */ + PAD_NC(GPP_F5, UP_20K),
- /* GPP_F6 - CNV_RGI_DT */ - PAD_CFG_NF(GPP_F6, UP_20K, DEEP, NF1), + /* GPP_F6 - NC */ + PAD_NC(GPP_F6, NONE),
- /* GPP_F7 - CNV_RGI_RSP */ - PAD_CFG_NF(GPP_F7, UP_20K, DEEP, NF1), + /* GPP_F7 - NC */ + PAD_NC(GPP_F7, NONE),
- /* GPP_F8 - GPIO */ - PAD_NC(GPP_F8, NONE), + /* GPP_F8 - NC */ + PAD_NC(GPP_F8, UP_20K),
- /* GPP_F9 - GPIO */ - PAD_NC(GPP_F9, NONE), + /* GPP_F9 - NC */ + PAD_NC(GPP_F9, UP_20K),
- /* GPP_F10 - GPIO */ - PAD_CFG_GPO(GPP_F10, 1, PLTRST), + /* GPP_F10 - NC */ + PAD_NC(GPP_F10, UP_20K),
- /* GPP_F11 - GPIO */ - PAD_NC(GPP_F11, NONE), + /* GPP_F11 - NC */ + PAD_NC(GPP_F11, UP_20K),
- /* GPP_F12 - GPIO */ - PAD_NC(GPP_F12, NONE), + /* GPP_F12 - NC */ + PAD_NC(GPP_F12, UP_20K),
- /* GPP_F13 - GPIO */ - PAD_NC(GPP_F13, NONE), + /* GPP_F13 - NC */ + PAD_NC(GPP_F13, UP_20K),
- /* GPP_F14 - GPIO */ - PAD_NC(GPP_F14, NONE), + /* GPP_F14 - NC */ + PAD_NC(GPP_F14, UP_20K),
- /* GPP_F15 - GPIO */ - PAD_NC(GPP_F15, NONE), + /* GPP_F15 - NC */ + PAD_NC(GPP_F15, UP_20K),
- /* GPP_F16 - GPIO */ - PAD_NC(GPP_F16, NONE), + /* GPP_F16 - NC */ + PAD_NC(GPP_F16, UP_20K),
- /* GPP_F17 - GPIO */ - PAD_NC(GPP_F17, NONE), + /* GPP_F17 - NC */ + PAD_NC(GPP_F17, UP_20K),
- /* GPP_F18 - GPIO */ - PAD_NC(GPP_F18, NONE), + /* GPP_F18 - NC */ + PAD_NC(GPP_F18, UP_20K),
- /* GPP_F19 - GPIO */ - PAD_NC(GPP_F19, NONE), + /* GPP_F19 - NC */ + PAD_NC(GPP_F19, UP_20K),
- /* GPP_F20 - GPIO */ - PAD_NC(GPP_F20, NONE), + /* GPP_F20 - NC */ + PAD_NC(GPP_F20, UP_20K),
- /* GPP_F21 - GPIO */ - PAD_NC(GPP_F21, NONE), + /* GPP_F21 - NC */ + PAD_NC(GPP_F21, UP_20K),
- /* GPP_F22 - GPIO */ - PAD_NC(GPP_F22, NONE), + /* GPP_F22 - NC */ + PAD_NC(GPP_F22, UP_20K),
- /* GPP_F23 - A4WP_PRESENT */ - PAD_CFG_NF(GPP_F23, DN_20K, DEEP, NF1), + /* GPP_F23 - NC */ + PAD_NC(GPP_F23, UP_20K),
/* ------- GPIO Group GPP_H ------- */
- /* GPP_H0 - GPIO */ + /* GPP_H0 - NC */ PAD_NC(GPP_H0, UP_20K),
- /* GPP_H1 - CNV_RF_RESET# */ - PAD_CFG_NF(GPP_H1, UP_20K, DEEP, NF3), + /* GPP_H1 - NC# */ + PAD_NC(GPP_H1, NONE),
- /* GPP_H2 - MODEM_CLKREQ */ - PAD_CFG_NF(GPP_H2, UP_20K, DEEP, NF3), + /* GPP_H2 - NC */ + PAD_NC(GPP_H2, NONE),
- /* GPP_H3 - GPIO */ + /* GPP_H3 - NC */ PAD_NC(GPP_H3, UP_20K),
- /* GPP_H4 - GPIO */ - PAD_NC(GPP_H4, NONE), + /* GPP_H4 - NC */ + PAD_NC(GPP_H4, UP_20K),
- /* GPP_H5 - GPIO */ - PAD_NC(GPP_H5, NONE), + /* GPP_H5 - NC */ + PAD_NC(GPP_H5, UP_20K),
- /* GPP_H6 - I2C3_SDA */ - PAD_CFG_NF(GPP_H6, NONE, DEEP, NF1), + /* GPP_H6 - NC */ + PAD_NC(GPP_H6, UP_20K),
- /* GPP_H7 - I2C3_SCL */ - PAD_CFG_NF(GPP_H7, NONE, DEEP, NF1), + /* GPP_H7 - NC */ + PAD_NC(GPP_H7, UP_20K),
- /* GPP_H8 - I2C4_SDA */ - PAD_CFG_NF(GPP_H8, NONE, DEEP, NF1), + /* GPP_H8 - NC */ + PAD_NC(GPP_H8, UP_20K),
- /* GPP_H9 - I2C4_SCL */ - PAD_CFG_NF(GPP_H9, NONE, DEEP, NF1), + /* GPP_H9 - NC */ + PAD_NC(GPP_H9, UP_20K),
- /* GPP_H10 - I2C5_SDA */ - PAD_CFG_NF(GPP_H10, NONE, PLTRST, NF1), + /* GPP_H10 - NC */ + PAD_NC(GPP_H10, NONE),
- /* GPP_H11 - I2C5_SCL */ - PAD_CFG_NF(GPP_H11, NONE, PLTRST, NF1), + /* GPP_H11 - NC */ + PAD_NC(GPP_H11, NONE),
- /* GPP_H12 - GPIO */ - PAD_CFG_GPO(GPP_H12, 1, PLTRST), + /* GPP_H12 - NC */ + PAD_NC(GPP_H12, UP_20K),
- /* GPP_H13 - GPIO */ - PAD_CFG_GPO(GPP_H13, 1, PLTRST), + /* GPP_H13 - NC */ + PAD_NC(GPP_H13, UP_20K),
- /* GPP_H14 - GPIO */ - PAD_CFG_GPO(GPP_H14, 1, PLTRST), + /* GPP_H14 - NC */ + PAD_NC(GPP_H14, UP_20K),
- /* GPP_H15 - GPIO */ - PAD_CFG_GPO(GPP_H15, 1, PLTRST), + /* GPP_H15 - NC */ + PAD_NC(GPP_H15, UP_20K),
- /* GPP_H16 - GPIO */ - PAD_NC(GPP_H16, NONE), + /* GPP_H16 - NC */ + PAD_NC(GPP_H16, UP_20K),
- /* GPP_H17 - GPIO */ - PAD_CFG_GPO(GPP_H17, 0, DEEP), + /* GPP_H17 - NC */ + PAD_NC(GPP_H17, UP_20K),
- /* GPP_H18 - CPU_C10_GATE# */ - PAD_CFG_NF(GPP_H18, NONE, DEEP, NF1), + /* GPP_H18 - NC */ + PAD_NC(GPP_H18, UP_20K),
- /* GPP_H19 - GPIO */ - PAD_CFG_GPO(GPP_H19, 1, PLTRST), + /* GPP_H19 - NC */ + PAD_NC(GPP_H19, UP_20K),
- /* GPP_H20 - GPIO */ - PAD_NC(GPP_H20, NONE), + /* GPP_H20 - NC */ + PAD_NC(GPP_H20, UP_20K),
- /* GPP_H21 - GPIO */ - PAD_CFG_GPO(GPP_H21, 0, DEEP), + /* GPP_H21 - NC */ + PAD_NC(GPP_H21, NONE),
- /* GPP_H22 - GPIO */ - PAD_CFG_GPO(GPP_H22, 1, PLTRST), + /* GPP_H22 - NC */ + PAD_NC(GPP_H22, UP_20K),
- /* GPP_H23 - GPIO */ - PAD_CFG_GPO(GPP_H23, 0, DEEP), + /* GPP_H23 - NC */ + PAD_NC(GPP_H23, NONE),
/* ------- GPIO Group GPD ------- */
@@ -409,8 +409,8 @@ /* GPD1 - ACPRESENT */ PAD_CFG_NF(GPD1, NATIVE, DEEP, NF1),
- /* GPD2 - LAN_WAKE# */ - PAD_CFG_NF(GPD2, NATIVE, DEEP, NF1), + /* GPD2 - NC */ + PAD_NC(GPD2, NONE),
/* GPD3 - PRWBTN# */ PAD_CFG_NF(GPD3, UP_20K, DEEP, NF1), @@ -421,23 +421,23 @@ /* GPD5 - SLP_S4# */ PAD_CFG_NF(GPD5, NONE, DEEP, NF1),
- /* GPD6 - SLP_A# */ - PAD_CFG_NF(GPD6, NONE, DEEP, NF1), + /* GPD6 - NC */ + PAD_NC(GPD6, UP_20K),
- /* GPD7 - GPIO */ - PAD_CFG_GPO(GPD7, 0, DEEP), + /* GPD7 - NC */ + PAD_NC(GPD7, NONE),
/* GPD8 - SUSCLK */ PAD_CFG_NF(GPD8, NONE, DEEP, NF1),
- /* GPD9 - SLP_WLAN# */ - PAD_CFG_NF(GPD9, NONE, DEEP, NF1), + /* GPD9 - NC */ + PAD_NC(GPD9, UP_20K),
- /* GPD10 - SLP_S5# */ - PAD_CFG_NF(GPD10, NONE, DEEP, NF1), + /* GPD10 - NC */ + PAD_NC(GPD10, UP_20K),
- /* GPD11 - LANPHYPC */ - PAD_CFG_NF(GPD11, NONE, DEEP, NF1), + /* GPD11 - NC */ + PAD_NC(GPD11, UP_20K),
/* ------- GPIO Group GPP_C ------- */
@@ -447,97 +447,97 @@ /* GPP_C1 - SMBDATA */ PAD_CFG_NF(GPP_C1, NONE, DEEP, NF1),
- /* GPP_C2 - GPIO */ - PAD_CFG_GPO(GPP_C2, 1, DEEP), + /* GPP_C2 - NC */ + PAD_NC(GPP_C2, NONE),
- /* GPP_C3 - SML0CLK */ - PAD_CFG_NF(GPP_C3, NONE, DEEP, NF1), + /* GPP_C3 - NC */ + PAD_NC(GPP_C3, NONE),
- /* GPP_C4 - SML0DATA */ - PAD_CFG_NF(GPP_C4, NONE, DEEP, NF1), + /* GPP_C4 - NC */ + PAD_NC(GPP_C4, NONE),
- /* GPP_C5 - GPIO */ - PAD_CFG_GPO(GPP_C5, 1, PLTRST), + /* GPP_C5 - NC */ + PAD_NC(GPP_C5, UP_20K),
- /* GPP_C6 - GPIO */ + /* GPP_C6 - NC */ PAD_NC(GPP_C6, NONE),
- /* GPP_C7 - GPIO */ + /* GPP_C7 - NC */ PAD_NC(GPP_C7, NONE),
- /* GPP_C8 - GPIO */ - PAD_CFG_GPO(GPP_C8, 1, PLTRST), + /* GPP_C8 - NC */ + PAD_NC(GPP_C8, NONE),
- /* GPP_C9 - GPIO */ - PAD_CFG_GPO(GPP_C9, 1, PLTRST), + /* GPP_C9 - NC */ + PAD_NC(GPP_C9, NONE),
- /* GPP_C10 - GPIO */ - PAD_CFG_GPO(GPP_C10, 0, PLTRST), + /* GPP_C10 - NC */ + PAD_NC(GPP_C10, UP_20K),
- /* GPP_C11 - GPIO */ - PAD_CFG_GPI_APIC(GPP_C11, NONE, DEEP, LEVEL, NONE), + /* GPP_C11 - NC */ + PAD_NC(GPP_C11, UP_20K),
- /* GPP_C12 - UART1_RXD */ - PAD_CFG_NF(GPP_C12, NONE, PLTRST, NF1), + /* GPP_C12 - NC */ + PAD_NC(GPP_C12, UP_20K),
- /* GPP_C13 - UART1_TXD */ - PAD_CFG_NF(GPP_C13, NONE, DEEP, NF1), + /* GPP_C13 - NC */ + PAD_NC(GPP_C13, UP_20K),
- /* GPP_C14 - UART1_RTS# */ - PAD_CFG_NF(GPP_C14, NONE, DEEP, NF1), + /* GPP_C14 - NC */ + PAD_NC(GPP_C14, UP_20K),
- /* GPP_C15 - UART1_CTS# */ - PAD_CFG_NF(GPP_C15, NONE, PLTRST, NF1), + /* GPP_C15 - NC */ + PAD_NC(GPP_C15, UP_20K),
- /* GPP_C16 - I2C0_SDA */ - PAD_CFG_NF(GPP_C16, NONE, PLTRST, NF1), + /* GPP_C16 - NC */ + PAD_NC(GPP_C16, NONE),
- /* GPP_C17 - I2C0_SCL */ - PAD_CFG_NF(GPP_C17, NONE, PLTRST, NF1), + /* GPP_C17 - NC */ + PAD_NC(GPP_C17, NONE),
- /* GPP_C18 - I2C1_SDA */ - PAD_CFG_NF(GPP_C18, NONE, DEEP, NF1), + /* GPP_C18 - NC */ + PAD_NC(GPP_C18, UP_20K),
- /* GPP_C19 - I2C1_SCL */ - PAD_CFG_NF(GPP_C19, NONE, DEEP, NF1), + /* GPP_C19 - NC */ + PAD_NC(GPP_C19, UP_20K),
- /* GPP_C20 - GPIO */ + /* GPP_C20 - NC */ PAD_NC(GPP_C20, NONE),
- /* GPP_C21 - GPIO */ + /* GPP_C21 - NC */ PAD_NC(GPP_C21, NONE),
/* GPP_C22 - GPIO */ PAD_CFG_GPO(GPP_C22, 1, PLTRST),
- /* GPP_C23 - GPIO */ - PAD_CFG_GPI_APIC(GPP_C23, DN_20K, DEEP, LEVEL, NONE), + /* GPP_C23 - NC */ + PAD_NC(GPP_C23, UP_20K),
/* ------- GPIO Group GPP_E ------- */
- /* GPP_E0 - GPIO */ - PAD_NC(GPP_E0, NONE), + /* GPP_E0 - NC */ + PAD_NC(GPP_E0, UP_20K),
- /* GPP_E1 - GPIO */ - PAD_NC(GPP_E1, NONE), + /* GPP_E1 - NC */ + PAD_NC(GPP_E1, UP_20K),
/* GPP_E2 - SATAXPCIE2 */ PAD_CFG_NF(GPP_E2, UP_20K, PLTRST, NF1),
- /* GPP_E3 - GPIO */ - PAD_CFG_GPI_SMI(GPP_E3, NONE, PLTRST, EDGE_SINGLE, NONE), + /* GPP_E3 - NC */ + PAD_NC(GPP_E3, UP_20K),
/* GPP_E4 - GPIO */ PAD_CFG_GPO(GPP_E4, 1, PLTRST),
- /* GPP_E5 - GPIO */ - PAD_NC(GPP_E5, NONE), + /* GPP_E5 - NC */ + PAD_NC(GPP_E5, UP_20K),
- /* GPP_E6 - GPIO */ - PAD_NC(GPP_E6, NONE), + /* GPP_E6 - NC */ + PAD_NC(GPP_E6, UP_20K),
- /* GPP_E7 - GPIO */ - PAD_CFG_GPI_TRIG_OWN(GPP_E7, NONE, PLTRST, EDGE_SINGLE, ACPI), + /* GPP_E7 - NC */ + PAD_NC(GPP_E7, NONE),
/* GPP_E8 - SATALED# */ PAD_CFG_NF(GPP_E8, NONE, DEEP, NF1), @@ -560,14 +560,14 @@ /* GPP_E14 - DDPC_HPD1 */ PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1),
- /* GPP_E15 - GPIO */ - PAD_CFG_GPO(GPP_E15, 1, PLTRST), + /* GPP_E15 - NC */ + PAD_NC(GPP_E15, NONE),
/* GPP_E16 - GPIO */ PAD_CFG_GPI_SCI(GPP_E16, UP_20K, PLTRST, LEVEL, INVERT),
- /* GPP_E17 - EDP_HPD */ - PAD_CFG_NF(GPP_E17, NONE, DEEP, NF1), + /* GPP_E17 - NC */ + PAD_NC(GPP_E17, NONE),
/* GPP_E18 - DPPB_CTRLCLK */ PAD_CFG_NF(GPP_E18, NONE, DEEP, NF1), @@ -575,17 +575,17 @@ /* GPP_E19 - DPPB_CTRLDATA */ PAD_CFG_NF(GPP_E19, NONE, DEEP, NF1),
- /* GPP_E20 - DPPC_CTRLCLK */ - PAD_CFG_NF(GPP_E20, NONE, DEEP, NF1), + /* GPP_E20 - NC */ + PAD_NC(GPP_E20, NONE),
- /* GPP_E21 - DPPC_CTRLDATA */ - PAD_CFG_NF(GPP_E21, NONE, DEEP, NF1), + /* GPP_E21 - NC */ + PAD_NC(GPP_E21, NONE),
- /* GPP_E22 - DPPD_CTRLCLK */ - PAD_CFG_NF(GPP_E22, NONE, PLTRST, NF1), + /* GPP_E22 - NC */ + PAD_NC(GPP_E22, UP_20K),
- /* GPP_E23 - DPPD_CTRLDATA */ - PAD_CFG_NF(GPP_E23, NONE, PLTRST, NF1), + /* GPP_E23 - NC */ + PAD_NC(GPP_E23, NONE), };
const struct pad_config *variant_gpio_table(size_t *num)
-
Angel Pons (Code Review) -
Matt DeVillier (Code Review)
-
Michael Niewöhner (Code Review)