Jacob Garber has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/34548 )
Change subject: cpu,mb,soc: Init missing lb_serial struct fields ......................................................................
cpu,mb,soc: Init missing lb_serial struct fields
Initialize the input_hertz and uart_pci_addr fields of the lb_serial struct to prevent later undefined reads in lb_add_serial(). This was done for exynos5420 in commit ff94e00362 (soc/samsung/exynos5420/uart.c: Init new serial struct variables), and this patch finishes the rest.
Change-Id: I733bc8185e2f2d28a9823495b53d6b09dce4deb1 Signed-off-by: Jacob Garber jgarber1@ualberta.ca Found-by: Coverity CID 1354778 --- M src/cpu/ti/am335x/uart.c M src/mainboard/emulation/qemu-power8/uart.c M src/soc/imgtec/pistachio/uart.c M src/soc/mediatek/common/uart.c M src/soc/nvidia/tegra124/uart.c M src/soc/nvidia/tegra210/uart.c M src/soc/qualcomm/ipq40xx/uart.c M src/soc/qualcomm/qcs405/uart.c M src/soc/samsung/exynos5250/uart.c 9 files changed, 25 insertions(+), 6 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/34548/1
diff --git a/src/cpu/ti/am335x/uart.c b/src/cpu/ti/am335x/uart.c index 4e9d012..657404c 100644 --- a/src/cpu/ti/am335x/uart.c +++ b/src/cpu/ti/am335x/uart.c @@ -190,8 +190,10 @@ serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE); serial.baud = get_uart_baudrate(); serial.regwidth = 2; - lb_add_serial(&serial, data); + serial.input_hertz = uart_platform_refclk(); + serial.uart_pci_addr = CONFIG_UART_PCI_ADDR;
+ lb_add_serial(&serial, data); lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); } #endif diff --git a/src/mainboard/emulation/qemu-power8/uart.c b/src/mainboard/emulation/qemu-power8/uart.c index 9548b7c..a917421 100644 --- a/src/mainboard/emulation/qemu-power8/uart.c +++ b/src/mainboard/emulation/qemu-power8/uart.c @@ -50,6 +50,9 @@ serial.baseaddr = 0; serial.baud = 115200; serial.regwidth = 1; + serial.input_hertz = uart_platform_refclk(); + serial.uart_pci_addr = CONFIG_UART_PCI_ADDR; + lb_add_serial(&serial, data); lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); } diff --git a/src/soc/imgtec/pistachio/uart.c b/src/soc/imgtec/pistachio/uart.c index a39f2ec..380292f 100644 --- a/src/soc/imgtec/pistachio/uart.c +++ b/src/soc/imgtec/pistachio/uart.c @@ -151,8 +151,10 @@ serial.baseaddr = CONFIG_CONSOLE_SERIAL_UART_ADDRESS; serial.baud = get_uart_baudrate(); serial.regwidth = 1 << UART_SHIFT; - lb_add_serial(&serial, data); + serial.input_hertz = uart_platform_refclk(); + serial.uart_pci_addr = CONFIG_UART_PCI_ADDR;
+ lb_add_serial(&serial, data); lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); } #endif diff --git a/src/soc/mediatek/common/uart.c b/src/soc/mediatek/common/uart.c index 8905c55..c53909d 100644 --- a/src/soc/mediatek/common/uart.c +++ b/src/soc/mediatek/common/uart.c @@ -181,8 +181,10 @@ serial.input_hertz = UART_HZ; serial.baud = get_uart_baudrate(); serial.regwidth = 4; - lb_add_serial(&serial, data); + serial.input_hertz = uart_platform_refclk(); + serial.uart_pci_addr = CONFIG_UART_PCI_ADDR;
+ lb_add_serial(&serial, data); lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); } #endif diff --git a/src/soc/nvidia/tegra124/uart.c b/src/soc/nvidia/tegra124/uart.c index c9514ac..697c90d 100644 --- a/src/soc/nvidia/tegra124/uart.c +++ b/src/soc/nvidia/tegra124/uart.c @@ -136,8 +136,10 @@ serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE); serial.baud = get_uart_baudrate(); serial.regwidth = 4; - lb_add_serial(&serial, data); + serial.input_hertz = uart_platform_refclk(); + serial.uart_pci_addr = CONFIG_UART_PCI_ADDR;
+ lb_add_serial(&serial, data); lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); } #endif diff --git a/src/soc/nvidia/tegra210/uart.c b/src/soc/nvidia/tegra210/uart.c index a91818c..0de85cb 100644 --- a/src/soc/nvidia/tegra210/uart.c +++ b/src/soc/nvidia/tegra210/uart.c @@ -123,8 +123,10 @@ serial.baseaddr = CONFIG_CONSOLE_SERIAL_TEGRA210_UART_ADDRESS; serial.baud = get_uart_baudrate(); serial.regwidth = 4; - lb_add_serial(&serial, data); + serial.input_hertz = uart_platform_refclk(); + serial.uart_pci_addr = CONFIG_UART_PCI_ADDR;
+ lb_add_serial(&serial, data); lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); } #endif diff --git a/src/soc/qualcomm/ipq40xx/uart.c b/src/soc/qualcomm/ipq40xx/uart.c index eb3731b..77e0480 100644 --- a/src/soc/qualcomm/ipq40xx/uart.c +++ b/src/soc/qualcomm/ipq40xx/uart.c @@ -293,6 +293,8 @@ serial.baseaddr = (uint32_t)UART1_DM_BASE; serial.baud = get_uart_baudrate(); serial.regwidth = 1; + serial.input_hertz = uart_platform_refclk(); + serial.uart_pci_addr = CONFIG_UART_PCI_ADDR;
lb_add_serial(&serial, data); lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); diff --git a/src/soc/qualcomm/qcs405/uart.c b/src/soc/qualcomm/qcs405/uart.c index 4a43312..8278db2 100644 --- a/src/soc/qualcomm/qcs405/uart.c +++ b/src/soc/qualcomm/qcs405/uart.c @@ -296,6 +296,8 @@ serial.baseaddr = (uint64_t)UART2_DM_BASE; serial.baud = get_uart_baudrate(); serial.regwidth = 1; + serial.input_hertz = uart_platform_refclk(); + serial.uart_pci_addr = CONFIG_UART_PCI_ADDR;
lb_add_serial(&serial, data); lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); diff --git a/src/soc/samsung/exynos5250/uart.c b/src/soc/samsung/exynos5250/uart.c index 1b8e785..9654033 100644 --- a/src/soc/samsung/exynos5250/uart.c +++ b/src/soc/samsung/exynos5250/uart.c @@ -193,8 +193,10 @@ serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE); serial.baud = get_uart_baudrate(); serial.regwidth = 4; - lb_add_serial(&serial, data); + serial.input_hertz = uart_platform_refclk(); + serial.uart_pci_addr = CONFIG_UART_PCI_ADDR;
+ lb_add_serial(&serial, data); lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); } #endif
Jacob Garber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34548 )
Change subject: cpu,mb,soc: Init missing lb_serial struct fields ......................................................................
Patch Set 1:
Non-PCI drivers can use 0 for uart_pci_addr (I think), but I'm not sure which ones those are, so everything is CONFIG_UART_PCI_ADDR for now.
Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34548 )
Change subject: cpu,mb,soc: Init missing lb_serial struct fields ......................................................................
Patch Set 1: Code-Review+2
Non-PCI drivers can use 0 for uart_pci_addr (I think), but I'm not sure which ones those are, so everything is CONFIG_UART_PCI_ADDR for now.
nit: Can we just integrate that into lb_add_serial() instead? Saves one more line of boilerplate in all those drivers.
Hello ron minnich, Julius Werner, David Hendricks, build bot (Jenkins), Nico Huber, Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/34548
to look at the new patch set (#2).
Change subject: cpu,mb,soc: Init missing lb_serial struct fields ......................................................................
cpu,mb,soc: Init missing lb_serial struct fields
Initialize the input_hertz field of the lb_serial struct to prevent later undefined reads in lb_add_serial(). This was done for exynos5420 in commit ff94e00362 (soc/samsung/exynos5420/uart.c: Init new serial struct variables), and this patch finishes the rest. Also, move the assignment of uart_pci_addr into lb_add_serial() and set it to CONFIG_UART_PCI_ADDR, since it is the same for all the drivers.
Change-Id: I733bc8185e2f2d28a9823495b53d6b09dce4deb1 Signed-off-by: Jacob Garber jgarber1@ualberta.ca Found-by: Coverity CID 1354778 --- M src/cpu/allwinner/a10/uart_console.c M src/cpu/ti/am335x/uart.c M src/drivers/uart/pl011.c M src/drivers/uart/uart8250io.c M src/drivers/uart/uart8250mem.c M src/lib/coreboot_table.c M src/mainboard/emulation/qemu-power8/uart.c M src/soc/imgtec/pistachio/uart.c M src/soc/mediatek/common/uart.c M src/soc/nvidia/tegra124/uart.c M src/soc/nvidia/tegra210/uart.c M src/soc/qualcomm/ipq40xx/uart.c M src/soc/qualcomm/qcs405/uart.c M src/soc/samsung/exynos5250/uart.c M src/soc/samsung/exynos5420/uart.c 15 files changed, 13 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/34548/2
Hello ron minnich, Julius Werner, David Hendricks, build bot (Jenkins), Nico Huber, Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/34548
to look at the new patch set (#3).
Change subject: cpu,mb,soc: Init missing lb_serial struct fields ......................................................................
cpu,mb,soc: Init missing lb_serial struct fields
Initialize the input_hertz field of the lb_serial struct to prevent later undefined reads in lb_add_serial(). This was done for exynos5420 in commit ff94e00362 (soc/samsung/exynos5420/uart.c: Init new serial struct variables), and this patch finishes the rest. Also, move the assignment of uart_pci_addr into lb_add_serial() and set it to CONFIG_UART_PCI_ADDR, since it is the same for all the drivers.
Change-Id: I733bc8185e2f2d28a9823495b53d6b09dce4deb1 Signed-off-by: Jacob Garber jgarber1@ualberta.ca Found-by: Coverity CID 1354778 --- M src/cpu/allwinner/a10/uart_console.c M src/cpu/ti/am335x/uart.c M src/drivers/uart/pl011.c M src/drivers/uart/uart8250io.c M src/drivers/uart/uart8250mem.c M src/lib/coreboot_table.c M src/mainboard/emulation/qemu-power8/uart.c M src/soc/imgtec/pistachio/uart.c M src/soc/mediatek/common/uart.c M src/soc/nvidia/tegra124/uart.c M src/soc/nvidia/tegra210/uart.c M src/soc/qualcomm/ipq40xx/uart.c M src/soc/qualcomm/qcs405/uart.c M src/soc/samsung/exynos5250/uart.c M src/soc/samsung/exynos5420/uart.c 15 files changed, 13 insertions(+), 8 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/34548/3
Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34548 )
Change subject: cpu,mb,soc: Init missing lb_serial struct fields ......................................................................
Patch Set 3: Code-Review+1
Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34548 )
Change subject: cpu,mb,soc: Init missing lb_serial struct fields ......................................................................
Patch Set 3: Code-Review+2
Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34548 )
Change subject: cpu,mb,soc: Init missing lb_serial struct fields ......................................................................
Patch Set 3: Code-Review-1
Patch Set 1: Code-Review+2
Non-PCI drivers can use 0 for uart_pci_addr (I think), but I'm not sure which ones those are, so everything is CONFIG_UART_PCI_ADDR for now.
nit: Can we just integrate that into lb_add_serial() instead? Saves one more line of boilerplate in all those drivers.
I don't particularly like how we encode PCI BDF for UART_PCI_ADDR like done in soc/intel/quark. We could do:
uart_platform_pcidev(idx) { return PCI_DEV(0, 5, 5) | (1<<31) }
Then have weak declaration for the 0 case. The static Kconfig will not work if one happens to use add-on PCIe serial port, since bus number will be unknown.
Julius Werner has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34548 )
Change subject: cpu,mb,soc: Init missing lb_serial struct fields ......................................................................
Patch Set 3: Code-Review+1
I don't particularly like how we encode PCI BDF for UART_PCI_ADDR like done in soc/intel/quark. We could do:
uart_platform_pcidev(idx) { return PCI_DEV(0, 5, 5) | (1<<31) }
Then have weak declaration for the 0 case. The static Kconfig will not work if one happens to use add-on PCIe serial port, since bus number will be unknown.
These sound like valid points (to the extent that I understand PCI stuff, which is not very far ;) ), but should that really be part of this patch? As far as I can tell, all UART drivers for which uart_pci_addr actually means something are hardcoding it to CONFIG_UART_PCI_ADDR at the moment. The others are sometimes setting it to 0 and sometimes using uninitialized stack memory, which as Jacob/Coverity points out is just a bad idea overall. So what this patch does is fix that use of uninitialized data and simplify existing instances of setting the field into a single line of code (without changing behavior). I'd say that's in itself a benefit worth merging.
Now you may be right that CONFIG_UART_PCI_ADDR is a bad idea in itself and should be fixed. But that sounds like it might be a more complicated endeavor (e.g. I don't know what exactly that 0, 5, 5 means, but is that really fully platform- and architecture-independent?) which shouldn't hold up this fix?
Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34548 )
Change subject: cpu,mb,soc: Init missing lb_serial struct fields ......................................................................
Patch Set 3:
(3 comments)
https://review.coreboot.org/c/coreboot/+/34548/3/src/lib/coreboot_table.c File src/lib/coreboot_table.c:
https://review.coreboot.org/c/coreboot/+/34548/3/src/lib/coreboot_table.c@12... PS3, Line 121: serial->uart_pci_addr = CONFIG_UART_PCI_ADDR; The value of this field cannot be always determined build-time since it includes PCI bus number. So I am looking at having to revert this line in case UART is not an integrated PCI device on bus zero.
See CB:14609. I don't really care that much how broken this is, marking resolved.
https://review.coreboot.org/c/coreboot/+/34548/3/src/lib/coreboot_table.c@52... PS3, Line 529: uart_fill_lb(head); You could prepare uart_fill_lb() the space they need here already.
struct lb_serial serial; memset(&serial, 0, sizeof(serial)); uart_fill_lb(&serial, head);
https://review.coreboot.org/c/coreboot/+/34548/3/src/soc/mediatek/common/uar... File src/soc/mediatek/common/uart.c:
https://review.coreboot.org/c/coreboot/+/34548/3/src/soc/mediatek/common/uar... PS3, Line 184: serial.input_hertz = uart_platform_refclk(); duplicate input_hertz
Hello Kyösti Mälkki, ron minnich, Julius Werner, David Hendricks, build bot (Jenkins), Nico Huber, Patrick Georgi, Martin Roth,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/34548
to look at the new patch set (#4).
Change subject: cpu,mb,soc: Init missing lb_serial struct fields ......................................................................
cpu,mb,soc: Init missing lb_serial struct fields
Initialize the input_hertz and uart_pci_addr fields of the lb_serial struct to prevent later undefined reads in lb_add_serial(). This was done for exynos5420 in commit ff94e00362 (soc/samsung/exynos5420/uart.c: Init new serial struct variables), and this patch finishes the rest. Note that not all of the drivers can have the UART PCI address configured at build time, so a follow-up patch will be needed to correct those ones.
Change-Id: I733bc8185e2f2d28a9823495b53d6b09dce4deb1 Signed-off-by: Jacob Garber jgarber1@ualberta.ca Found-by: Coverity CID 1354778 --- M src/cpu/ti/am335x/uart.c M src/mainboard/emulation/qemu-power8/uart.c M src/soc/imgtec/pistachio/uart.c M src/soc/mediatek/common/uart.c M src/soc/nvidia/tegra124/uart.c M src/soc/nvidia/tegra210/uart.c M src/soc/qualcomm/ipq40xx/uart.c M src/soc/qualcomm/qcs405/uart.c M src/soc/samsung/exynos5250/uart.c 9 files changed, 21 insertions(+), 3 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/48/34548/4
Jacob Garber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34548 )
Change subject: cpu,mb,soc: Init missing lb_serial struct fields ......................................................................
Patch Set 4:
(1 comment)
https://review.coreboot.org/c/coreboot/+/34548/3/src/soc/mediatek/common/uar... File src/soc/mediatek/common/uart.c:
https://review.coreboot.org/c/coreboot/+/34548/3/src/soc/mediatek/common/uar... PS3, Line 184: serial.input_hertz = uart_platform_refclk();
duplicate input_hertz
Done
Jacob Garber has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34548 )
Change subject: cpu,mb,soc: Init missing lb_serial struct fields ......................................................................
Patch Set 5:
So I reverted the change of setting the UART PCI address in lb_serial(), and instead have them all set individually for each driver. This should make things easier when the runtime address detection is implemented.
Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/34548 )
Change subject: cpu,mb,soc: Init missing lb_serial struct fields ......................................................................
Patch Set 5: Code-Review+2
Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/34548 )
Change subject: cpu,mb,soc: Init missing lb_serial struct fields ......................................................................
cpu,mb,soc: Init missing lb_serial struct fields
Initialize the input_hertz and uart_pci_addr fields of the lb_serial struct to prevent later undefined reads in lb_add_serial(). This was done for exynos5420 in commit ff94e00362 (soc/samsung/exynos5420/uart.c: Init new serial struct variables), and this patch finishes the rest. Note that not all of the drivers can have the UART PCI address configured at build time, so a follow-up patch will be needed to correct those ones.
Change-Id: I733bc8185e2f2d28a9823495b53d6b09dce4deb1 Signed-off-by: Jacob Garber jgarber1@ualberta.ca Found-by: Coverity CID 1354778 Reviewed-on: https://review.coreboot.org/c/coreboot/+/34548 Reviewed-by: Patrick Georgi pgeorgi@google.com Tested-by: build bot (Jenkins) no-reply@coreboot.org --- M src/cpu/ti/am335x/uart.c M src/mainboard/emulation/qemu-power8/uart.c M src/soc/imgtec/pistachio/uart.c M src/soc/mediatek/common/uart.c M src/soc/nvidia/tegra124/uart.c M src/soc/nvidia/tegra210/uart.c M src/soc/qualcomm/ipq40xx/uart.c M src/soc/qualcomm/qcs405/uart.c M src/soc/samsung/exynos5250/uart.c 9 files changed, 21 insertions(+), 3 deletions(-)
Approvals: build bot (Jenkins): Verified Patrick Georgi: Looks good to me, approved
diff --git a/src/cpu/ti/am335x/uart.c b/src/cpu/ti/am335x/uart.c index 68ac222..24aa7df 100644 --- a/src/cpu/ti/am335x/uart.c +++ b/src/cpu/ti/am335x/uart.c @@ -189,6 +189,8 @@ serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE); serial.baud = get_uart_baudrate(); serial.regwidth = 2; + serial.input_hertz = uart_platform_refclk(); + serial.uart_pci_addr = CONFIG_UART_PCI_ADDR; lb_add_serial(&serial, data);
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); diff --git a/src/mainboard/emulation/qemu-power8/uart.c b/src/mainboard/emulation/qemu-power8/uart.c index 7c77971..27eb2f4 100644 --- a/src/mainboard/emulation/qemu-power8/uart.c +++ b/src/mainboard/emulation/qemu-power8/uart.c @@ -49,6 +49,9 @@ serial.baseaddr = 0; serial.baud = 115200; serial.regwidth = 1; + serial.input_hertz = uart_platform_refclk(); + serial.uart_pci_addr = CONFIG_UART_PCI_ADDR; lb_add_serial(&serial, data); + lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); } diff --git a/src/soc/imgtec/pistachio/uart.c b/src/soc/imgtec/pistachio/uart.c index 3afd555..1eb232a 100644 --- a/src/soc/imgtec/pistachio/uart.c +++ b/src/soc/imgtec/pistachio/uart.c @@ -150,6 +150,8 @@ serial.baseaddr = CONFIG_CONSOLE_SERIAL_UART_ADDRESS; serial.baud = get_uart_baudrate(); serial.regwidth = 1 << UART_SHIFT; + serial.input_hertz = uart_platform_refclk(); + serial.uart_pci_addr = CONFIG_UART_PCI_ADDR; lb_add_serial(&serial, data);
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); diff --git a/src/soc/mediatek/common/uart.c b/src/soc/mediatek/common/uart.c index d4a052f..0d4add8 100644 --- a/src/soc/mediatek/common/uart.c +++ b/src/soc/mediatek/common/uart.c @@ -177,9 +177,10 @@ struct lb_serial serial; serial.type = LB_SERIAL_TYPE_MEMORY_MAPPED; serial.baseaddr = UART0_BASE; - serial.input_hertz = UART_HZ; serial.baud = get_uart_baudrate(); serial.regwidth = 4; + serial.input_hertz = UART_HZ; + serial.uart_pci_addr = CONFIG_UART_PCI_ADDR; lb_add_serial(&serial, data);
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); diff --git a/src/soc/nvidia/tegra124/uart.c b/src/soc/nvidia/tegra124/uart.c index b1989dd..f5f72af 100644 --- a/src/soc/nvidia/tegra124/uart.c +++ b/src/soc/nvidia/tegra124/uart.c @@ -135,6 +135,8 @@ serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE); serial.baud = get_uart_baudrate(); serial.regwidth = 4; + serial.input_hertz = uart_platform_refclk(); + serial.uart_pci_addr = CONFIG_UART_PCI_ADDR; lb_add_serial(&serial, data);
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); diff --git a/src/soc/nvidia/tegra210/uart.c b/src/soc/nvidia/tegra210/uart.c index 459cf74..904aafa 100644 --- a/src/soc/nvidia/tegra210/uart.c +++ b/src/soc/nvidia/tegra210/uart.c @@ -122,6 +122,8 @@ serial.baseaddr = CONFIG_CONSOLE_SERIAL_TEGRA210_UART_ADDRESS; serial.baud = get_uart_baudrate(); serial.regwidth = 4; + serial.input_hertz = uart_platform_refclk(); + serial.uart_pci_addr = CONFIG_UART_PCI_ADDR; lb_add_serial(&serial, data);
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); diff --git a/src/soc/qualcomm/ipq40xx/uart.c b/src/soc/qualcomm/ipq40xx/uart.c index 95e2eab..6e5bac6 100644 --- a/src/soc/qualcomm/ipq40xx/uart.c +++ b/src/soc/qualcomm/ipq40xx/uart.c @@ -292,7 +292,9 @@ serial.baseaddr = (uint32_t)UART1_DM_BASE; serial.baud = get_uart_baudrate(); serial.regwidth = 1; - + serial.input_hertz = uart_platform_refclk(); + serial.uart_pci_addr = CONFIG_UART_PCI_ADDR; lb_add_serial(&serial, data); + lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); } diff --git a/src/soc/qualcomm/qcs405/uart.c b/src/soc/qualcomm/qcs405/uart.c index 6f95ba4..3e98088 100644 --- a/src/soc/qualcomm/qcs405/uart.c +++ b/src/soc/qualcomm/qcs405/uart.c @@ -295,7 +295,9 @@ serial.baseaddr = (uint64_t)UART2_DM_BASE; serial.baud = get_uart_baudrate(); serial.regwidth = 1; - + serial.input_hertz = uart_platform_refclk(); + serial.uart_pci_addr = CONFIG_UART_PCI_ADDR; lb_add_serial(&serial, data); + lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data); } diff --git a/src/soc/samsung/exynos5250/uart.c b/src/soc/samsung/exynos5250/uart.c index 53290cf..cc851e5 100644 --- a/src/soc/samsung/exynos5250/uart.c +++ b/src/soc/samsung/exynos5250/uart.c @@ -192,6 +192,8 @@ serial.baseaddr = uart_platform_base(CONFIG_UART_FOR_CONSOLE); serial.baud = get_uart_baudrate(); serial.regwidth = 4; + serial.input_hertz = uart_platform_refclk(); + serial.uart_pci_addr = CONFIG_UART_PCI_ADDR; lb_add_serial(&serial, data);
lb_add_console(LB_TAG_CONSOLE_SERIAL8250MEM, data);
-
Jacob Garber (Code Review) -
Julius Werner (Code Review)
-
Kyösti Mälkki (Code Review)
-
Patrick Georgi (Code Review)