Change in ...coreboot[master]: cpu/intel/common: Build FSB detection unconditionally

[Kyösti Mälkki (Code Review)]

Kyösti Mälkki has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/31341

Change subject: cpu/intel/common: Build FSB detection unconditionally
......................................................................

cpu/intel/common: Build FSB detection unconditionally

Change-Id: I37a34651d9e7d823ad5689d30739294358a97e31
Signed-off-by: Kyösti Mälkki 
---
M src/cpu/intel/common/Makefile.inc
1 file changed, 7 insertions(+), 4 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/41/31341/1

diff --git a/src/cpu/intel/common/Makefile.inc b/src/cpu/intel/common/Makefile.inc
index b67ca85..ef6c0a4 100644
--- a/src/cpu/intel/common/Makefile.inc
+++ b/src/cpu/intel/common/Makefile.inc
@@ -1,5 +1,8 @@
 ramstage-y += common_init.c
-romstage-$(CONFIG_UDELAY_LAPIC) += fsb.c
-ramstage-$(CONFIG_UDELAY_LAPIC) += fsb.c
-postcar-$(CONFIG_UDELAY_LAPIC) += fsb.c
-smm-$(CONFIG_HAVE_SMI_HANDLER) += fsb.c
+
+bootblock-y += fsb.c
+verstage-y += fsb.c
+romstage-y += fsb.c
+postcar-y += fsb.c
+ramstage-y += fsb.c
+smm-y += fsb.c

[Paul Menzel (Code Review)]

Paul Menzel has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31341 )

Change subject: cpu/intel/common: Build FSB detection unconditionally
......................................................................

Patch Set 1: Code-Review+1

Change in coreboot[master]: cpu/intel/common: Add CPU_INTEL_COMMON_TIMEBASE

[Kyösti Mälkki (Code Review)]

Kyösti Mälkki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31341 )

Change subject: cpu/intel/common: Add CPU_INTEL_COMMON_TIMEBASE
......................................................................

Patch Set 4:

This change is ready for review.

Change in coreboot[master]: cpu/intel/common: Add CPU_INTEL_COMMON_TIMEBASE

[David Guckian (Code Review)]

David Guckian has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31341 )

Change subject: cpu/intel/common: Add CPU_INTEL_COMMON_TIMEBASE
......................................................................

Patch Set 5: Code-Review+1

Change in coreboot[master]: cpu/intel/common: Add CPU_INTEL_COMMON_TIMEBASE

[Arthur Heymans (Code Review)]

Arthur Heymans has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/31341 )

Change subject: cpu/intel/common: Add CPU_INTEL_COMMON_TIMEBASE
......................................................................

Patch Set 8: Code-Review+2

Change in coreboot[master]: cpu/intel/common: Add CPU_INTEL_COMMON_TIMEBASE

[Patrick Georgi (Code Review)]

Patrick Georgi has submitted this change. ( https://review.coreboot.org/c/coreboot/+/31341 )

Change subject: cpu/intel/common: Add CPU_INTEL_COMMON_TIMEBASE
......................................................................

cpu/intel/common: Add CPU_INTEL_COMMON_TIMEBASE

To add a common tsc_freq_mhz() implementation, we need
to guard againts soc-specific duplicate definitions.

Change-Id: I37a34651d9e7d823ad5689d30739294358a97e31
Signed-off-by: Kyösti Mälkki 
Reviewed-on: https://review.coreboot.org/c/coreboot/+/31341
Reviewed-by: Arthur Heymans 
Reviewed-by: David Guckian
Tested-by: build bot (Jenkins) 
---
M src/cpu/intel/common/Kconfig
M src/cpu/intel/common/Makefile.inc
M src/cpu/intel/fsp_model_406dx/Kconfig
M src/cpu/intel/model_1067x/Kconfig
M src/cpu/intel/model_106cx/Kconfig
M src/cpu/intel/model_6ex/Kconfig
M src/cpu/intel/model_6fx/Kconfig
7 files changed, 16 insertions(+), 3 deletions(-)

Approvals:
  build bot (Jenkins): Verified
  Arthur Heymans: Looks good to me, approved
  David Guckian: Looks good to me, but someone else must approve

diff --git a/src/cpu/intel/common/Kconfig b/src/cpu/intel/common/Kconfig
index 56bed22..4074d8c 100644
--- a/src/cpu/intel/common/Kconfig
+++ b/src/cpu/intel/common/Kconfig
@@ -19,4 +19,7 @@
      However, leaving the lock bit unset will break Windows' detection of
      VMX support and built-in virtualization features like Hyper-V.

+config CPU_INTEL_COMMON_TIMEBASE
+	bool
+
 endif
diff --git a/src/cpu/intel/common/Makefile.inc b/src/cpu/intel/common/Makefile.inc
index 2fc6da9..c38e81c 100644
--- a/src/cpu/intel/common/Makefile.inc
+++ b/src/cpu/intel/common/Makefile.inc
@@ -1,5 +1,10 @@
 ramstage-y += common_init.c
-romstage-$(CONFIG_UDELAY_LAPIC) += fsb.c
-ramstage-$(CONFIG_UDELAY_LAPIC) += fsb.c
-postcar-$(CONFIG_UDELAY_LAPIC) += fsb.c
+
+ifeq ($(CONFIG_CPU_INTEL_COMMON_TIMEBASE),y)
+bootblock-y += fsb.c
+verstage-y += fsb.c
+romstage-y += fsb.c
+postcar-y += fsb.c
+ramstage-y += fsb.c
 smm-y += fsb.c
+endif
diff --git a/src/cpu/intel/fsp_model_406dx/Kconfig b/src/cpu/intel/fsp_model_406dx/Kconfig
index 15fd804..11ee9a9 100644
--- a/src/cpu/intel/fsp_model_406dx/Kconfig
+++ b/src/cpu/intel/fsp_model_406dx/Kconfig
@@ -33,6 +33,7 @@
    select TSC_SYNC_MFENCE
    select LAPIC_MONOTONIC_TIMER
    select CPU_INTEL_COMMON
+	select CPU_INTEL_COMMON_TIMEBASE
    select NO_SMM

# Microcode header files are delivered in FSP package
diff --git a/src/cpu/intel/model_1067x/Kconfig b/src/cpu/intel/model_1067x/Kconfig
index 3ea8125..c8b9169 100644
--- a/src/cpu/intel/model_1067x/Kconfig
+++ b/src/cpu/intel/model_1067x/Kconfig
@@ -10,3 +10,4 @@
    select TSC_SYNC_MFENCE
    select SUPPORT_CPU_UCODE_IN_CBFS
    select CPU_INTEL_COMMON
+	select CPU_INTEL_COMMON_TIMEBASE
diff --git a/src/cpu/intel/model_106cx/Kconfig b/src/cpu/intel/model_106cx/Kconfig
index f365cf1..ba8557c 100644
--- a/src/cpu/intel/model_106cx/Kconfig
+++ b/src/cpu/intel/model_106cx/Kconfig
@@ -13,6 +13,7 @@
    select SUPPORT_CPU_UCODE_IN_CBFS
    select SERIALIZED_SMM_INITIALIZATION
    select CPU_INTEL_COMMON
+	select CPU_INTEL_COMMON_TIMEBASE

if CPU_INTEL_MODEL_106CX

diff --git a/src/cpu/intel/model_6ex/Kconfig b/src/cpu/intel/model_6ex/Kconfig
index 10ebcc7..4ae83f0 100644
--- a/src/cpu/intel/model_6ex/Kconfig
+++ b/src/cpu/intel/model_6ex/Kconfig
@@ -11,3 +11,4 @@
    select TSC_SYNC_MFENCE
    select SUPPORT_CPU_UCODE_IN_CBFS
    select CPU_INTEL_COMMON
+	select CPU_INTEL_COMMON_TIMEBASE
diff --git a/src/cpu/intel/model_6fx/Kconfig b/src/cpu/intel/model_6fx/Kconfig
index 8f05314..b86b07e 100644
--- a/src/cpu/intel/model_6fx/Kconfig
+++ b/src/cpu/intel/model_6fx/Kconfig
@@ -11,3 +11,4 @@
    select TSC_SYNC_MFENCE
    select SUPPORT_CPU_UCODE_IN_CBFS
    select CPU_INTEL_COMMON
+	select CPU_INTEL_COMMON_TIMEBASE