nsekar@codeaurora.org has uploaded this change for review. ( https://review.coreboot.org/c/coreboot/+/30903
Change subject: qclib: Differentiate between ES_1.0 and ES1.1 silicon ......................................................................
qclib: Differentiate between ES_1.0 and ES1.1 silicon
The PBL data ptr gets passed at a different location for 1.0 vs 1.1. So let us read the revision from TCSR and pass the right value.
Change-Id: Id23493c8cfc64f62964a453cd32a0ddc4bff9e84 Signed-off-by: Sricharan R sricharan@codeaurora.org Signed-off-by: Nitheesh Sekar nsekar@codeaurora.org --- M src/soc/qualcomm/qcs405/qclib_execute.c 1 file changed, 14 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/30903/1
diff --git a/src/soc/qualcomm/qcs405/qclib_execute.c b/src/soc/qualcomm/qcs405/qclib_execute.c index 917a04c..214128f 100644 --- a/src/soc/qualcomm/qcs405/qclib_execute.c +++ b/src/soc/qualcomm/qcs405/qclib_execute.c @@ -14,6 +14,7 @@ */
#include <string.h> +#include <arch/io.h> #include <arch/cache.h> #include <arch/mmu.h> #include <cbfs.h> @@ -28,7 +29,12 @@ #define DCB_NAME "/dcb" #define QCLIB_NAME "/qclib"
-#define PBL_DATA_PTR 0x8c101a0 //0x14810188 +#define TCSR_SOC_HW_VERSION 0x0194D000 +#define ES_1_0 0x20140100 +#define ES_1_1 0x20140101 + +#define PBL_DATA_PTR_ES_1_0 0x8c101a0 +#define PBL_DATA_PTR_ES_1_1 0x8c111a0
void qclib_load_and_run(void) { @@ -36,6 +42,7 @@ void *arg; int ret_code; struct mmu_context pre_qclib_mmu_context; + void *pbl_data_ptr;
struct prog qclib = PROG_INIT(PROG_REFCODE, CONFIG_CBFS_PREFIX QCLIB_NAME); @@ -67,7 +74,12 @@ if (cbfs_prog_stage_load(&qclib)) goto fail;
- prog_set_entry(&qclib, qclib.entry, (void *)PBL_DATA_PTR); + if (read32((void *) TCSR_SOC_HW_VERSION) == ES_1_1) + pbl_data_ptr = (void *) 0x8c111a0; + else + pbl_data_ptr = (void *) 0x8c101a0; + + prog_set_entry(&qclib, qclib.entry, (void *)pbl_data_ptr);
printk(BIOS_DEBUG, "\n\n\nQCLib is about to Initialize PMIC and DDR\n"); printk(BIOS_DEBUG, "Jumping to QCLib code at %p(%p)\n",
Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30903 )
Change subject: qclib: Differentiate between ES_1.0 and ES1.1 silicon ......................................................................
Patch Set 1:
I updated this patch train to apply on top of current master. there was only a minor change (in libpayload's Makefile.inc/Kconfig for the serial driver), but eventually that rebase would have been required in any case.
Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30903 )
Change subject: qclib: Differentiate between ES_1.0 and ES1.1 silicon ......................................................................
Patch Set 5: Code-Review+1
(2 comments)
https://review.coreboot.org/#/c/30903/4/src/soc/qualcomm/qcs405/qclib_execut... File src/soc/qualcomm/qcs405/qclib_execute.c:
https://review.coreboot.org/#/c/30903/4/src/soc/qualcomm/qcs405/qclib_execut... PS4, Line 78: 0x8c111a0 PBL_DATA_PTR_ES_1_1
https://review.coreboot.org/#/c/30903/4/src/soc/qualcomm/qcs405/qclib_execut... PS4, Line 80: 0x8c101a0 PBL_DATA_PTR_ES_1_0
Yuji Sasaki has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30903 )
Change subject: qclib: Differentiate between ES_1.0 and ES1.1 silicon ......................................................................
Patch Set 5: Code-Review+1
Sricharan Ramabadhran has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30903 )
Change subject: qclib: Differentiate between ES_1.0 and ES1.1 silicon ......................................................................
Patch Set 11:
(1 comment)
Patch Set 5: Code-Review+1
(2 comments)
Ok, will use t
https://review.coreboot.org/#/c/30903/4/src/soc/qualcomm/qcs405/qclib_execut... File src/soc/qualcomm/qcs405/qclib_execute.c:
https://review.coreboot.org/#/c/30903/4/src/soc/qualcomm/qcs405/qclib_execut... PS4, Line 78: 0x8c111a0
PBL_DATA_PTR_ES_1_1
Ok, will cleanup dead code and also use Macros, for this and other places
Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30903 )
Change subject: qclib: Differentiate between ES_1.0 and ES1.1 silicon ......................................................................
Patch Set 12: Code-Review+2
(2 comments)
https://review.coreboot.org/#/c/30903/12/src/soc/qualcomm/qcs405/qclib_execu... File src/soc/qualcomm/qcs405/qclib_execute.c:
https://review.coreboot.org/#/c/30903/12/src/soc/qualcomm/qcs405/qclib_execu... PS12, Line 32: 0x0194D000 nit: the rest of the file uses lower cases hex values
https://review.coreboot.org/#/c/30903/12/src/soc/qualcomm/qcs405/qclib_execu... PS12, Line 32: #define TCSR_SOC_HW_VERSION 0x0194D000 : #define ES_1_0 0x20140100 : #define ES_1_1 0x20140101 As long as we really only need them here, it's okay-ish to keep them here, but the SoC revision really has little to do with qclib_execute, does it?
Sricharan Ramabadhran has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30903 )
Change subject: qclib: Differentiate between ES_1.0 and ES1.1 silicon ......................................................................
Patch Set 12:
(2 comments)
https://review.coreboot.org/#/c/30903/12/src/soc/qualcomm/qcs405/qclib_execu... File src/soc/qualcomm/qcs405/qclib_execute.c:
https://review.coreboot.org/#/c/30903/12/src/soc/qualcomm/qcs405/qclib_execu... PS12, Line 32: 0x0194D000
nit: the rest of the file uses lower cases hex values
ok will change to be consistent
https://review.coreboot.org/#/c/30903/12/src/soc/qualcomm/qcs405/qclib_execu... PS12, Line 32: #define TCSR_SOC_HW_VERSION 0x0194D000 : #define ES_1_0 0x20140100 : #define ES_1_1 0x20140101
As long as we really only need them here, it's okay-ish to keep them here, but the SoC revision real […]
The only reason as we have done below is to pass the right PBL pointer to qclib
Hello Yuji Sasaki, build bot (Jenkins), Patrick Georgi,
I'd like you to reexamine a change. Please visit
https://review.coreboot.org/c/coreboot/+/30903
to look at the new patch set (#13).
Change subject: TEMP: NOT FOR REVIEW: qclib: Differentiate between ES_1.0 and ES1.1 silicon ......................................................................
TEMP: NOT FOR REVIEW: qclib: Differentiate between ES_1.0 and ES1.1 silicon
The PBL data ptr gets passed at a different location for 1.0 vs 1.1. So let us read the revision from TCSR and pass the right value.
Change-Id: Id23493c8cfc64f62964a453cd32a0ddc4bff9e84 Signed-off-by: Sricharan R sricharan@codeaurora.org Signed-off-by: Nitheesh Sekar nsekar@codeaurora.org --- M src/soc/qualcomm/qcs405/qclib_execute.c 1 file changed, 14 insertions(+), 2 deletions(-)
git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/30903/13
Patrick Georgi has posted comments on this change. ( https://review.coreboot.org/c/coreboot/+/30903 )
Change subject: TEMP: NOT FOR REVIEW: qclib: Differentiate between ES_1.0 and ES1.1 silicon ......................................................................
Patch Set 22:
we can abandon this, right?
Patrick Georgi has abandoned this change. ( https://review.coreboot.org/c/coreboot/+/30903 )
Change subject: TEMP: NOT FOR REVIEW: qclib: Differentiate between ES_1.0 and ES1.1 silicon ......................................................................
Abandoned
won't be finished here