nsekar@codeaurora.org has uploaded this change for review.

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qclib: Differentiate between ES_1.0 and ES1.1 silicon

The PBL data ptr gets passed at a different location for 1.0 vs 1.1.
So let us read the revision from TCSR and pass the right value.

Change-Id: Id23493c8cfc64f62964a453cd32a0ddc4bff9e84
Signed-off-by: Sricharan R <sricharan@codeaurora.org>
Signed-off-by: Nitheesh Sekar <nsekar@codeaurora.org>
M src/soc/qualcomm/qcs405/qclib_execute.c
1 file changed, 14 insertions(+), 2 deletions(-)

git pull ssh://review.coreboot.org:29418/coreboot refs/changes/03/30903/1
diff --git a/src/soc/qualcomm/qcs405/qclib_execute.c b/src/soc/qualcomm/qcs405/qclib_execute.c
index 917a04c..214128f 100644
--- a/src/soc/qualcomm/qcs405/qclib_execute.c
+++ b/src/soc/qualcomm/qcs405/qclib_execute.c
@@ -14,6 +14,7 @@

#include <string.h>
+#include <arch/io.h>
#include <arch/cache.h>
#include <arch/mmu.h>
#include <cbfs.h>
@@ -28,7 +29,12 @@
#define DCB_NAME "/dcb"
#define QCLIB_NAME "/qclib"

-#define PBL_DATA_PTR 0x8c101a0 //0x14810188
+#define TCSR_SOC_HW_VERSION 0x0194D000
+#define ES_1_0 0x20140100
+#define ES_1_1 0x20140101
+#define PBL_DATA_PTR_ES_1_0 0x8c101a0
+#define PBL_DATA_PTR_ES_1_1 0x8c111a0

void qclib_load_and_run(void)
@@ -36,6 +42,7 @@
void *arg;
int ret_code;
struct mmu_context pre_qclib_mmu_context;
+ void *pbl_data_ptr;

struct prog qclib =
@@ -67,7 +74,12 @@
if (cbfs_prog_stage_load(&qclib))
goto fail;

- prog_set_entry(&qclib, qclib.entry, (void *)PBL_DATA_PTR);
+ if (read32((void *) TCSR_SOC_HW_VERSION) == ES_1_1)
+ pbl_data_ptr = (void *) 0x8c111a0;
+ else
+ pbl_data_ptr = (void *) 0x8c101a0;
+ prog_set_entry(&qclib, qclib.entry, (void *)pbl_data_ptr);

printk(BIOS_DEBUG, "\n\n\nQCLib is about to Initialize PMIC and DDR\n");
printk(BIOS_DEBUG, "Jumping to QCLib code at %p(%p)\n",

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Gerrit-Project: coreboot
Gerrit-Branch: master
Gerrit-Change-Id: Id23493c8cfc64f62964a453cd32a0ddc4bff9e84
Gerrit-Change-Number: 30903
Gerrit-PatchSet: 1
Gerrit-Owner: nsekar@codeaurora.org
Gerrit-MessageType: newchange