coreboot-gerrit April 2025

coreboot-gerrit@coreboot.org

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[M] Change in coreboot[main]: soc/mediatek/mt8189: Add DRAM calibration support
by Yu-Ping Wu (Code Review) 10 Apr '25

10 Apr '25

Yu-Ping Wu has posted comments on this change by Vince Liu. ( https://review.coreboot.org/c/coreboot/+/87037?usp=email ) Change subject: soc/mediatek/mt8189: Add DRAM calibration support ...................................................................... Patch Set 3: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/87037?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ia6f6e5afc1f4a2e919243bda0799712cd7b4d01f Gerrit-Change-Number: 87037 Gerrit-PatchSet: 3 Gerrit-Owner: Vince Liu <vince-wl.liu(a)mediatek.com> Gerrit-Reviewer: Hung-Te Lin <hungte(a)chromium.org> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Comment-Date: Thu, 10 Apr 2025 16:33:04 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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[S] Change in coreboot[main]: Documentation,util: Run util_readme.sh to regen *.md
by Yu-Ping Wu (Code Review) 10 Apr '25

10 Apr '25

Attention is currently required from: Maxim Polyakov, Nicholas Chin, Yidi Lin. Yu-Ping Wu has posted comments on this change by Yu-Ping Wu. ( https://review.coreboot.org/c/coreboot/+/87224?usp=email ) Change subject: Documentation,util: Run util_readme.sh to regen *.md ...................................................................... Patch Set 2: (1 comment) File Documentation/util.md: https://review.coreboot.org/c/coreboot/+/87224/comment/2412dd43_578693b0?us… : PS1, Line 73: c > util_readme.sh just copies whatever is in the `description.md` file for a utility. […] Done -- To view, visit https://review.coreboot.org/c/coreboot/+/87224?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3d3f87517c445d650e9cea61448b28d005d46737 Gerrit-Change-Number: 87224 Gerrit-PatchSet: 2 Gerrit-Owner: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Attention: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Yidi Lin <yidilin(a)google.com> Gerrit-Comment-Date: Thu, 10 Apr 2025 16:31:29 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Nicholas Chin <nic.c3.14(a)gmail.com> Comment-In-Reply-To: Yidi Lin <yidilin(a)google.com>

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[S] Change in coreboot[main]: Documentation,util: Run util_readme.sh to regen *.md
by Yu-Ping Wu (Code Review) 10 Apr '25

10 Apr '25

Attention is currently required from: Yu-Ping Wu. Hello Yidi Lin, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/87224?usp=email to look at the new patch set (#2). The following approvals got outdated and were removed: Verified+1 by build bot (Jenkins) Change subject: Documentation,util: Run util_readme.sh to regen *.md ...................................................................... Documentation,util: Run util_readme.sh to regen *.md As CB:71757 [1] updates Documentation/util.md and util/README.md manually without modifying util/intelp2m/description.md, we port the description changes back to that file. [1] commit da54bd60af60 ("Documentation: Update information about intelp2m") Change-Id: I3d3f87517c445d650e9cea61448b28d005d46737 Signed-off-by: Yu-Ping Wu <yupingso(a)chromium.org> --- M Documentation/util.md M util/README.md M util/intelp2m/description.md 3 files changed, 6 insertions(+), 6 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/24/87224/2 -- To view, visit https://review.coreboot.org/c/coreboot/+/87224?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I3d3f87517c445d650e9cea61448b28d005d46737 Gerrit-Change-Number: 87224 Gerrit-PatchSet: 2 Gerrit-Owner: Yu-Ping Wu <yupingso(a)google.com> Gerrit-Reviewer: Yidi Lin <yidilin(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Nicholas Chin <nic.c3.14(a)gmail.com> Gerrit-Attention: Yu-Ping Wu <yupingso(a)google.com>

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[M] Change in coreboot[main]: soc/intel/cmn/blk: Refactor CSE status flag and optimize forced sync
by Kapil Porwal (Code Review) 10 Apr '25

10 Apr '25

Attention is currently required from: Dinesh Gehlot, Intel coreboot Reviewers, Subrata Banik. Kapil Porwal has posted comments on this change by Dinesh Gehlot. ( https://review.coreboot.org/c/coreboot/+/86153?usp=email ) Change subject: soc/intel/cmn/blk: Refactor CSE status flag and optimize forced sync ...................................................................... Patch Set 15: (1 comment) File src/soc/intel/common/block/include/intelblocks/cse.h: https://review.coreboot.org/c/coreboot/+/86153/comment/03d5cbba_4c39c3f3?us… : PS15, Line 186: CSE_DOWNGRADE_REQUEST I was wondering if we even use this flag at all. -- To view, visit https://review.coreboot.org/c/coreboot/+/86153?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: If1e4180cb5fec3990fdee2b0e412173b1c8c6ded Gerrit-Change-Number: 86153 Gerrit-PatchSet: 15 Gerrit-Owner: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Reviewer: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Reviewer: Kapil Porwal <kapilporwal(a)google.com> Gerrit-Reviewer: Subrata Banik <subratabanik(a)google.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-CC: Karthik Ramasubramanian <kramasub(a)google.com> Gerrit-CC: Paul Menzel <paulepanter(a)mailbox.org> Gerrit-Attention: Intel coreboot Reviewers <intel_coreboot_reviewers(a)intel.com> Gerrit-Attention: Subrata Banik <subratabanik(a)google.com> Gerrit-Attention: Dinesh Gehlot <digehlot(a)google.com> Gerrit-Comment-Date: Thu, 10 Apr 2025 16:18:09 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No

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[L] Change in coreboot[main]: mb/intel/ptlrvp: Introduce PTL RVP External and Internal EC Configura...
by Bora Guvendik (Code Review) 10 Apr '25

10 Apr '25

Attention is currently required from: Jamie Ryu, Jérémy Compostella, Zhixing Ma. Bora Guvendik has posted comments on this change by Bora Guvendik. ( https://review.coreboot.org/c/coreboot/+/86991?usp=email ) Change subject: mb/intel/ptlrvp: Introduce PTL RVP External and Internal EC Configurations ...................................................................... Patch Set 8: (1 comment) File src/mainboard/intel/ptlrvp/Kconfig.name: https://review.coreboot.org/c/coreboot/+/86991/comment/953ca649_331dd227?us… : PS8, Line 8: config BOARD_INTEL_PTLRVP_P_EXT_EC > Is the board name "PTLRVP_P_EXT_EC" or "PTLRVP_EXT_EC", the commit message uses the latter. I changed the commit message to PTLRVP_P_EXT_EC -- To view, visit https://review.coreboot.org/c/coreboot/+/86991?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic3e40f2a19d7ed4f7a16e6e516a284a9a778b9fd Gerrit-Change-Number: 86991 Gerrit-PatchSet: 8 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Zhixing Ma <zhixing.ma(a)intel.com> Gerrit-Attention: Zhixing Ma <zhixing.ma(a)intel.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Comment-Date: Thu, 10 Apr 2025 15:36:20 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Zhixing Ma <zhixing.ma(a)intel.com>

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[L] Change in coreboot[main]: mb/intel/ptlrvp: Introduce PTL RVP External and Internal EC Configura...
by Bora Guvendik (Code Review) 10 Apr '25

10 Apr '25

Attention is currently required from: Bora Guvendik, Jamie Ryu, Jérémy Compostella. Hello Jamie Ryu, Jérémy Compostella, Wonkyu Kim, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/86991?usp=email to look at the new patch set (#9). Change subject: mb/intel/ptlrvp: Introduce PTL RVP External and Internal EC Configurations ...................................................................... mb/intel/ptlrvp: Introduce PTL RVP External and Internal EC Configurations This commit adds configurations for both external and internal EC versions of the PTL RVP board. The changes involve updates to the Kconfig files to select appropriate EC configurations based on the specific PTL RVP variant. By organizing these options, it ensures that the build system selects the right EC components and configurations, aligning with the specific needs of the board version in use. The new configuration for external EC (`BOARD_INTEL_PTLRVP_P_EXT_EC`) enables Chrome EC related config options and enables TPM, whereas intel EC (`BOARD_INTEL_PTLRVP`) disables Chrome EC related config options and uses MOCK TPM. BUG=none TEST=Build the firmware for PTL RVP with both external and internal EC settings, verifying that the correct components are included based on the chosen configuration. Ensure that the board operates correctly with the selected EC setup. Change-Id: Ic3e40f2a19d7ed4f7a16e6e516a284a9a778b9fd Signed-off-by: Bora Guvendik <bora.guvendik(a)intel.com> --- M src/mainboard/intel/ptlrvp/Kconfig M src/mainboard/intel/ptlrvp/Kconfig.name M src/mainboard/intel/ptlrvp/chromeos.c M src/mainboard/intel/ptlrvp/ec.c M src/mainboard/intel/ptlrvp/smihandler.c M src/mainboard/intel/ptlrvp/variants/baseboard/ptlrvp/devicetree.cb M src/mainboard/intel/ptlrvp/variants/baseboard/ptlrvp/ramstage.c M src/mainboard/intel/ptlrvp/variants/ptlrvp/overridetree.cb A src/mainboard/intel/ptlrvp/variants/ptlrvp_ext_ec/overridetree.cb 9 files changed, 968 insertions(+), 26 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/91/86991/9 -- To view, visit https://review.coreboot.org/c/coreboot/+/86991?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ic3e40f2a19d7ed4f7a16e6e516a284a9a778b9fd Gerrit-Change-Number: 86991 Gerrit-PatchSet: 9 Gerrit-Owner: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Reviewer: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Reviewer: Jérémy Compostella <jeremy.compostella(a)intel.com> Gerrit-Reviewer: Wonkyu Kim <wonkyu.kim(a)intel.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-CC: Zhixing Ma <zhixing.ma(a)intel.com> Gerrit-Attention: Bora Guvendik <bora.guvendik(a)intel.com> Gerrit-Attention: Jamie Ryu <jamie.m.ryu(a)intel.com> Gerrit-Attention: Jérémy Compostella <jeremy.compostella(a)intel.com>

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[L] Change in coreboot[main]: mb/starlabs/starbook: Simplify CFR options
by Matt DeVillier (Code Review) 10 Apr '25

10 Apr '25

Attention is currently required from: Matt DeVillier, Sean Rhodes. Hello Sean Rhodes, build bot (Jenkins), I'd like you to reexamine a change. Please visit https://review.coreboot.org/c/coreboot/+/87088?usp=email to look at the new patch set (#4). The following approvals got outdated and were removed: Code-Review+2 by Sean Rhodes, Verified+1 by build bot (Jenkins) The change is no longer submittable: Code-Review and Verified are unsatisfied now. Change subject: mb/starlabs/starbook: Simplify CFR options ...................................................................... mb/starlabs/starbook: Simplify CFR options Move declaration of all CFR objects to a header file, so they don't need to be guarded. Simplify the enablement of CFR options by creating board-level Kconfig options as needed. TEST=build/boot starbook MTL, TGL, ADL-N. Change-Id: I43dfa6795708e9975b938ce1359629f6b9c4f1cf Signed-off-by: Matt DeVillier <matt.devillier(a)gmail.com> --- M src/mainboard/starlabs/starbook/Kconfig M src/mainboard/starlabs/starbook/cfr.c A src/mainboard/starlabs/starbook/cfr.h 3 files changed, 229 insertions(+), 211 deletions(-) git pull ssh://review.coreboot.org:29418/coreboot refs/changes/88/87088/4 -- To view, visit https://review.coreboot.org/c/coreboot/+/87088?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: newpatchset Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I43dfa6795708e9975b938ce1359629f6b9c4f1cf Gerrit-Change-Number: 87088 Gerrit-PatchSet: 4 Gerrit-Owner: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Attention: Matt DeVillier <matt.devillier(a)gmail.com>

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[L] Change in coreboot[main]: superio/fintek: Add support for f81966d
by Maxim Polyakov (Code Review) 10 Apr '25

10 Apr '25

Attention is currently required from: Erik van den Bogaert, Felix Singer, Harrie Paijmans. Maxim Polyakov has posted comments on this change by Harrie Paijmans. ( https://review.coreboot.org/c/coreboot/+/87198?usp=email ) The change is no longer submittable: All-Comments-Resolved is unsatisfied now. Change subject: superio/fintek: Add support for f81966d ...................................................................... Patch Set 3: Code-Review+2 (2 comments) Commit Message: https://review.coreboot.org/c/coreboot/+/87198/comment/ef3e5ef6_978f5386?us… : PS2, Line 16: TEST > Yes, now verified with 'superiotool -de' Please add information about this in the commit message TEST=.... and verified with 'superiotool -de' File src/superio/fintek/f81966d/f81966d_hwm.c: https://review.coreboot.org/c/coreboot/+/87198/comment/66cfaa01_f8b76e9f?us… : PS3, Line 27: pnp_enter_conf_mode(dev); There is no need to set the configuration mode for HWM, doesn't break initialization, it's just not necessary. -- To view, visit https://review.coreboot.org/c/coreboot/+/87198?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Ibe3987b6e15eb07b92d7f5a7de2bd511de85e2f7 Gerrit-Change-Number: 87198 Gerrit-PatchSet: 3 Gerrit-Owner: Harrie Paijmans <hpaijmans(a)eltan.com> Gerrit-Reviewer: Erik van den Bogaert <ebogaert(a)eltan.com> Gerrit-Reviewer: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Reviewer: Frans Hendriks <fhendriks(a)eltan.com> Gerrit-Reviewer: Maxim Polyakov <max.senia.poliak(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Erik van den Bogaert <ebogaert(a)eltan.com> Gerrit-Attention: Felix Singer <service+coreboot-gerrit(a)felixsinger.de> Gerrit-Attention: Harrie Paijmans <hpaijmans(a)eltan.com> Gerrit-Comment-Date: Thu, 10 Apr 2025 15:04:07 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: Yes Comment-In-Reply-To: Maxim Polyakov <max.senia.poliak(a)gmail.com> Comment-In-Reply-To: Harrie Paijmans <hpaijmans(a)eltan.com>

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[M] Change in coreboot[main]: ec/dasharo/ec: Add DTT power and battery participants
by Michał Kopeć (Code Review) 10 Apr '25

10 Apr '25

Attention is currently required from: Maciej Pijanowski, Michał Żygowski. Michał Kopeć has posted comments on this change by Michał Kopeć. ( https://review.coreboot.org/c/coreboot/+/86820?usp=email ) Change subject: ec/dasharo/ec: Add DTT power and battery participants ...................................................................... Patch Set 9: (1 comment) Patchset: PS8: > Don't we need any DPTF policies in the devicetree? Windows seems happy without it, but Linux will complain about not being able to initialize a hwmon interface. -- To view, visit https://review.coreboot.org/c/coreboot/+/86820?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: I1e215366a79c0dd0f8a5d54c33fc718ba6b1302b Gerrit-Change-Number: 86820 Gerrit-PatchSet: 9 Gerrit-Owner: Michał Kopeć <michal.kopec(a)3mdeb.com> Gerrit-Reviewer: Krystian Hebel <krystian.hebel(a)3mdeb.com> Gerrit-Reviewer: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-Reviewer: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Michał Żygowski <michal.zygowski(a)3mdeb.com> Gerrit-Attention: Maciej Pijanowski <maciej.pijanowski(a)3mdeb.com> Gerrit-Comment-Date: Thu, 10 Apr 2025 14:26:19 +0000 Gerrit-HasComments: Yes Gerrit-Has-Labels: No Comment-In-Reply-To: Michał Żygowski <michal.zygowski(a)3mdeb.com>

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[S] Change in coreboot[main]: mb/starlabs/starbook/tgl: Correct GPIO configs
by Matt DeVillier (Code Review) 10 Apr '25

10 Apr '25

Attention is currently required from: Sean Rhodes. Matt DeVillier has posted comments on this change by Sean Rhodes. ( https://review.coreboot.org/c/coreboot/+/87261?usp=email ) Change subject: mb/starlabs/starbook/tgl: Correct GPIO configs ...................................................................... Patch Set 1: Code-Review+2 -- To view, visit https://review.coreboot.org/c/coreboot/+/87261?usp=email To unsubscribe, or for help writing mail filters, visit https://review.coreboot.org/settings?usp=email Gerrit-MessageType: comment Gerrit-Project: coreboot Gerrit-Branch: main Gerrit-Change-Id: Id41ea5d2f4f4321526d25b27411dad02fbde90b6 Gerrit-Change-Number: 87261 Gerrit-PatchSet: 1 Gerrit-Owner: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Reviewer: Matt DeVillier <matt.devillier(a)gmail.com> Gerrit-Reviewer: build bot (Jenkins) <no-reply(a)coreboot.org> Gerrit-Attention: Sean Rhodes <sean(a)starlabs.systems> Gerrit-Comment-Date: Thu, 10 Apr 2025 12:49:19 +0000 Gerrit-HasComments: No Gerrit-Has-Labels: Yes

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coreboot-gerrit April 2025